True In-Circuit Emulation of Honeywell HXNV0100 MRAM and ASICs

Transcription

1 True In-Circuit Emulation of Honeywell HXNV0100 MRAM and ASICs

2 Features Real-time emulation of Honeywell HXNV0100 synchronous MRAM Same X/Y form-factor as HXNV0100 Implemented using an Actel ProASIC3 A3P1000 re-programmable FPGA and a Freescale 256k x 16 asynchronous MRAM (35ns) Up to four 64k x 16 switchable MRAM banks Low voltage detector for write inhibit Programmable and random ECC error insertion capability NWI override capability Powers up live, after 3.3v power supply stabilizes (about 0.5 ms) On-board USB-JTAG emulation interface permits examination, modification, and data exchanges between host development station and target emulation MRAM on-the-fly Built-in FPGA device programmer/stapl player Optional advanced real-time trace and timing analysis (RTTA) package includes 72-channel x 2-ksample real-time trace buffer, 8-level event sequencer, four programmable trigger words, two 16-bit event counters, and 30-bit time stamp May be re-programmed as a customized MRAM8051 or MRAM16 metarisc microcontroller complete with 512 kbytes of nonvolatile program/xdata MRAM using Silicon Laude's synthesizable MRAM8051 or MRAM16 metarisc microcontroller Verilog RTL library MRAMulator TM Functional Block Diagram General Description The Silicon Laude MRAMulator provides a low-cost way of developing and debugging applications that will eventually use one or more Honeywell HXNV0100 synchronous MRAMs. In addition to providing a low-cost, off-theshelf commercial grade replacement for the Honeywell MRAM, the MRAMulator provides an advanced debugging and real-time monitoring capability for getting the target application up and running in the shortest time possible. The MRAMulator may be used transparently as a temporary, stand-alone HXNV0100 replacement and/or it may be used as a very sophisticated real-time debugging and analysis/development system when the mini-b USB communications adapter is installed. When used with Domain Technologies BoxView realtime debugger software and USB communications adapter, the contents of the MRAM emulation memory can be filled, loaded, examined, modified, and edited on-the-fly and in real-time, even while the emulation MRAM is being accessed by the target system. Moreover, errors can be injected into the memory and an ECC output asserted either by programming up to four address compare registers, or by entering random error generation mode. Finally, as an added benefit, when not being used as an HXNV0100 emulator, the MRAMulator can be reprogrammed as a customized Silicon Laude MRAM8051 or MRAM16 metarisc microcontroller for eventual conversion into a Honeywell rad-hard ASIC.

3 Overview The MRAMulator is essentially a Freescale MR2A16A 35ns MRAM with an Actel ProASIC3 wrapped around it. It also comprises a Silicon Labs USB controller, 1.6V regulator (for the FPGA core voltage), and a super-miniature 20-pin connector for connecting to a mini-b USB communications adapter FPGA device programming and MRAMulator communications with a host PC is mediated by the Silicon Labs USB controller. In addition to handling USB communications, the USB controller provides a 20MHz clock, power-on-reset (POR), 8-channel 10- bit A/D converter, and thermometer whose readings may be automatically and transparently pushed into target register locations in real-time by way of JTAG. As an HXNV0100 Emulator To enable emulation of the Honeywell HXNV0100 MRAM, the 64-pin QFP ceramic package pin assignments have been adopted by the 64-pin MRAMulator design, but with a few exceptions. Since the MRAMulator does not use or require a 1.8 Volt VCC1 supply, these HXNV0100 pins have been connected to an FPGA I/O pin. In addition, some VCC2 and GND pins have also been connected to FPGA I/O pins. Finally, the HXNV0100 TEST pins are not used by the MRAMulator circuit at all and are designated as not connected (NC). When delivered from the factory, the MRAMulator is preprogrammed with an HXNV0100 emulator circuit that will power up live and begin emulating the HXNV0100 device when installed in a functional circuit. With the USB communications adapter installed, the MRAMulator's emulation MRAM may be loaded with an ASCII, hex, or binary image using Domain Technologies BoxView debugger. Actel A3P1000 reprogrammable FPGA in 144-ball FG package provides up to 1 million system gates, 24,576 flip-flops, and 32, 4608-bit synchronous RAM blocks for implementing customized MRAM8051, MRAM16 metarisc, or ASIC designs. On-board 1.6V regulator for FPGA core voltage at up to 500mA. Freescale MR2A16A 256 kword x 16-bit asynchronous MRAM with 35ns access time. MRAMulator In-Circuit Emulator (shown actual size) 20-pin adapter connector receives USB, debug event & trigger pulse, and auxiliary 3.3V power from USB adapter below. Top Side Silicon Labs USB microcontroller provides USB-JTAB interface, 8- channels 10-bit A/D, thermometer, POR, 20MHz system clock, and serves as FPGA device programmer Bottom Side As an MRAM8051/ASIC Emulator The MRAMulator may also be used as a generalpurpose ASIC emulator and/or MRAM8051 microcontroller emulator for designing, developing, and debugging customized MRAM8051 designs for later conversion into a Honeywell radiation-hardened ASIC packaged in Honeywell's 64-pin QFP ceramic package. Incorporated within the MRAMulator is a built-in device programmer and STAPL player that is compatible with Actel's free Libero Gold development environment software. Thus, a separate device programmer is not needed. By providing a 3.3V, 500mA regulator and 20-pin connector on the bottom side, the Mini-B USB adapter allows the MRAMulator to be selfpowered and usable when not actually installed in the target hardware. Mini-B USB Adapter The adapter also provides LEDs to indicate successful USB connection, target power, and debug event. In addition, there are test points for current measurement, trigger pulse, and debug event.

4 BoxView Debugger If the MRAMulator is ordered with the real-time trace and timing analysis (RTTA) option, it is shipped with Domain Technologies BoxView real-time debugger. With BoxView, target MRAM can be examined and edited on-the-fly, even while the target processor is accessing the emulated MRAM. Moreover, multiple trigger words can be set and event counters and sequencers configured to capture a trace buffer sample only when the specified triggers have occurred the specified number of times in the specified sequence. In addition, a trigger output can be enabled to pulse on the USB communication adapter pod on each occurrence, which is useful for triggering an external oscilloscope, for example. A separate debug event output is also provided on the adapter, which can be used to force an external reset on the target system. Finally, BoxView comprises a powerful scripting language for test automation that includes automatic data logging/spooling of trace buffer and MRAM to the host computer hard drive on debug event. The MRAMulator's 8-level event sequencer provides a powerful way to look for or ignore specific events occurring in a specific order, which can be used as a complex qualifier for capturing desired data into the trace buffer The MRAMulator's 72-channel, 2-ksample trace buffer traces all 16 address and data lines, OE, WE, WE_ASYN, CS, ERROR, NWI0, NWI1 and a 32-bit time stamp. Set up four, 40-bit trigger words and configure trace control based on 8-level event sequencer, dual 16-bit event counters, immediate, delayed start/stop trace, and/or the four trigger words. Examine, edit emulation MRAM in 16-bit hex, decimal, floating point, and ASCII modes, onthe-fly. Plot any range of emulation MRAM graphically. Data accumulated in emulation MRAM can also be processed and displayed in real-time using the FFT window. The MRAMulator's on-board logic analyzer lets you capture activity in and out of the MRAMulator synchronously or asynchronously at sample rates up to 100MHz.

5 MRAMulator Configured for Honeywell HXNV0100 Emulation Preprogrammed with the HXNV0100 emulator circuit when shipped from the factory, the MRAMulator is guaranteed to work in your system as a temporary HXNV0100 functional replacement. The product comes with the original HXNV0100 emulator design STAPL file used to program the logic inside the device, as well as a standalone STAPL player needed for device programming. Since the FPGA device programmer is built into the MRAMulator, Actel's FlashPro3 device programmer is not needed. To create your own custom designs, simply download from Actel's website its free Libero Gold development environment software. After place and route, create a STAPL file and use Domain Technologies STAPL player GUI to program your custom design into the MRAMulator. The custom design can be converted back into an HXNV0100 emulator by simply playing the original STAPL file using the STAPL player. HXNV0100 MRAMulator Pin Assignments PIN NAME DESCRIPTION 1 NU1 Not used* 2 NU2 Not used* 3 D1 Data bus[1] 4 D0 Data bus[0] 5 CS Chip select 6 NWI0 Write inhibit 0 7 VCCIO 3.3V supply 8 NU8 Not used* 9 GND Ground 10 NWI1 Write inhibit 1 11 ECCDIS Error disable 12 ERROR Error out 13 D8 Data bus[8] 14 D9 Data bus[9] 15 NU15 Not used* 16 GND Ground 17 NU17 Not used* 18 D10 Data bus[10] 19 D11 Data bus[11] 20 D12 Data bus[12] 21 D13 Data bus[13] 22 D14 Data bus[14] PIN NAME DESCRIPTION 23 D15 Data bus[15] 24 GND Ground 25 VCCIO 3.3V supply 26 A7 Address[7] 27 A8 Address[8] 28 A9 Address[9] 29 A10 Address[10] 30 NC30 Not connected 31 NC31 Not connected 32 GND Ground 33 NU33 Not used* 34 GND Ground 35 A11 Address[11] 36 A12 Address[12] 37 A13 Address[13] 38 A14 Address[14] 39 GND Ground 40 NU40 Not used* 41 VCCIO 3.3V supply 42 OE Output enable 43 WE_ASY WE Async. 44 WE Write enable PIN NAME DESCRIPTION 45 A15 Address[15] 46 A6 Address[6] 47 NU47 Not used* 48 NU48 Not used* 49 NU49 Not used* 50 A5 Address[5] 51 A4 Address[4] 52 A3 Address[3] 53 A2 Address[2] 54 A1 Address[1] 55 A0 Address[0] 56 NU56 Not used* 57 NU57 Not used* 58 D7 Data bus[7] 59 D6 Data bus[6] 60 D5 Data bus[5] 61 D4 Data bus[4] 62 D3 Data bus[3] 63 D2 Data bus[2] 64 NU64 Not used* * See Note 4 on last page

6 FPGA-to-MRAMulator Pin Assignments with Example Customized MRAM8051 Design By Physical FPGA Ball Number Example MRAM8051 Pin Assignments PIN FPGA BALL MRAM8051 FUNCTION 1 IOF8 PORT2[7] 2 IOB1 PORT1[0] 3 IOC1 PORT1[1] 4 IOD2 PORT1[2] 5 IOD1 PORT1[3] 6 IOE3 PORT1[4] 7 VCCIO 3.3V supply 8 IOJ1 PORT1[5] 9 GND Ground 10 IOK1 PORT1[6] 11 IOK2 PORT1[7] 12 IOK3 PORT0[0] 13 IOM2 PORT0[1] 14 IOM8 PORT0[2] 15 IOJ9 PORT0[3] 16 GND Ground 17 IOM8 PORT0[4] 18 IOB3 PORT0[5] 19 IOC2 PORT0[6] 20 IOG8 PORT0[7] 21 IOM3 TCK 22 IOL3 TMS PIN FPGA BALL 23 IOM4 TDI 24 GND Ground MRAM8051 FUNCTION 25 VCCIO 3.3V supply 26 IOL4 TDO 27 IOM5 TRSTn 28 IOM6 PORT4[7] AD7 29 IOL6 PORT4[6] AD6 30 NC30 Not connected 31 NC31 Not connected 32 GND Ground 33 IOM7 PORT4[5] AD5 34 GND Ground 35 IOL7 PORT4[4] AD4 36 IOL8 PORT4[3] AD3 37 IOJ11 PORT4[2] AD2 38 IOC9 PORT4[1] AD1 39 GND Ground 40 IOK9 PORT4[0] AD0 41 VCCIO 3.3V supply 42 IOC8 RESETn 43 IOB9 CLKIN 44 IOB7 INT0 PIN FPGA BALL 45 IOE12 INT1 46 IOD11 T0 47 IOD6 T1 48 IOC6 RXD 49 IOD5 TXD MRAM8051 FUNCTION 50 IOD12 PORT3[0] 51 IOC11 PORT3[1] 52 IOC12 PORT3[2] 53 IOA11 PORT3[3] 54 IOA10 PORT3[4] 55 IOA9 PORT3[5] 56 IOB8 PORT3[6] 57 IOA7 PORT3[7] 58 IOB6 PORT2[0] 59 IOA5 PORT2[1] 60 IOB4 PORT2[2] 61 IOA4 PORT2[3] 62 IOC3 PORT2[4] 63 IOA3 PORT2[5] 64 IOE8 PORT2[6]

7 Mechanical Specifications Inches Millimeters Dim. Min. Typ. Max. Min. Typ. Max. A B C D E F G H J K L M N P R T U

8 General MRAMulator Warnings and Notices 1. Do not apply more than 3.6 volts on any pin as voltages greater than this may destroy your MRAMulator and void your warranty. 2. VCCIO must be in the range of 3.0V 3.6V. Internal MRAM Write Inhibit becomes active if VCCIO falls below 2.7V 3.0V. If this happens, a minimum recovery time of 0.5 milliseconds must be observed before attempting to access the MRAMulator's MRAM. 3. If installed in a target system, the MRAMulator will draw its 3.3V VCCIO power from the target, otherwise, 3.3V VCCIO power is supplied by the USB communications adapter. 4. For the purposes of HXNV0100 emulation, having 22 power and ground pins as in the original device seems redundant in terms of pin allocation, so, for the purpose of ASIC emulation, some of these pins (designated Not Used in the HXNV0100 configuration) are available for use as I/O in ASIC configurations if not hard-wired to GND, VCC1, or VCC2 on the original Honeywell 64-pin QFP ceramic package. Ordering Information Part Number MRA3P1000-NRTT MRA3P1000-RTTA MRAM8051-RTL MRAM8051-HNYWASIC MRA3P1000-RTTA-UG MRA3P-PINS Description MRAMulator with Actel A3P1000 installed but without real-time trace and timing analysis package. This unit is re-programmable and upgradeable It is delivered preprogrammed with the HXNV0100 MRAM emulator logic, but without the real-time trace and timing analysis (RTTA) package. It is large enough to implement a customized MRAM8051 or MRAM16 metarisc microcontroller. USB communications adapter, cable, and stand-alone STAPL player for re-programming the device are included. May be upgraded to include the RTTA package and BoxView debugger. The MRA3P1000-NRTT as described above, but with real-time trace and timing analysis (RTTA) upgrade pakage and BoxView real-time debugger. Synthesizable MRAM8051 RTL source code library and license for royalty-free use in the MRAMulator and/or Actel ProASIC3, Axcelerator, and RTAX brand FPGAs. Single-use MRAM8051 license for use in a Honeywell ASIC for use in a single, end application. Advance royalty waived if purchased with MRAM8051-RTL above. Upgrade for MRA3P1000-NRTT giving it the RTTA package and BoxView real-time debugger. MRAMulator pin replacement/installation service. This service may be used to replace damaged or used MRAMulator pins. Contact Information Building III, Suite S. Capital of Texas Highway Austin, TX info@siliconlaude.com SKYPE: siliconlaude 811 E Plano Pkwy Suite 115 Plano, TX info@domaintec.com Copyright 2007, Silicon Laude. All rights reserved. Availability, pricing, and specifications subject to change without notice. Silicon Laude does not warrant that the information contained in this brochure is error free nor shall Silicon Laude become liable for damages of any kind whatsoever arising from anyone's use of such information. MRAM8051, MRAM16, MRAMulator, and metarisc are trademarks of Silicon Laude. All other trademarks are the property of their respective owners.