Access PIN-TIA Receivers for 155 Mb/s and 622 Mb/s EDR 51xx Series

Transcription

1 COMMUNICATIONS COMPONENTS Access PIN- Receivers for 55 Mb/s and 6 Mb/s EDR 5xx Series Applications Single mode 55 Mb/s (EDR 5x) and 6 Mb/s (EDR 55x) ATM receivers Campus network backbone - Add/drop multiplexers - Digital loop carriers - Digital crossconnects - Optical networking Enterprise network backbone Key Features Electro-optical - InGaAs PIN photodiode with silicon transimpedance amplifier - Operate on single supply EDR 5x (5 V) EDR 55x (. V or 5 V) - Three standard pin-out configurations EDR 5xB - single-ended output EDR 5xC - single-ended output with photodiode access EDR 5xD - differential output - Cost effective in receiver designs where sensitivity is limited by the post-amplifier - Shielded pre-amplifier makes it immune to crosstalk with transmitter or to other EMI - -0 to +85 C operating range Packaging - Integrated -pin coaxial package - Connector receptacle (panel or PCB mount) and fiber pigtailed versions - Case grounded versions The EDR 5xx Series incorporates a 75 µm InGaAs PIN photodetector coupled with a low cost BiCMOS transimpedance amplifier () designed to operate at 55 Mb/s (EDR 5x) or 6 Mb/s (EDR 55x). The PIN transduces optical power into current with high efficiency. The converts the current signal into a voltage signal with a very low input noise current contribution. The EDR 5x also integrates an automatic gain control (AGC) circuit which decreases the light to voltage conversion factor when the average incident optical power is relatively high. The EDR 5xx Series are assembled in rugged coaxial packages. They are available with a connector receptacle or as a single mode fiber pigtail. Standard choices for connector receptacles are LC, SC and FC. In addition, the EDR 5xx Series are available in several standard pin-out configurations. The EDR 5xB is the simplest configuration and provides a single ended output. The EDR 5xC provides access to the photodiode current for those customers who need to design an alarm circuit. The EDR 5xD provides a differential output for higher gain performance without sacrifice to sensitivity and bandwidth. NORTH AMERICA: JDSU (578) WORLDWIDE: JDSU WEBSITE:

2 ACCESS PIN- RECEIVERS FOR 55 MB/S AND 6 MB/S Typical Applications The EDR 5xx Series are designed for many applications, including single mode 55 Mb/s (EDR 5x) and 6 Mb/s (EDR 55x) ATM receivers. The EDR 5xx Series exceed Long Reach OC- (EDR 5x) and OC- (EDR 55x) SONET receiver specifications and are ideal for transceiver designs or board level discrete designs. Applications include receivers for digital cross connects, digital loop carriers, add/drop multiplexers, optical network units and switches and routers for LAN and WAN backbones. External Circuitry When designing the EDR 5xx Series into an optical receiver, standard high speed printed circuit board design practices should be observed. For example, bypassing of the power supply is recommended so as to reduce noise that appears at the output of the PIN-. If signal traces are relatively long, use impedance matching techniques to maximize power transfer from the PIN- to its load: for microstrip design, assume 70 ohms (EDR 5x) and 60 ohms (EDR 55x) as the output impedance for the PIN-. Note as well that the output of the PIN- is DC-coupled. Since most applications require AC-coupled stages, a high-q RF chip capacitor should be placed on the output of the module. To eliminate oscillations, the PIN- should be mounted on a circuit board with a large, low impedance ground plane. All the PIN- leads should be made as short as possible in order to reduce excess inductances. As a general rule, receiver bandwidth requirements need only be greater than about / of the bit rate at which they are intended to operate. A receiver for a 55 Mb/s system must have a bandwidth greater than 0 MHz. A receiver for a 6 Mb/s system must have a bandwidth greater than 5 MHz. On the other hand, any frequency component above 0 MHz for 55 Mb/s systems or above 5 MHz for 6 Mb/s systems contributes excess noise to the output. The excess noise needlessly reduces the sensitivity of the receiver. The receiver designer may therefore improve the PIN- sensitivity by placing a low pass noise filter on the output. Performance Highlights The EDR 5x Series offer a sensitivity of better than -6 dbm (EDR 5x) or -0 dbm (EDR 55x) with appropriate filtering and a minimum overload of 0 dbm (EDR 5x) or -7 dbm (EDR 55x). This large dynamic range makes these products ideal for both long and short range applications. A time constant of milliseconds makes the AGC circuit of the EDR 5x models very stable, even during reception of the longest streams of high or low logic levels. The EDR 5x Series operate over -0 to +85 C. The EDR 5x Series provide significant benefits over hybrid designs and -pin receivers. Integration of the with the PIN detector onto the TO-6 header reduces parasitic capacitances and lead inductances. The TO-5 cap hermetically seals the hybrid and provides EMI shielding especially from the transmitter circuit. These advantages improve sensitivity over designs that place the amplifier outside the capsule and away from the detector. The EDR 5x Series, which have four pins, are advantageous over -pin receivers because they require less board space and fewer electrical connections. In addition, the EDR 5xx Series operate from a single power supply, even in the pin-out configuration which provides photodiode current monitoring. The smaller form factor and the need for a single power supply make the EDR 5x Series a less expensive, high performance alternative to other kinds of optical receivers.

3 ACCESS PIN- RECEIVERS FOR 55 MB/S AND 6 MB/S Dimensions Diagram (Specifications in mm unless otherwise noted. ) EDR 5xx RSC-DM EDR 5xx RSC-FM TOP VIEW () Thru Holes.0 diameter TOP VIEW () Thru Holes.0 diameter Leads (0. O.D. Typ.).5 Typ.. diameter EDR 5C EDR 55C EDR 5B.5 diameter.5 diameter EDR 5D EDR 55B EDR 55D.5 Typ..0 Leads (0. O.D. Typ.) EDR 5C.5 diameter EDR 55C.5 diameter EDR 5B EDR 5D EDR 55B EDR 55D Note: Critical dimensions meet NTT specifications. Other dimensions subject to revision. Note: Critical dimensions meet NTT specifications. Other dimensions subject to revision. EDR 5xx RLC EDR 5xx RFC. TOP VIEW diameter holes with.0 diameter counterbore.5 deep M8 x diameter Typ 9.6 Leads (0. O.D. Typ.) EDR 5B EDR 55B.5 Typ..5 diameter EDR 5C EDR 55C EDR 5D EDR 55D 9.50 Radius Leads (0. O.D. Typ.).5 diameter 7.5 EDR 5B EDR 55B Pin circle.5 diameter EDR 5C EDR 5D EDR 55C EDR 55D EDR 5xx TL EDR 5xx FJS with Bracket Option.5 Typ.. Optimum point for fiber coupling power Diameter o Diameter Typ. 0.9 O.D. Fiber.9 Bottom View.5 Diameter 6.0 EDR 5 B EDR 5 C EDR 5 D EDR 55 B EDR 55 C EDR 55 D Two. diameter thru holes.7 Leads (0.5 O.D. Typ.).0 MB- bracket Leads (0.5 O.D. Typ.).5 Typ.

4 ACCESS PIN- RECEIVERS FOR 55 MB/S AND 6 MB/S Electrical Schematics EDR 5B, EDR 55B EDR 5C, EDR 55C EDR 5D, EDR 55D Vcc V pd V cc Vcc Pin Output Output Pin Output Output B, GND (Case) GND (Case) GND (Case) Access to photodiode current is provided. Differential output is provided. Typical Low Pass Noise Filter Design for 55 Mb/s and 6 Mb/s EDR 5B, EDR 55B +V cc PIN - NOISE FILTER 0 µf 0. µf hv L 0. µf V out C C EDR 5C, EDR 55C +V cc PIN - NOISE FILTER 0 µf 0. µf L 0. µf hv V out C C 00-K Ω V PD +5V 0 µf 0. µf EDR 5D, EDR 55D +V cc PIN - NOISE FILTER 0 µf 0. µf L 0. µf hv C C 0. µf V out L V out B Model L L C C EDR 5B 50 nh - 7 pf 7 pf EDR 5C 50 nh - 7 pf 7 pf EDR 5D 0 nh 0 nh 8 pf 8 pf EDR 55B nh - 0 pf 0 pf EDR 55C nh - 0 pf 0 pf EDR 55D 0 nh 0 nh 5.6 pf 5.6 pf

5 ACCESS PIN- RECEIVERS FOR 55 MB/S AND 6 MB/S 5 EDR 5x Specifications (VCC = +5 V,TA = 5 C, RL = 50 Ω (AC coupled),λ = 00 nm.all specifications without connector.) Parameter EDR 5B EDR 5C EDR 5D Gain Minimum 5 V/mW 5 V/mW 5 V/mW Typical 0 V/mW 0 V/mW 5 V/mW Bandwidth Minimum 0 MHz 0 MHz 0 MHz Typical 00 MHz 00 MHz 00 MHz Sensitivity Typical -8.0 dbm -8.0 dbm -8.5 dbm Maximum -6.0 dbm -6.0 dbm -6.5 dbm Overload Minimum 0 dbm 0 dbm 0 dbm Typical dbm dbm dbm Output resistance Typical 70 Ω 70 Ω 70 Ω Maximum output voltage Typical 00 mvpk-pk 00 mvpk-pk 800 mvpk-pk AGC time constant Typical 000 µs 000 µs 000 µs AGC threshold Typical µw µw µw. Measured at 00 MHz.. BER of E-0, 0 MHz noise filter. EDR 55x Specifications (VCC = +. V,TA = 5 C, RL = 50 Ω (AC coupled),λ = 00 nm.all specifications without connector.) Parameter EDR 55B EDR 55C EDR 55D Gain Minimum.7 V/mW.7 V/mW.0 V/mW Typical. V/mW. V/mW.0 V/mW Bandwidth Minimum 5 MHz 5 MHz 5 MHz Typical 500 MHz 500 MHz 500 MHz Sensitivity Typical -.5 dbm -.5 dbm -.5 dbm Maximum -0.0 dbm -0.0 dbm -.0 dbm Overload Minimum - dbm - dbm - dbm Maximum -.0 dbm -.0 dbm -.0 dbm Output resistance Minimum 5 Ω 5 Ω 5 Ω Typical 60 Ω 60 Ω 60 Ω Maximum 75 Ω 75 Ω 75 Ω Maximum output voltage Maximum 500 mvpk-pk 500 mvpk-pk 950 mvpk-pk. Measured at 00 MHz.. BER of E-0, 5 MHz noise filter.

6 ACCESS PIN- RECEIVERS FOR 55 MB/S AND 6 MB/S 6 EDR 5x DC Electrical Characteristics and Maximum Ratings Parameter Minimum Typical Maximum Supply voltage (VCC).5 V 5.0 V 5.5 V Output offset voltage.9 V. V.5 V Diff. output offset voltage - 80 mv - Supply current (ICC) - 5 ma 50 ma Dark current - - na Optical input power mw Operating temperature -0 C - 85 C Storage temperature -0 C - 85 C Photodiode voltage (Vpd) V - 5 V. Applies to EDR 5D only.. Applies to EDR 5C only. EDR 55x DC Electrical Characteristics and Maximum Ratings Parameter Minimum Typical Maximum Supply voltage (VCC).0 V./5.0 V 5.5 V Output offset voltage -.0/.7 V - Diff. output offset voltage - mv - Supply current (ICC) ma 5/5 ma 50 ma Dark current na Optical input power mw Operating temperature -0 C - 85 C Storage temperature -0 C - 85 C Photodiode voltage (Vpd) V - 5 V. Applies to EDR 55D only.. Applies to EDR 55C only.

7 ACCESS PIN- RECEIVERS FOR 55 MB/S AND 6 MB/S Ordering Information For more information on this or other products and their availability, please contact your local JDSU account manager or JDSU directly at JDSU (578) in North America and JDSU worldwide or via at customer.service@jdsu.com. Sample: EDR 5C FJS LC EDR Code Speed 55 Mb/s 5 6 Mb/s Code B C D PIN- Single-ended output with case connected to ground Access to photodiode current with case connected to ground With differential output voltage Code TL FJS RLC RFC RSC-DM RSC-FM Package Transistor ouline with lensed cap Single mode (900 µm) fiber jacket LC receptacle FC receptacle with -hole flange SC receptacle, dual-mount (panel & board) SC receptacle, front-mount (panel only) Code LC FC/SPC SC/SPC Connector (FJS only) LC connector FC/SPC connector SC/SPC connector Code Bracket (FJS only) 0 No bracket MB MB- bracket Precautions for Use ESD protection is imperative. Use of grounding straps, anti-static mats, and other standard ESD protective equipment is required when handling or testing an InGaAs PIN or any other junction photodiode. Fiber pigtails should be handled with less than 0 N pull and with bending radius greater than inch. Soldering temperature of the leads should not exceed 60 C for more than 0 seconds. All statements, technical information and recommendations related to the products herein are based upon information believed to be reliable or accurate. However, the accuracy or completeness thereof is not guaranteed, and no responsibility is assumed for any inaccuracies. The user assumes all risks and liability whatsoever in connection with the use of a product or its application. JDSU reserves the right to change at any time without notice the design, specifications, function, fit or form of its products described herein, including withdrawal at any time of a product offered for sale herein. JDSU makes no representations that the products herein are free from any intellectual property claims of others. Please contact JDSU for more information. JDSU and the JDSU logo are trademarks of JDS Uniphase Corporation. Other trademarks are the property of their respective holders. 006 JDS Uniphase Corporation. All rights reserved Rev /06 EDR5XX.DS.CC.AE NORTH AMERICA: JDSU (578) WORLDWIDE: JDSU WEBSITE: