Detailed Design Review

Transcription

1 Detailed Design Review Hybrid Audio Dynamics Processor Team Lead: William Sender Jeffrey Auclair Bryan Beatrez Michael Ferry 1 Agenda Problem Definition Problem Statement Customer Requirements Engineering Requirements System Design Functional Decomposition System Architecture 2 1

2 Agenda Detailed Design Embedded Design Design Software Design Auto-Mode BOM Risk Assessment MSD II Plan 3 Section One Problem Definition 4 2

3 Problem Statement Audio amplitude control for motion picture shows. Maintain the quality and dynamics of the sound. Improve flexibility while maintaining audio quality. Maintain usability that of previous devices. 5 Customer Requirements 6 3

4 Engineering Requirements 7 Section Two System Design 8 4

5 Functional Decomposition 9 System Architecture 10 5

6 Section Three Detailed Design 11 Embedded Design LQFP1000 Block Net Pin Number Pin Name Pin Type ADC Audio In 1 23 PA0 I/O TTa I/O Struct. Alternative Functions Additional Functions USART2_CTS, TIM2_CH1_ETRTIM8_BKIN, TIM8_ETR,TSC_G1_IO1, COMP1_OUT, EVENTOUT ADC1_IN1, COMP1_INM, RTC_ TAMP2, WKUP1, COMP7_INP ADC Audio In 2 24 PA1 I/O TTa USART2_RTS, TIM2_CH2, TSC_G1_IO2, TIM15_CH1N, RTC_REFIN, EVENTOUT ADC1_IN2, COMP1_INP, OPAMP1_VINP, OPAMP3_VINP ADC GND 20 VSSA/VREF- S - Analog Ground/Negative Reference Voltage ADC 3V3 21 VREF+ S - Postitive Reference Voltage ADC 3V3 22 VDDA S - Analog Power Supply Bypass Relay_1 1 PE2 I/O FT Bypass Relay_2 2 PE3 I/O FT TRACECK, TIM3_CH1, TSC_G7_IO1, EVENTOUT - TRACED0, TIM3_CH2, TSC_G7_IO2, EVENTOUT

7 Embedded Design Block Net Pin Number Pin Name I/O Pin Type Struct. Alternative Functions Additional Functions Rotary & Back A~C 38 PE7 I/O TTa TIM1_ETR, EVENTOUT ADC3_IN13, COMP4_INP Rotary & Back B~C 39 PE8 I/O TTa TIM1_CH1N, EVENTOUT COMP4_INM, ADC34_IN6 Rotary & Back PB 40 PE9 I/O TTa TIM1_CH1, EVENTOUT ADC3_IN2 Rotary & Back BB 41 PE10 I/O TTa TIM1_CH2N, EVENTOUT ADC3_IN14 Display I2C_D 76 PA14 I/O FTf Display I2C_C 77 PA15 I/O FTf I2C1_SDA, USART2_TX, TIM8_CH2,TIM1_BKIN, TSC_G4_IO4, SWCLK-JTCK, EVENTOUT I2C1_SCL, SPI1_NSS, SPI3_NSS, I2S3_WS, JTDI, USART2_RX, TIM1_BKIN, TIM2_CH1_ETR, TIM8_CH1, EVENTOUT Embedded Design Block Net Pin Num. Pin Name Pin Type I/O Struct. Alternative Functions Additional Functions DAC CH1_CV 29 PA4 I/O TTa DAC CH2_CV 30 PA5 I/O TTa SPI1_NSS, SPI3_NSS, I2S3_WS, USART2_CK, TSC_G2_IO1, TIM3_CH2, EVENTOUT SPI1_SCK, TIM2_CH1_ETR, TSC_G2_IO2, EVENTOUT ADC2_IN1, DAC1_OUT1, OPAMP4_VINP, COMP1_INM, COMP2_INM, COMP3_INMCOMP4_INM, COMP5_INMCOMP6_INM,COMP 7_INM ADC2_IN2, DAC1_OUT2, OPAMP1_VINP, OPAMP2_VINM, OPAMP3_VINP COMP1_INM, COMP2_INM, COMP3_INMCOMP4_INM, COMP7_INMCOMP5_INMCOMP6 _INM, PWM CH1_MU G 71 PA12 I/O FT USART1_RTS, USB_DP, CAN_TX, TIM1_CH2N, TIM1_ETR, TIM4_CH2, TIM16_CH1, COMP2_OUT, EVENTOUT - PWM CH2_MU G 91 PB5 I/O FT SPI3_MOSI, SPI1_MOSI, I2S3_SD, I2C1_SMBA, USART2_CK, TIM16_BKIN, TIM3_CH2, TIM8_CH3N, TIM17_CH1, EVENTOUT

8 Embedded Design Timer Use Counter Resolution TIM6 DAC Trigger Generation 16-bit TIM7 DAC Trigger Generation 16-bit TIM16 Make Up Gain 1 PWM 16-bit TIM17 Make Up Gain 2 PWM 16-bit TIM1 Attack/Release Timer 32-bit 15 Embedded Design (Clk Tree) - External Crystal 24 Mhz - System Clock 72 Mhz - Make-up gain timers: Tim 16,17 (16-bit) - DAC timers: 6, 7 (16-bit) - Attack and release timer: Tim 1 (32-bit) - 12-bit SAR ADC: ADC1_IN1, ADC1_IN2 - SYSclk divided by 64 results in the desired sample rate. 16 8

9 Embedded Design Net Pin Number Pin Name Pin Type I/O Struct Alternate Functions Additional Functions 3V3 1 VBAT S - Backup Power Supply OSC 12 PF0- OSC_IN I/O FTf TIM1_CH3N, I2C2_SDA OSC_IN OSC PF1-13 OSC_OUT I/O FTf I2C2_SCL OSC_OUT SW 14 NRST I/O RST Device reset input / internal reset output (active low) 3V3 28 VDD_4 S GND 49 VSS_2 S - Digital Ground 3V3 50 VDD_2 S - Digital Power Supply GND 74 VSS_3 S - Ground 3V3 75 VDD_3 S - Digital Power Supply SW 94 BOOT0 I B Boot Memory Selection GND 99 VSS_1 S - Ground 3V3 100 VDD_1 S - Digital Power Supply 17 Current calculations for power supply design 18 9

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11 21 Top Level Design Each block is a detailed subsystem 22 11

12 Schematic for simulation

13 Input Section Takes balanced differential audio input and creates debalanced signal Also provides BPF 25 Precision Rectifier Allows rectification of signal while combating diode non-idealities (Forward drop, recovery time) 26 13

14 Gain Control Section Allows for signal to be attenuated via CV- signal and gained up via CV+ signal. VCA is a current in/current out device that requires a transimpedance output section 27 Output Line Driver Capable of driving 600 Ohm output with 6dB of gain Output DC common mode protect RFI protection and surge protection 28 14

15 LPF Filter Design 29 Anti-aliasing LPF Provides accurate sampled signal Chebyshev Design with 0.26dB ripple 20kHz 49kHz 30 15

16 Monte-Carlo Analysis 31 Microcontroller It s fast, which is cool It likes having capacitors nearby 32 16

17 Takes 3.3V signals from the microcontroller and converts them to 5V. Same in either direction. 33 Relays provide true bypass Diode protected 34 17

18 Software Top-Level 35 Software Main Function 36 18

19 Software choosecompress (Attack) 37 Software choosecompress (Release) 38 19

20 Software Compression 39 Software AutoMode Params 40 20

21 Software Pseudo Code Break from powerpoint to show pseudo code 41 Auto Mode Auto mode block diagram: 42 21

22 Auto Mode Successive algorithm -The active low enable refers to the idea that you would only need to improve your compression settings if gain reduction was occurring in the safety compression block. 43 Auto Mode Safety Mode - When auto mode is initialized this all the signal conditioning that occurs. - Safety mode is a limiter to the incoming signal, +3dbu threshold 20:1 ratio. - It also helps balance the system by feeding back compression data

23 Auto Mode (Improved Compression Settings) 45 Auto Mode (Improved Compression Settings) - The improved compression will be developed from the product of each sample exceeding the safety compression threshold and how much it is exceeded by. (Sample Value - Threshold) X (# of Samples Exceeding Threshold) = Offset - This offset will be added to the index of an array containing improved compression settings. - It is important to note that in the event the above product is very small the offset will slowly make the compression settings less aggressive in order to not over compress. - the offset will also be scaled appropriately for the array of improved compression settings

24 Bill of Materials Componet Price Componet Price Power Supply $40.97 Rectifier $6.00 Level Shift $0.940 VCA $16.92 MCU $16.82 Output Stage $26.10 Relays $9.78 LPF $6.04 Input Stage $3.24 Chasis $87.90 $ Bill of Materials Break from powerpoint to show full Bill of Materials 48 24

25 Risks 49 MSDII Plan Week 1 -Finish unfinished business from MSDI -Get micro working with prototype board Weeks 2-5 -Layout PCB -Start prototyping code -Populate PCBs 50 25

26 MSDII Plan Weeks 6-9 -Test software -Test hardware -Machine the enclosure Weeks Qualitative Tests -Create poster -Iterate until satisfied 51 Questions? 52 26