C4 C9, C12 C18. Maxim Integrated Products 1

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1 General Description The LD module is an assembled and tested PC board intended for use with Maxim s low-voltage dataacquisition evaluation kits (V kits). The module uses Motorola s MCLFN microcontroller (µc) to collect data samples using the SPI interface. It requires an IBM PC computer and an external DC power supply of +V to +V, or as specified in the appropriate V kit manual. Maxim s LD module allows customers to evaluate selected Maxim products. It is not intended to be a microprocessor development platform, and Maxim does not support such use. Getting Started All system components are guaranteed by their various manufacturers over the +V to +.V power-supply range. Not all system components are guaranteed over the entire.v to V V DD power-supply adjustment range. Verify correct operation using the following procedures: ) Connect a +V DC power source (V max) to the µc module at the terminal block located next to the on/off switch, in the upper-right corner of the µc module. Turn the power switch on. ) Connect a cable from the computer s serial port to the µc module. If using a -pin serial port, use a straight-through, -pin, female-to-male cable. If the only available serial port uses a -pin connector, a standard -pin to -pin adapter is required. ) Start the evaluation kit software on the IBM PC. When the program asks which port the µc module is connected to, press the space bar until the correct port is highlighted, and then press NTR. The software will be in terminal-emulation mode. (If using a generic terminal-emulation program instead of Maxim V kit software, select 00 baud, eight-bit character, no parity, one stop bit. Send a space character to start the monitor program.) ) Adjust trim potentiometer R for the desired V DD supply voltage. Measure V DD between test point TP and ground. The mounting hole next to R is grounded. ) To verify correct system operation, press the SC key, type a capital T, and then select the countdown memory test. If the memory test fails or any other malfunction is reported, the V DD voltage is too low; increase V DD and repeat from step. ) Turn the power switch off and connect the µc board to an appropriate Maxim V kit board. Component List DSIGNATION C, C C C C, C C C0, C J J J JU, JU L R R R R R R SW SW U U U U U U0 U U U U U0 Y QTY DSCRIPTION pf ceramic capacitors 0.0µF ceramic capacitor 0.µF ceramic capacitors µf, 0V tantalum capacitors N00 diode 0-pin, right-angle header -circuit terminal block DB right-angle socket Open Light-emitting diode 0MΩ, % resistor 00kΩ potentiometer kω, % resistor kω, % resistor 00Ω, % resistor 0kΩ SIP resistor pack, pin common Slide switch Momentary push-button switch Motorola MCLFN Maxim MAXCS Maxim MAXCSA k x static RAM -pin socket Motorola MCM0DJ -pin socket HCT Maxim MAX0RCSA HC HC V, k x ROM MHz crystal Maxim Integrated Products For free samples & the latest literature: or phone For small orders, phone

2 Detailed Description Power Requirements The LD module draws its power from a user-supplied power source connected to terminal block J. Note the positive and negative markings on the board. Nominal input voltages should be between +V and +V. The input current requirement for the LD module is typically 0mA plus the current drawn by the evaluation kit (V kit). The V DD supply is set by U, a MAX low-dropout CMOS regulator. Trim potentiometer R sets the supply voltage, with an adjustment range of approximately.v to V. Although the board is designed primarily for V applications, all of the circuitry is rated to withstand V levels. LD Microcontroller (µc) Module Hardware U is Motorola s LD µc. Contact Motorola for µc information, development, and support. A MAX0R supervisory circuit on the module monitors the V DD logic supply, generates the power-on reset, and produces a reset pulse whenever the manual reset button (SW) is pressed. Note that the MAX0R resets the CPU if the supply voltage falls below.v. The module provides kbytes of external CMOS static RAM (U). The HCT octal buffer (U) provides access to an eight-bit port on the 0-pin interface connector. This memory-mapped port consists of Intel-compatible read and write strobes, four chip selects, four address LSB's, and eight data bits. Table lists the address ranges for each of the memory-mapped elements on the LD module. The MAX is a V-powered, RS- interface voltage-level shifter. Its built-in charge pump uses external capacitors to generate the output voltages necessary to drive RS- lines. The 0 x -pin header (J) connects the LD module to a Maxim V kit. Table lists the function of each pin. Use the LD module only with V kits that are designed to support it, and download only code that is targeted for the Maxim LD module. Downloading incorrect object code into the LD module will produce unpredictable results. The k x boot ROM (U0) checks the system and waits for commands from the host. Refer to the V kit manual for specific startup procedures. Software All software is supplied on a disk with the V kit. Software operating instructions are included in the V kit manual. Serial Communications J is an RS- serial port, designed to be compatible with the IBM PC -pin serial port. Use a straight-through DB male-to-female cable to connect J to the IBM PC serial port. If the only available serial port has a -pin connector, use a standard -pin to -pin adapter. Table shows J s pinout. The hardware-handshake lines are used by the evaluation software to confirm that the V kit is connected to the correct serial port. Table. Serial Communications Port J PIN NAM DCD RXD TXD DTR DSR RTS CTS None FUNCTION Handshake; hard-wired to DTR and DSR RS--compatible data output from LD module RS--compatible data input to LD module Handshake; hard-wired to DCD and DSR Signal ground connection Handshake; hard-wired to DCD and DTR Handshake; hard-wired to CTS Handshake; hard-wired to RTS Unused

3 Table. 0-Pin Data-Connector Signals PIN,, NAM V++ V DD WR CS0 CS CS CS ADDR0 ADDR ADDR ADDR DB0 DB DB P/IC PA/IC PA/IC PA/IC/OC PA/OC PA/OC PA/OC PA/OC/PAI MISO MOSI SCK RSRVD SS FUNCTION Ground Unregulated input voltage V DD from on-board MAX regulator Read strobe Write strobe Chip select for 000-FFF Chip select for 000-FFF Chip select for 00-AFFF Chip select for B000-BFFF Address bit 0 (LSB) Address bit Address bit Address bit Data bus bit 0 (LSB) Data bus bits bit 0 (LSB) MSB SPI master-in, slave-out SPI master-out, slave-in SPI serial clock Reserved for factory use System -clock output SPI slave-select input Table. Memory Map ADDRSS RANG (HX) 0000-FFF 000-FFF 000-FFF 00-AFFF B000-BFFF C000-C0F C00-C0FF C00-CFFF 00-F 0-DFFF 000-FFFF FUNCTION User RAM area (U) xternal chip-select 0 (J pin ) xternal chip-select (J pin ) xternal chip-select (J pin ) xternal chip-select (J pin ) Unused Internal RAM (U) Unused Internal register area (U) Unused Boot ROM (U0)

4 0 0 0 J- DTR J- TXD J- RXD J- DSR J- DCD J- J- RI 0 DD VOUT LBI VIN LBO VST SHDN PFO NC RST RST V CC RST MR PFI U MAX 0.µF 0.µF 0.µF C C C 0.µF C 0.µF C C- C+ C- C+ V+ V- T T R R J- CTS J- RTS P PA PA PA PA PA PA PA PC0 PC PC PC PC PC PC PC PD/AS D D D D D D AS P/IN PA/IN PA/IN PA/IN/OUT PA/OUT PA/OUT PA/OUT PA/OUT/PULS ACCIN P/RXD P/TXD PD/MISO PD/MOSI PD/SCK PD/ PB0 PB PB PB PB PB PB PB A A A A A A A RXD TXD MISO RST XIRQ IRQ MOSI SCK SS RST XIRQ/VPP IRQ/C PD/SS 0 MODA/LIR MODB/VSTBY MODA MODB XTAL XTAL J SW N00 C0 µf 0V C µf 0V VPRRG.V R k % R 00k R k % U MAX U MCLFN U MAX0R V CC TXD RXD C 0.0µF C 0.µF C pf C pf R 0M Y.00MHz, POWR CONNCTIONS U C 0.µF SW RST Figure. Schematic Diagram

5 0 0 A A A A A A A A A A A A DQ0 DQ DQ DQ DQ DQ DQ DQ D D D D D D A A A A A A A A A A A A D D D D D D A A A A A A A A A A A A A A A A A A A A AS D D D D D D IOBUFFR CS-XXX CSXXX CSXXX CSAXXX CSBXXX U0 LV k x ROM 0 PGM VPP O C CS-XXX 0 A A A A A A A A A A A A A I/0 I/ I/ I/ I/ I/ I/ I/ U x STATIC RAM 0 CS O W A WR 0 WR A UA UB UC UD DATA-XXX C 0.µF C 0.µF C 0.µF C 0.µF C 0.µF UB HC U HC Y0 Y Y Y A A A IOBUFFR UA HC Y0 Y Y Y A A A 0 O C D D D D D D Q0 Q Q Q Q Q Q Q 0 POWR CONNCTIONS 0 U U U U U0 Figure. Schematic Diagram (continued)

6 XT XT XTD XTD XTD XTD XTD XTD D D D D D D C 0.µF R 00Ω U HCT O DIR A A A A A A A A B B B B B B B B 0 0 U L RA 0k XIRQ IRQ RB 0k MODA RC 0k MODB 0k 0 MODA MODB R 0k RH 0k RI 0k JU JU J- J- J- J- J-0 J- J- J- J- J-0 J- J- J- J- J-0 J- J- J- J- J-0 J- J- J- J- J- J- J- J- J- J- J- J- J- J- J- J- J- J- J- J- VPRRG WR CSXXX CSBXXX A A XT XTD XTD XTD PA/IN PA/IN/OUT PA/OUT PA/OUT/PULS ACCIN MOSI VPRRG CSXXX CSAXXX A XT XTD XTD XTD P/IN PA/IN PA/OUT PA/OUT MISO SCK RSRVD SS RF 0k RG 0k SS IOBUFFR Figure. Schematic Diagram (continued)

7 Figure. Component Placement Guide Figure. PC Board Layout Component Side

8 Figure. PC Board Layout Solder Side Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 0 San Gabriel Drive, Sunnyvale, CA Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.