DFI Lanparty DK P55-T3eH9 BIOS Setting Guideline

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Rafe Gallagher
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1 DFI Lanparty DK P55-T3eH9 BIOS Setting Guideline (BIOS version: 2009/8/25) V001 Pressing DEL at DK P55-T3eH9 LOG screen to login BIOS setup screen BIOS setup screen

Genie BIOS settings: This setup thread is combined all needed settings for over clocking (CPU speed setting, CPU features, DRAM timings, Voltage settings and PCI speed etc.

2 Genie BIOS settings: This setup thread is combined all needed settings for over clocking (CPU speed setting, CPU features, DRAM timings, Voltage settings and PCI speed etc.) OC Fail Retry Counter: Enable / Disable System will try to boot again when boot fail after, if it boots fail still, system will go back default settings to boot. CPUFSB Frequency: 133~500Mhz Ratio CMOS Setting: 9~24 CPU multiplier setting, it depends on processors maximum range. Intel Speed Step Tech: Enable / Disable; Power management function. Intel Turbo ModeTech: Enable / Disable; CPU turbo mode multiplier Boot-up CPU base clock: 133~500Mhz This function can help you out for setting a lower boot up clock. As a buffer, when your FSB is tweaked too high in the beginning. The process will to be: system boot up with Boot-up clock first, after that it will change to your highest FSB. QPI Frequency:Auto / 4.27GT, 4.8GT DRAM Frequency:Auto / 800, 1066, 1333, 1600MHz Configure DRAM Timing by SPD:Enable / Disable This item for opening DRMA Timing selections, Disable it you will be able to into timing page to manual settle down DRAM timing.

CPU Configuration: Max CPUID Value Limit: Enable / Disable ; Max CPUID Value Limit for XP Intel Virtualization Tech: Enable / Disable ; Enable to have Intel VT tech for Virtual AP Execute Disable Bit

3 CPU Configuration: Max CPUID Value Limit: Enable / Disable ; Max CPUID Value Limit for XP Intel Virtualization Tech: Enable / Disable ; Enable to have Intel VT tech for Virtual AP Execute Disable Bit Capability:Enable / Disable; Intel virus protection to prevent Buffer Overflow attack. Intel HT Technology:Enable / Disable; Enable to delivers thread-level parallelism on each processor Active Processor Cores:All, one core left or 2 core left; number of cores to enable in processor Intel C-STATE tech: Enable / Disable; Power and thermal management in the Intel Core Duo processor. C state Package Limit setting: Auto / C1, C3, C6,C7 C3 State:Disable / ACPI C2, ACPI C3 C6 State:Enable / Disable C1 Auto Demotion: Enable / Disable C3 Auto Demotion: Enable / Disable Note: Power and thermal management in the Intel Core Duo processor. 03_power_management.htm

Precharge timing for memory data by each command cycle RAS# to CAS# Delay (trcd):auto, 3~15clocks; RAS (Row

4 DRAM Timing: CAS Latency Time (tcl):auto, 3~15 clocks; CAS (Column signal) latency time RAS# Precharge (tras):auto, 9~63 clocks; Minimum timing of a command working cycle Precharge Delay (trp):auto, 3~15 clocks; Precharge timing for memory data by each command cycle RAS# to CAS# Delay (trcd):auto, 3~15clocks; RAS (Row signal) to CAS (Column signal) delay for read/write command Write to PRE Delay (twr):auto, 3~31 clocks; Write recovery timing

REF to ACT Delay (trfc):auto, 15~255 clocks; Minimum timing to reflash a ROW at same storage block Rank Write to Read (twtr):auto, 4~31 clocks; delay write to read command for memory chips ACT to ACT

5 REF to ACT Delay (trfc):auto, 15~255 clocks; Minimum timing to reflash a ROW at same storage block Rank Write to Read (twtr):auto, 4~31 clocks; delay write to read command for memory chips ACT to ACT Delay (trrd):auto, 4~15 clocks; delay read to read command for memory chips Read CAS# Precharge (trtp):auto, 4~15 clocks; Read command to precharge delay Four ACT WIN Time (tfaw):auto, 15~63 clocks; Four-Act-Windows specified the rolling tfaw windows during which no more 4banks in an 8-banks. DRAM Command Rate:1N, 2N, 3N selections Round Chip Lantency(Ch0):- 0~15 / + 0~15 clocks Round Chip Lantency(Ch0): - 0~15 / + 0~15 clocks Voltage control:

O.C. Shut Down Free:Enable / Disable O.C.S.D.F CPU Voltage:1.

6 O.C. Shut Down Free:Enable / Disable O.C.S.D.F CPU Voltage:1.0000~2.0000V Load line:voltage drop rage control Super VID: Off / On; Ignore VID will fix Vcore in EIST or CxE mode, Watch VID will run dynamic VID for EIST or CxE mode CPU VTT Voltage:

DRAM Voltage: DDR3 Terminal Voltage:+ 0.150~- 0.

600V DDR3 Channel A Data Vref: + 0.150~- 0.600V CPU Channel A Vref: + 0.

7 DRAM Voltage: DDR3 Terminal Voltage: ~ V DDR3 Channel A Address Vref: ~ V DDR3 Channel A Data Vref: ~ V CPU Channel A Vref: ~ V DDR3 Channel A Address Vref: ~ V DDR3 Channel A Data Vref: ~ V CPU Channel A Vref: ~ V

Auto Save bootable setting: Enable / Disable For saving last fine/ bootable parameters by BIOS itself every time Load last bootable: For

To define the resource of parameters for bank saving. User define setting bank #1 ~ #4: 1.

8 BIOS Reloaded function: DFI Lan Party series are providing 1last fine status + 4 user s profile space for doing BIOS setting saving and recovery. Auto Save bootable setting: Enable / Disable For saving last fine/ bootable parameters by BIOS itself every time Load last bootable: For loading last BIOS parameters. Save setting to bank with: Current settings or last saved CMOS settings. To define the resource of parameters for bank saving. User define setting bank #1 ~ #4: 1. Bank Description: There are 4 rows for writing a short description. Double click on row when this row is empty, it will erase pervious data. 2. Save to this bank: Press Yes to save data to this bank 3. Load from this bank: Press Yes to load data of this bank to be current BIOS setup settings. 4. Hotkey =>: define the hotkey for a quick change BIOS settings to boot (0~9 Hotkeys). End

28x 29x 30x [ 24x] 3.20GHz ( 133x24) CPU Clock Ratio CPU Frequency. CPU Host Clock Control [ Enable] CPU Host Frequency ( MHz ) 133

28x 29x 30x [ 24x] 3.20GHz ( 133x24) CPU Clock Ratio CPU Frequency. CPU Host Clock Control [ Enable] CPU Host Frequency ( MHz ) 133 Intel Core i7 is a brand new architecture featuring the QPI bus which replaces the FSB bus. So, how does this affect overclocking? The Core i7 processor s frequency is Bclk * CPU multiplier. For ex. Intel