Revisiting Virtual Memory for High Performance Computing on Manycore Architectures: A Hybrid Segmentation Kernel Approach
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1 Revisiting Virtual Memory for High Performance Computing on Manycore Architectures: A Hybrid Segmentation Kernel Approach Yuki Soma, Balazs Gerofi, Yutaka Ishikawa 1
2 Agenda Background on virtual memory Design & Implementation of the hybrid segmentation kernel approach Evaluation Related Work Conclusion & Future Work 2
3 Two Types of Virtual Memory Paging Segmentation Completely ignored today! Is Paging Really Better? 3
4 Cost of paging is high Paging degrades performance Accounts for 50% of execution time [McCurdy et al., 08] Paging costs energy Accounts for 3-14% of CPU core power [Sodani, 11] It will get higher in the future! Emergence of data-centric workloads [Ranganathan, 11] Manycore trend -> TLB shootdown Invalidation of TLBs by software to keep TLBs consistent Over 10% (tens of cores) at some app.s [Romanescu et al, 10] 4
5 Usage of Segmentation in x86 Physical Address Space a segment from register pa va 5
6 Usage of Segmentation in x86 Physical Address Space Code Data Stack 6
7 Agenda Background on virtual memory Design & Implementation of the hybrid segmentation kernel approach Evaluation Related Work Conclusion & Future Work 7
8 Hybrid Approach Our Approach: Mix the two mechanisms Paging/Segmentation can be set at each core independently in x86 Segmentation kernel is too small to handle all system calls Delegation process Paging kernel HPC application System call offloading Segmentation kernel Many-core CPU (e.g., Xeon Phi) 8
9 Memory mapping Contiguous spaces are reserved as segments For the segmentation kernel and applications Also for the communication between the two kernels Other parts are used only by paging kernel Used by segmentation kernel Physical Address Space Contiguous space Can also be accessed by paging kernel Used by paging kernel 9
10 Delegation Program Executed at paging cores Deploys the application to segmentation kernel Waits for system call offloading Application (parameter) Delegation process Paging kernel Segmentation kernel Many-core CPU (e.g., Xeon Phi) 10
11 Flow Chart of Execution Paging kernel Start of delegation process Segmentation kernel Reserve and mmap() physical ranges of app. wait Deploy application Executing application wait time 11 CPU core X CPU core Y
12 Flow Chart of Execution Paging kernel Segmentation kernel Delegate system call Perform system call Return wait time wait wait Notify exit restart 12 CPU core X CPU core Y
13 Advantage Completely eliminates paging cost Page walk (address translation) cost Overhead to TLB shootdown TLB power consumption OS kernel can still use paging features Implementation is not so difficult We can use system call handlers in paging kernel s code 13
14 Limitation Limitation of segmentation (for applications) We can t change the size of (data) segment Internal memory fragmentation No access control (only read/write for data segment) Characteristics of applications are important No too complicated memory (de)allocation patterns No need of access control 14
15 Restrictions of Implementation We had to use 32 bit mode! Segmentation is not fully supported in x86 s 64 bit mode 32-bit segmentation kernel & 64-bit paging kernel Memory usage 4GB Currently few system calls are supported e.g. neither fork() nor clone() are supported 15
16 McKernel Used as the paging kernel (running on one core) A light-weight kernel for manycore architecture Developed by U-Tokyo, RIKEN AICS, Hitachi, NEC, and Fujitsu Running with the help of host Linux Program execution on McKernel through host Linux System call delegation to host Linux Linux McKernel IKC IKC: Inter Kernel Communication IHK: Interface for Heterogeneous Kernels IHK Host CPU IHK Xeon Phi 16
17 Two system calls added to McKernel These are called by the delegation process init_core() 1. Boot segmentation cores 2. Reserve & mmap() contiguous address space load_core() (the main part of delegation process) 1. Load the binary of the application into the reserved area 2. Start the application and wait 3. Perform delegated system calls 4. Exit when the application exits 17
18 Agenda Background on virtual memory Design & Implementation of the hybrid segmentation kernel approach Evaluation Related Work Conclusion & Future Work 18
19 Evaluation RandomAccess in the HPC Challenge benchmark Our Approach vs. McKernel with 4K/2MB pages Codes are almost equivalent at binary level Graph500 Our Approach vs. MPSS Linux with 4K/2MB pages Codes are very different at binary level Of course the same source code i.e. maximum load/store size, special instructions Both of them are executed on single thread 19
20 4K 8K 16K 32K 64K 128K 256K 512K 1M 2M 4M 8M 16M 32M 64M 128M 256M 512M 1G 2G Relative performance of segmentation better RandomAccess 200% 190% 180% 170% 160% 150% 140% 130% 120% 110% 100% 90% to 2MB to 4kB 20 Memory size
21 Relative performance of segmentation (BFS search) better Graph % 180% 170% 160% 150% 140% 130% 120% 110% 100% 90% 80% 70% 60% 50% to 2MB (MPSS Linux) to 4kB (MPSS Linux) Graph SCALE (size = 2^SCALE)
22 Agenda Background on virtual memory Design & Implementation of the hybrid segmentation kernel approach Evaluation Related Work Conclusion & Future Work 22
23 Related Work Direct segment [Basu et al, 13] New hardware to combine paging and segmentation They only give performance estimation FusedOS [Park et al, 12] Applications run on a light-weight kernel with system call offloading to Linux Not address the TLB issues Other research on paging Not eliminate paging cost completely 23
24 Agenda Background on virtual memory Design & Implementation of the hybrid segmentation kernel approach Evaluation Related Work Conclusion & Future Work 24
25 Conclusion Hybrid kernel approach on manycore architecture Most cores are in segmentation, some cores are in paging Applications runs over segmentation System call offloading to paging kernel It gets 81% (4KB page) and 9% (2MB page) improvement compared to a OS based on paging Graph500 We encourage hardware designers to consider full support of segmentation in x86 64-bit mode! 25
26 Future Work Support for multi-threading Evaluation in terms of OS noise Reduction of OS noise -> performance predictability? 26
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