Compile your code using ncvhdl. This is the way to compile comp_const.vhd:! "#$ %" #&'

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1 Tools: This short document describes the most basic knowledge needed to perform verification using Specman and NCSim. If you encounter any errors, problems or feel something is missing, don't hesitate to contact me via and I will correct / expend this booklet. Compiling VHDL code using ncvhdl The first step is to compile your VHDL code. Place all your.vhd files in a single directory (we ll call it base_dir). Within base_dir create two subdirectories called worklib and temp_lib: Copy hdl.var and cds.lib to base_dir: Compile your code using ncvhdl. This is the way to compile comp_const.vhd:! "#$ %" #&' A good compilation result should look something like this: In case there are errors, the compiler will fail with an appropriate message. Below is an example of a compilation error (all because of an extra ';'):

2 In case your code includes assertions, add the flag '(' to the ncvdhl activation command To compile a Vunit, add '()*) +' to the ncvdhl activation command For example: )! "#$%"#&' Elaborating VHDL using ncelab: Elaboration is similar to the linkage process. To elaborate, use ncelab. As parameters, the entity and architecture must be specified. In the example below, comp_tb is the entity and comp_tb_arch is the architecture. Note the use of worklib: it is the same directory specified as the WORKLIB in the compilation process., -! "#$ A good elaboration result should look something like this:

3 Since we've implemented the entity only once (for each entity there is only one available architecture), default binding occurs (i.e., the architecture is linked to the entity). If this is not the case, 'configuration' must be used (which is beyond the scope of our course)

4 Running NCSim in standalone mode: In case you want to run NCSim in standalone mode (i.e., you have a test bench / test written in VHDL) use:./, Where the entity and architecture are as described before NCSim's GUI looks like this: Where the window on the bottom right is a console. Aside from transferring control to Specman (which is detailed in a different section), the console is redundant. You can browse through your design's hierarchy be expanding its level (left mouse click on the '+' sign). Your top most entity is the one without name. On the right hand side of the window, the signals and variables of the instantiation you've chosen (by left mouse click) are shown:

5 Synchronous processes are marked with a clock-like symbol (like the sdu's PROCESS_001 in the snapshot above), asynchronous processes are marked with a backslash symbol. In order to view signals in the waveform viewer, choose the signals you want (you can choose several signals using ctrl and shift like in Windows), press the right mouse click and choose the 'Send To waveform' option:

6 Once in the waveform viewer, use the buttons circled in red (in the snapshot below) to start / pause / reset the simulation, and the buttons circled in yellow to zoom in / zoom out and scroll right and left to the area you want to inspect. Typically, when you first run the simulation, you have to zoom out a lot until the scale is reasonable. Every time you make a change in your VHDL code, you have to go through the entire process again (compiling, elaborating, simulation), you can't reload the design again. One of the things I found useful was to save the waveform configuration. To do so, choose File -> Save command script (in any of the windows). Then, when you rerun NCSim, simply choose File -> Source Command Script to return to your previous configuration.

7 Running Specview in standalone mode: Before running Specview / Specman, make sure your.cshrc includes the following line: / 0/ Specview is Specman with a gui. To run it, simply type: When Specview loads, you will this GUI: The GUI is divided to five relevant parts: Menus at the top Shortcut buttons below the menus Main window Command line and 'Specman' button The 'ready' bar at the bottom right corner To load your files, you can use either: File (menu) -> Load The Load shortcut button Use the command (like in the snapshot above. Note that the '.e' extension is not needed) Specman loads files in an incremental way, meaning that in case new files are loaded, they are loaded "on top" of the previously loaded files. This could be a problem if you want to run a different test (i.e., run test1 and later test2). A common reason for that is

8 that Specman thinks you've declared the same data member twice, like in the example below: To avoid that, use the 'restore' button (or write restore in the command line). This will reset Specman to its original state (no files loaded). By pressing the 'Modules' button you can see which files Specman loaded by now.

9 By selecting a file and pressing the 'Source' button (in the 'Modules' window) you can see the actual file itself. This is useful for placing break points and watches for debugging. Note that you cannot place a breakpoint over static code (i.e., constraints). Pressing the 'Test' button will cause the generator to run, and instantiate all the units and structs you've used (i.e., wrote 'is instance' for unit, or placed as data member for structs), at the end of the test phase, run() is called (again, for each unit and struct). In case you want to run the test phase with a random seed, select 'Test with random seed' in the 'Test' menu. Every time you generate with a given seed, you'll get the same results. In case you wish to generate with a specific seed (say 1234) type: in the command line. After the test phase, you can browse through the allocated units and structs by pressing the 'sys' button. Aside from 'logger' which is a predefined member of 'sys, you will see your hierarchy on the left side, along with fields, event, method, list items, and the location in source code where the indicated unit / struct was declared

10 The '() Methods' tab in the right window is a good place to look at in case you suspect you had a loading order problem. You can see the 'status' of the method, and if you choose it, the source file of the latest loaded version will be displayed in the bottom right part.

11 To view your test's coverage, press the 'Coverage' shortcut button. A separate window will open. This window has two parts: on the left hand side, you'll see all the coverage groups you've defined, along with the predefined ones. There's a group called session.events, this group contains a coverage item for each event defined in your test bench (this group can be used to debug your events). Beside each group name there will be a red / yellow / green bar indicating the amount of coverage for that group. You can extend the group to view its items. Choosing an item will cause its coverage data to appear on the window's right hand side, this way you can locate your coverage holes. In the snapshot below, you can see that within the packet_payload_size item, the 'MINIMAL' value has not been covered

12 Sometime, coverage groups will be grayed-out (like the payload_actual_size group in snapshot below). Typically, this is due to the number of "buckets" required for this item. Specman collects coverage based on buckets: in the snapshot above, packet_payload_size has five possible values, so Specman allocates five buckets for it. However, the payload_actual_size item is based on a struct data member which is a six-bit uint, so 2 6 buckets are needed. Specman has a configuration parameter defining the maximal amount of buckets to allocate per item. In case this number is exceeded, the item is grayed-out, and the actual values covered are displayed in gray.

13 There are two ways to fix this problem: 1. Group values into buckets we will learn how to do this in the tutorials 2. Add the following line somewhere in your tests bench (in the test or in the coverage file would be best): 6.7 / 897 ).8: 6 /:5; 3 1 9< =< =< The lines above will enable Specman to allocate 1024 buckets per item

14 Running specman with NCSim: Before running Specman together with NCSim, a 'stubs' file must be created. The 'stubs' file is composed of two main elements: Basic stuff needed for Specman to "talk" to NCSim Specman can use VHDL / Verilog code written in the test bench this code is also written to the 'stubs' file To create the 'stubs' file, load Specman / Specview and type in the command line: / Specman should responds with $! "#/ Exit Specman and verify a file named specman_nc.vhd was created. Compile the 'stubs' file:! "#$ %"#&' Your top level architecture must include a linkage element to Specman, this will typically look like the following lines within the top architecture: < ), /0 %89. &, < (The '..' is not a part of the code) Compile and elaborate your design (as explained in the previous sections) Set an environment variable: %"&? A"&B/C;2#"$C5 Create an executable: This should take a while but should end with the line: D 0 Finally, to actually load Specman with NCSim together type:./a% &E5;;;;;; ).,).! "#$

15 where worklib is the directory used with the work flag during compilation, frag_tb is the top entity and frag_tb_arch is the top architecture (you can get those from the end of the elaboration process they should be written in the last line ncelab writes) Even though most of the steps need to be done once, this process is notoriously fragile: you might skip one of the steps or have a typo in one of your flags, and it would all seem alright until the last step. Errors in the process usually results in one of three problems: Specman + NCSim simply won't run Specman runs, and immediately you'll get the "Specman exited without a 'quit' command" message Both Specman and NCSim load, but when you'll try to transfer control (explained below), it won't work (sometimes NCSim alerts of a segmentation fault) If any of the above occurs, simply start the process all over again. I recommend spending some time on writing a script for this, and modifying it until you get it right. When Specman and NCSim load, you'll see both GUIs together: Initially, NCSim has control. That's why Specman's command line is grayed out. To transfer control to specman, type in NCSim's console. To transfer control from Specman to NCSim, press the 'Specman' button on the left of the command line. Work with NCSim and Specman is mostly as described before (in the standalone sections). The typical process of running a test looks like: 1) NCSim has control 2) Arrange the signals you want to look at in a waveform viewer a. In case you want to rerun a test, reset simulation

16 3) Transfer control to Specman 4) Load the test a. In properly constructed environments, the test imports the rest of the test bench, so loading a single file should be enough 5) Press the 'Test' button (or test-with-random-seed ) 6) Transfer control back to NCSim 7) Press the 'play' button to activate simulation 8) Something in your test bench should cause the simulation to stop (either an error found, or the test ended). At this stage, NCSim has control. 9) Do post simulation things: review the signals, coverage, etc. Note: in case you try to do things in Specman / NCSim while the other has control, the tool might not comply to your requests (even zooming in / out at the waveform viewer) Note: when rerunning a test, NCSim must be reset before Specman s test phase Running in batch mode: Create a file called batch.ecom (this file includes the commands Specman will execute once it loads). Place the following lines in the file: )./6 4< FA A&%< 5< 4 < Where the third line contains the location of the test you d like to run Create a file called batch.cmd (this file includes the commands NCSim will execute once it loads). Place the following lines in the file: /< 6< Finally, to run simulation: GH I A % &E 5;;;;;; 3,3! "#$ Note: All the general step which are needed to run with GUI are required (i.e., creating ncvhdl_specman, setting CDS_INST_DIR )