Software. Hardware. x86 basics. ISA View. a brief history of x86 10/6/15. Program, Application. Programming Language. Compiler/Interpreter

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1 x6 basics ISA context and x6 history Translation: Compile C à machine code Disassemble machine code x6 Basics: isters Data movement instructions Memory addressing modes Arithmetic instructions 1 Software Hardware next few weeks past few weeks Program, Application Programming Language Compiler/Interper Operating System Instruction Set Architecture Microarchitecture Digital Logic Devices (transistors, etc.) Solid- State Physics ISA View a brief history of x6 CISC (vs. RISC) CPU PC isters Addresses Data Memory... Word Size 16 ISA First Year 06 Intel First 16- bit processor. Basis for IBM PC & DOS 1MB address space Condition Codes Instructions Heap Static Data (Global) (String) Literals Instructions OS Data 20 now: 2015: most laptops, desktops, servers. 20 soon: 32 6 IA32 Intel First 32- bit ISA. Flat addressing, improved OS support x6-6 AMD Opteron 2003* Slow AMD/Intel conversion, slow adoption. *Not actually x6-6 until few years later. Mainstream only after ~10 years. 5 1

2 Turning C into Machine Code Code in files p1.c p2.c Compile with command: gcc -O1 p1.c p2.c -o p Use basic optimizations (-O1) Put resulting machine code in file p text text binary binary C program (p1.c p2.c) Compiler (gcc -S) Asm program (p1.s p2.s) Assembler (gcc or as) Object program (p1.o p2.o) Linker (gcc or ld) Executable program (p) Static libraries (.a) C Code int sum( int x, int y) { int t = x+y ; urn t; code.c compiler gcc -O1 -S code.c Generated IA32 Assembly Code Human- readable language close to machine code. sum: pushl movl %es p,%eb p movl ( ), addl (% ebp), movl %eb p,%es p popl %eb p code.s assembler Object Code Linker: create full executable Resolve references between object files, libraries, (re)locate data code.o 6 7 Disassembling Object Code (objdump) code.o Disassembled by objdump <_su m>: 0: 5 5 push 1: 9 e5 mov, Disassembler 3: b 5 0c mov 0xc( ), objdump -d p 6: add 0x( ), 9: 9 ec mov, b: 5 d pop c: c 3 Disassembling Object Code (gdb) Object 0x0100 : 0x55 0x9 0xe5 0xb 0x5 0x0c 0x03 0x5 0x0 0x9 0xec 0x5d 0xc3 Disassembled by GDB 0x0100 <sum >: push %eb p 0x0101 <sum +1>: mov %es p,%eb p 0x0103 <sum +3>: mov 0xc ( ), 0x0106 <sum +6>: add 0x ( ), 0x0109 <sum +9>: mov %eb p,%es p 0x010b <sum +11>: pop %eb p 0x010c <sum +>: Within gdb debugger gdb p disassemble sum (disassemble function) x/13b sum (examine the 13 bytes starting at sum)

3 Integer isters (IA32) Origin (mostly obsolete) accumula te Integer isters (historical artifacts) high/low bytes of old 16- bit registers %ax %ah %al accum ulat e general purpose counter data source destinat ion stack general purpose %cx %dx %bx %si %di %sp %bp %ch %dh %bh %cl %dl %bl count er data sourc e desti nati on stack 32- bits wide bit virtual registers (backwards compatible) 15 IA32: Three Basic Kinds of Instructions 1. Data movement between memory and register Load data from memory into register %reg = Mem[address] Store register data into memory Mem[address] = %reg 2. Arithmetic on register or memory data c = a + b; z = x << y; i = h & g; 3. Control flow to choose what instruction to execute next Unconditional jumps to/from procedures Conditional branches Remember: memory is ed just like an array[] of bytes! Data movement instructions movx Source, Dest x is one of {b, w, l movl Source, Dest: Move - byte long word movw Source, Dest: Move 2- byte word movb Source, Dest: Move 1- byte byte historical terms from the 16- bit days not the current machine word size

4 Data movement instructions movl Source, Dest: Operand Types: Immediate: Literal integer data Examples: $0x00, $-533 Encoded with 1, 2, or bytes ister: One of integer registers Examples:, and reserved for special use Others have special uses for particular instructions Memory: consecutive bytes of memory at address given by register Simplest example: () Various other address modes movl Operand Combinations movl Source Dest Src,Dest C Analog Imm Mem Mem Mem movl $0x, movl $-17,() movl, movl,() movl (), var_a = 0x; *p_a = -17; var_d = var_a; *p_d = var_a; var_d = *p_a; Cannot do memory- memory transfer with a single instruction. How would you do it? Basic Memory Addressing Modes Using Basic Addressing Modes Indirect (R) Mem[[R]] ister R specifies the memory address movl (), Displacement D(R) Mem[[R]+D] ister R specifies a memory address (e.g. the start of some memory region) Constant displacement D specifies the offset from that address movl (), void swa p(int *xp, int *yp){ int t0 = *xp; int t1 = *yp; *xp = t1; *yp = t0; swap: pushl movl, pushl movl (), movl (), movl (), movl (), movl,() movl,() movl -(), movl, popl Set Up Body Finish 23 2

5 Understanding Swap void swa p(int *xp, int *yp) { int t0 = *xp; int t1 = *yp; *xp = t1; *yp = t0; ister Value yp xp t1 t0 register <- > variable mapping lower addresses higher addresses 0 - movl ( ), movl (% ebp), movl (),% eax movl (),% ebx movl %ea x,() movl %eb x,() yp xp Return addr Old Old # ecx = yp (in memory) # edx = xp # eax = *yp (t1) # ebx = *xp (t0) # *xp = eax # *yp = ebx 25 Understanding Swap 0x10 movl ( ), movl (% ebp), movl (),% eax movl (),% ebx movl %ea x,() movl %eb x,() yp xp # ecx = yp 0x0 0x Return addr # edx = xp # eax = *yp (t1) # ebx = *xp (t0) # *xp = eax # *yp = ebx Address 0x 0x0 0x11c 0x11 0x11 0x110 0x10c 0x10 0x10 0x100 lower addresses higher addresses 26 Complete Memory Addressing Modes Memory addresses can be computed in several different ways. Most General Form: D(Rb,Ri,S) Mem[[Rb] + S*[Ri] + D] D: Constant displacement value represented in 1, 2, or bytes Rb: Base register: Any register Ri: Index register: Any except ; unlikely S: Scale: 1, 2,, or (why these numbers?) Special Cases: can use any combination of D, Rb, Ri and S (Rb,Ri) Mem[[Rb]+[Ri]] (S=1,D=0) D(Rb,Ri) Mem[[Rb]+[Ri]+D] (S=1) (Rb,Ri,S) Mem[[Rb]+S*[Ri]] (D=0) Address Computation Examples ister contents Addressing modes 0xf000 (Rb,Ri) Mem[[Rb]+[Ri]] D(,Ri,S) Mem[S*[Ri]+D] 0x100 (Rb,Ri,S) Mem[[Rb]+S*[Ri]] D(Rb) Mem[[Rb] +D] Address Expression Address Computation Address 0x() (,) (,,) 0x0(,,2)

6 leal Src,Dest Uses load effective address Src is address mode expression Set Dest to address computed by expression Example: leal (,,), DOES NOT ACCESS MEMORY Computing addresses, e.g.,: translation of p = &x[i]; Computing arithmetic expressions of the form x + k*i k = 1, 2,, or!!! Arithmetic Operations Two- operand instructions: Format Computation addl Src,Dest Dest = Dest + Src subl Src,Dest Dest = Dest Src argument order imull Src,Dest Dest = Dest * Src shll Src,Dest Dest = Dest << Src a.k.a sall sarl Src,Dest Dest = Dest >> Src Arithmetic shrl Src,Dest Dest = Dest >> Src Logical xorl Src,Dest andl Src,Dest Dest = Dest ^ Src Dest = Dest & Src orl Src,Dest Dest = Dest Src No distinction between signed and unsigned int (why?) except arithmetic vs. logical shift right 0 1 Arithmetic Operations One- operand (unary) instructions incl Dest Dest = Dest + 1 increment decl Dest Dest = Dest 1 decrement negl Dest Dest = -Dest negate notl Dest Dest = ~Dest bitwise complement See CSAPP for more: mull, cltd, idivl, divl leal for arithmetic (IA32) int arit h(int x,int y,in t z){ int t1 = x+ y; int t2 = z+ t1; int t3 = x+ ; int t = y * ; int t5 = t3 + t; int rv al = t2 * t 5; urn rval ; arith: pushl movl %es p,%eb p movl (% ebp), movl ( ), leal (,), leal (%e dx,%e dx,2), sall $, addl 16( ), leal (% edx,% eax),% eax imull, movl %eb p,%es p popl %eb p Set Up Body Finish 2 3 6

7 Understanding arith (IA32) Observations about arith int arit h(int x, in t y, int z){ int t1 = x+ y; int t2 = z+ t1; int t3 = x+ ; int t = y * ; int t5 = t3 + t; int rv al = t2 * t 5; urn rval ; 16 0 z y x Rtn adr Old int arit h(int x, in t y, int z){ int t1 = x+ y; int t2 = z+ t1; int t3 = x+ ; int t = y * ; int t5 = t3 + t; int rv al = t2 * t 5; urn rval ; Instructions in different order from C code Some expressions require multiple instructions Some instructions cover multiple expressions Same x6 code by compiling: (x+y+z)*(x++*y) movl (% ebp), # eax = x movl ( ), # edx = y leal (,), # ecx = x+y (t1) leal (%e dx,%e dx,2), # edx = y + 2 *y = 3 *y sall $, # edx = *y (t) addl 16( ), # ecx = z+t1 (t2) leal (% edx,% eax),% eax # eax = +t+ x (t5) imull, # eax = t5*t2 (rval ) movl (% ebp), # eax = x movl ( ), # edx = y leal (,), # ecx = x+y (t1) leal (%e dx,%e dx,2), # edx = y + 2 *y = 3 *y sall $, # edx = *y (t) addl 16( ), # ecx = z+t1 (t2) leal (% edx,% eax),% eax # eax = +t+ x (t5) imull, # eax = t5*t2 (rval ) Another Example (IA32) int logi cal(int x, int y){ int t1 = x^ y; int t2 = t1 >> 17 ; int ma sk = (1<<13 ) - 7; int rv al = t2 & m ask; urn rval ; logical: pushl movl %es p,%eb p movl (% ebp), xorl ( ), sarl $17, andl $1 5,%e ax movl %eb p,%es p popl %eb p Set Up Body Finish movl (% ebp), # eax = x xorl ( ), # eax = x^y sarl $17, # eax = t1>>1 7 andl $1 5,%e ax # eax = t2 & 15 y x Rtn adr 0 Old %e bp 9 7