EC 333 Microprocessor and Interfacing Techniques (3+1)

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1 EC 333 Microprocessor and Interfacing Techniques (3+1) Lecture /88 Microprocessor Programming (Data Movement Instructions) Dr Hashim Ali Spring 2018 Department of Computer Science and Engineering HITEC University Taxila

2 Data Movement Instructions Machine Language Construction (with reference to MOV instruction) Topic covers the following instructions:- - PUSH / POP - Load-Effective Address (LEA, LDS, LES) - String Data Transfer (LODS, STOS, MOVS) - XCHG, XLAT - IN and OUT 2

3 Machine Instructions Machine language is the native binary code that the microprocessor understands and uses as its instructions to control its operation. - instructions vary in length from 1 to 13 bytes Over 100,000 variations of machine language instructions. - there is no complete list of these variations Instructions for the 8086 are 16-bit mode instructions in Real Mode (DOS) as shown figure. 3

4 The Opcode 1 st Byte Selects the operation (addition, subtraction, etc.,) performed by the microprocessor. - Either 1 or 2 bytes long for most instructions The general form of the first opcode byte of many instructions (not all) contains:- - First 6 bits of the first byte are the binary opcode - Remaining 2 bits indicate the direction (D) of the data flow, and indicate whether the data are a byte or a word (W) 4

5 Direction (D) Bit - If the direction bit D = 1, data flow to the register REG field from the R/M field located in the second byte of an instruction. - If the D-bit = 0 in the opcode, data flow to the R/M field from the REG field. Word (W) Bit - If the W-bit = 1, the data size is a word or double-word. - If the W-bit = 0, the data size is always a byte. The W-bit appears in most instructions, while the D-bit appears mainly with the MOV and some other instructions. 5

6 MOD-REG-R/M 2 nd Byte Byte 2 of many machine language instructions, showing the position of the MOD (Mode), REG (Register), and R/ M (Register/Memory) fields. 6

7 MOD Field Specifies addressing mode (MOD) and whether a displacement is present with the selected type. - If MOD field contains an 11, it selects the register-addressing mode - Register addressing specifies a register instead of a memory location, using the R/M field If the MOD field contains a 00, 01, or 10, the R/M field selects one of the data memory-addressing modes. Example: - MOV AL, [DI] ; Instruction with no displacement - MOV AL, [DI+2] ; Instruction with 8-bit displacement (+2) - MOV AL, [DI+1000H] ; Instruction with 16-bit displacement (+1000H) 7

8 All 8-bit displacements are sign-extended into 16-bit displacements when the processor executes the instruction. - if the 8-bit displacement is 00H 7FH (positive), it is sign-extended to 0000H 007FH before adding to the offset address - if the 8-bit displacement is 80H FFH (negative), it is sign-extended to FF80H FFFFH - Example: What is the effective address generated by the following instruction: MOV [DI-8], BL (Assume DS=200H and DI=30H) - Solution: The negative displacement is combined with the DI register. Notice that although the DI register points to address 30H within the data segment, the actual location accessed is 8 bytes behind (at 28H). Some assembler programs do not use the 8-bit displacements and in place default to all 16- bit displacements. For example, JUMP instruction can cause the next instruction to be fetched from anywhere in the current code segment. - A positive displacement usually means jump ahead in the program, and - A negative displacement usually means jump backward in the program. 8

9 Register Assignments Below tables shows the register assignments for the REG field and the R/M field (MOD 11). - This table contains three lists of register assignments: one is used when the W bit 0 (bytes), and the other two are used when the W bit 1 (words). REG and R/M when MOD = 11 9

10 Example: - Suppose a 2-byte instruction, 8BECH appears in a machine language program. In 16-bit mode, this instruction is converted to binary and placed in the instruction format of byte 1 and 2 as shown below. Solution: - Opcode = = MOV instruction - D = 1 Transfer to register (REG) - W = 1 Word moves into destination register specified in the REG field - MOD = 11 R/M is a register - REG = 101 BP, so the MOV instruction moved data into register BP - R/M = 100 SP, as MOD (11) is R/M - So, 8BECH is a MOV BP, SP instruction. 10

11 R/M Memory Addressing If the MOD field contains a 00, 01, or 10, the R/M field takes on a new meaning. 16-bit R/M Memory Addressing Modes 11

12 Example: - Suppose a 2-byte instruction, 8A15H appears in a machine language program. In 16-bit mode, this instruction is converted to binary and placed in the instruction format of byte 1 and 2 as shown below. Solution: - Opcode = = MOV instruction - D = 1 Transfer to register (REG) - W = 0 Byte moves into destination register specified in the REG field - MOD = 00 No displacement - REG = 010 DL, so the MOV instruction moved data into register DL - R/M = 101 DS:[DI] - So, 8A15H is a MOV DL, DS:[DI] instruction. 12

13 Example: - What will happen if instruction of previous example changes to MOV DL, DS:[DI + 1]? Solution: - First 2 bytes of the instruction remains the same, and 1-byte displacement will be added representing 01H. - Opcode = = MOV instruction - D = 1 Transfer to register (REG) - W = 0 Byte moves into destination register specified in the REG field - MOD = 01 8-bit displacement - REG = 010 DL, so the MOV instruction moved data into register DL - R/M = 101 DS:[DI] - And, the instruction becomes 8A5501H instead 8A15H. 13

14 Special Addressing Mode 3 rd and/or 4 th Byte A special addressing mode occurs when memory data are referenced by only the displacement mode of addressing for 16-bit instructions. Examples are the MOV [1000H],DL and MOV NUMB,DL instructions. - First instruction moves contents of register DL into data segment memory location 1000H. - Second moves register DL into symbolic data segment memory location NUMB. 14

15 When an instruction has only a displacement, MOD field is always 00; R/M field always You cannot actually use addressing mode [BP] without a displacement in machine language If the individual translating this symbolic instruction into machine language does not know about the special addressing mode, the instruction would incorrectly translate to a MOV [BP], DL instruction. 15

16 Example With Displacement The MOV [1000H], DL instruction uses the special addressing mode. - The bit-pattern required to encode the instruction in machine language is shown:- 16

17 Example Without Displacement The MOV [BP], DL instruction converted to binary machine language is shown:- - A 3 bytes instruction with a displacement of 00H 17

18 An Immediate Instruction 5 th and/or 6 th Byte An example of a 16-bit instruction using immediate addressing. - MOV WORD PTR [BX+1000H],1234H moves a 1234H into a word-sized memory location addressed by sum of 1000H, BX, and DS x 10H 6-byte instruction - 2 bytes for the opcode; 2 bytes are the displacement of 1000H; 2 bytes are the data of 1234H Figure (next slide) shows the binary bit pattern for each byte of this instruction. 18

19 Example: - MOV WORD PTR [BX+1000H], 1234H instruction converted to binary machine language. 19

20 Segment MOV Instructions If contents of a segment register are moved by MOV, PUSH, or POP instructions, a special bits (REG field) select the segment register. - the opcode for this type of MOV instruction is different for the prior MOV instructions - an immediate segment register MOV is not available in the instruction set To load a segment register with immediate data, first load another register with the data and move it to a segment register. 20

21 Example: - MOV BX, CS instruction converted to binary machine language. An immediate segment register MOV (e.g. MOV DS, 1000H) is not available in the instruction set. To load a segment register with immediate data, first load another register with the data and then move it to a segment register. - MOV - MOV DS, AX 21

22 PUSH Instructions PUSH instruction always transfers two byte of data to the stack. The source of data may be any internal 16-bit register, immediate data, any segment register or, any two bytes of memory data. Whenever data are pushed onto the stack, the first (most-significant) data byte moves to the stack segment memory location addressed by SP-1. The second (least significant) data byte moves into the stack segment memory location addressed by SP-2. 22

23 PUSHA - PUSHA (Push All) instruction copies the registers to the stack in the following order:- AX, CX, DX, BX, SP, BP, SI and DI The value for SP that is pushed onto the stack is whatever it was before the PUSHA in the stack. PUSHF - PUSHF (Push Flag) instruction copies the contents of the flag register to the stack. 23

24 POP Instructions POP instruction performs the inverse operation of a PUSH instruction. The POP instruction removes data from stack and places it into the target 16-bit register, segment register or, 16-bit memory location. The least significant byte of data is removed from SP and most significant byte is removed from stack segment memory location addressed by SP+1. 24

25 POPA - POPA (Pop All) instruction removes 16 bytes of data from stack and places them into the following registers, in the order:- DI, SI, BP, SP, BX, DX, CX and AX POPF - The POPF (Pop Flag) instruction removes 2-byte number from the stack and places it into the flag register. 25

26 Problem PUSH/POP An assembly language program is given below, where assume that, SS=2000H and SP=2009H; Flag register, F=FFCDH. MOV AX, 7645H MOV BX, 4477H MOV CX, 8899H MOV DX, BX PUSH DX PUSH AX PUSH BX PUSHF POP CX PUSH 1000H POP DX POP AX Find Out: a) The physical address. b) The final value of SS and SP after the end of program. c) The value of AX, BX, CX, DX and Flag register F after the end of program. d) Draw the memory map in details. 26

27 Solution PUSH/POP a) Physical Address = SS*10+SP = 2000* = 22009H b) Final value of SS = 2000H and SP = current SP no. of PUSH*2 + no. of POP*2 = *2+3*2 = 2005H Instructions MOV AX, 7645H MOV BX, 4477H MOV CX, 8899H MOV DX, BX PUSH DX PUSH AX PUSH BX PUSHF POP CX PUSH 1000H POP DX POP AX Operation AX = 7645H BX = 4477H CX = 8899H DX = 4477H SP = 2007H SP = 2005H SP = 2003H SP = 2001H CX = FFCDH, SP = 2003H SP = 2001H DX = 1000H, SP = 2003H AX = 4477H c) AX = 4477H BX = 4477H CX = FFCDH DX = 1000H F = FFCDH 27

28 Load-Effective Address LEA - The LEA instruction loads a 16-bit register with offset address of the data specified by the operand. Example: LEA BX, [DI] ; the operand address [DI] is loaded into the register BX, not the contents of address [DI]. - By comparing LEA with MOV, we observe that LEA BX, [DI] loads the offset address specified by [DI] (content of DI) into BX register; MOV BX, [DI] loads the data stored at the memory location addressed by [DI] into register BX. 28

29 LDS - The LDS instruction load any 16-bit register with an offset address and DS segment register with a segment address. Example: LDS BX, [DI] ; Loads DS and BX with 32- bit content of data segment memory location [DI]. LES - The LES instruction load any 16-bit register with an offset address and ES segment register with a segment address. Example: LES BX, [DI] ; Loads ES and BX with 32- bit content of data segment memory location [DI]. 29

30 Operation of LDS BX, [DI] Instruction 30

31 String Data Transfer Before discussing string data transfer instructions we should know the followings:- Direction flag: - Direction flag selects auto-increment (D=0) or the auto-decrement (D=1) operation for the DI and SI registers during string operations. - CLD clears D flag (D=0) ; i.e. CLD selects auto-increment mode. - STD set D flag (D=1); i.e. STD selects auto-decrement mode. DI and SI: - DI offset address accesses data in the extra segment for all string instructions. - SI offset address accesses data, by default, in the data segment. 31

32 LODS / LODSB / LODSW String Data Transfer The LODS (Load String) instruction loads AL or AX with data stored at the data segment offset address index by the SI register. (i.e. It loads contents of memory pointed by DS:[SI] into AL or AX.) After loading AL with a byte or, AX with a word, the content of SI increment, if D=0; or decrement if D=1. The LODSB (loads a Byte) instruction causes a byte to be loaded into AL. The LODSW (loads a Word) instruction causes a word to be loaded into AX. 32

33 Example LODSB ; AL=DS: [SI] ; SI=SI+1 (if D=0) or SI=SI-1 (if D=1) LODSW ; AX=DS: [SI]; SI=SI+2 (if D=0) or, SI=SI-2 (if D=1) 33

34 STOS / STOSB / STOSW String Data Transfer The STOS (Store string) instruction stores AL or, AX at the extra segment memory location addressed by the DI register. (i.e. The content of AL or AX stored to memory pointed by ES:[DI]) The STOSB (stores a byte) instruction stores the byte in AL at the extra segment memory location addressed by DI. The STOSW (stores a word) instruction stores AX in the extra segment memory location addressed by DI. Example: - STOSB ; ES:[DI]=AL ; DI=DI+1 (if D=0), DI=DI-1 (if D=1) - STOSW ; ES:[DI]=AX ; DI=DI+2 (if D=0), DI=DI-2 (if D=1) 34

35 Move String Data Transfer MOVS instruction transfers a byte or, word from the data segment location addressed by SI to the extra segment location addressed by DI. This is only memory-to-memory transfer allowed in the 8086 microprocessor. As with the other string instructions, addresses are incremented or decremented checking the status of direction flag. Examples: - MOVSB ; ES:[DI]=DS:[SI], DI=DI±1, SI=SI±1 (byte transferred) - MOVSW ; ES:[DI]=DS:[SI], DI=DI±2, SI=SI±2 (word transferred) 35

36 XCHG and XLAT XCHG - XCHG (exchange) instruction exchanges the contents of a register with the content of any other register or memory location. - The XCHG instruction can not exchange segment register or, memory to memory data. - Example: XCHG AX, BX ; Exchanges the content of AX with BX XCHG [DI], AL ; Exchanges the content of memory location [DI] with AL XLAT - The XLAT (translate) instruction converts of the AL register into a number stored in a memory table. - This instruction performs the direct table lookup technique often used to convert one code to another. - An XLAT instruction first adds the contents of AL to BX to form a memory address within the data segment. It then copies the content of this address into AL. - This is the only instruction that adds an 8-bit number to a 16-bit number. 36

37 Example XLAT Suppose that a seven-segment LED (Common cathode) display lookup table is stored in memory at address TABLE. The XLAT instruction then uses the lookup table to translate the BCD number in AL to a seven-segment code in AL. 37

38 IN and OUT IN and OUT instruction performs I/O operation. An IN instruction transfers data from an external I/O device into AL or AX; an OUT transfer data from AL or AX to an external I/O device. Two-forms of I/O device (port) addressing exist for IN and OUT: fixed port and variable port addressing. Fixed-port addressing allows data transfer between AL or AX, using an 8-bit I/O port address. It is called fixed-port addressing because the port number follows the immediate addressing. Variable port addressing allows data transfer between AL or AX and a 16-bit port address stored in DX. It is called variable port addressing because I/O port address stored in DX, which can be change (varied) during execution of a program. Example: - IN AL, 89H ; 8 bits are input to AL from I/O port 89H (fixed port addressing) - IN AL, DX ; 8 bits are input to AL from I/O port DX (variable port addressing) - OUT 89H, AX ; 16-bits are output to I/O port 89H from AX (fixed port addressing) - OUT DX, AL; 8-bit data are output to I/O port DX from AL (variable port addressing) 38

39 Operation of OUT 19H, AX Instruction 39

40 Problem: Some assembly language instructions with a portion of memory location of Data Segment and Extra Segment are given below. Find the content of AX, BX, CX, DX, SI and DI after execution of instructions. 40

41 Solution: Instruction AX BX CX DX SI DI D-FLAG MOV CX, 34A1H 34AIH MOV BX, A202H A202H 34AIH MOV SI, 2005H A202H 34AIH 2005H MOV DI, 2007H A202H 34AIH 2005H 2007H STD A202H 34AIH 2005H 2007H D = 1 LODSW 2003H A202H 34AIH 2003H 2007H XCHG AX, BX A202H 2003H 34AIH 2003H 2007H CLD A202H 2003H 34AIH 2003H 2007H D = 0 STOSB A202H 2003H 34AIH 2003H 2008H MOV CH, AL A202H 2003H 02A1H 2003H 2008H STD A202H 2003H 02A1H 2003H 2008H D = 1 LODSB A207H 2003H 02A1H 2002H 2008H MOV CL, AL A207H 2003H 0207H 2002H 2008H XLAT A2D0H 2003H 0207H 2002H 2008H MOV DX, AX A2D0H 2003H 0207H A2D0H 2002H 2008H STOSW A2D0H 2003H 0207H A2D0H 2002H 2006H D = 0 (Auto Increment) D = 1 (Auto Decrement) 41

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