ASSEMBLY LANGUAGE PROGRAMMING OF THE MICROCOMPUTER

Transcription

1 CHAPTER ASSEMBLY LANGUAGE PROGRAMMING OF THE MICROCOMPUTER 2.1 Introduction To run a program, a microcomputer must have the program stored in binary form in successive memory locations. There are three language levels that can be used to write a program for a microcomputer. Machine Language: You can write programs as simply a sequence of the binary codes for the instructions you want the micro- computer to execute. The binary form of the program is referred to as machine language because it is the form required by the machine. However, it is difficult, if not impossible, for a programmer to memorize the thousands of binary instruction codes for a CPU such as the Also, it is very easy for an error to occur when working with long series of 1's and 0's. Using hexadecimal representation for the binary codes might help some, but there are still thousands of instruction codes to cope with. Assembly Language: To make programming easier, many programmers write programs in assembly language. They then translate the assembly language program to machine language so that it can be loaded into memory and run. Assembly language uses two-, three-, or four-letter mnemonics to represent each instruction type. A mnemonic is just a device to help you remember something. The letters in an assembly language mnemonic are usually initials or a shortened form of the English word(s) for the operation performed by the instruction. For example, the mnemonic for subtract is SUB, the mnemonic for Exclusive OR is XOR, and the mnemonic for the instruction to copy data from one location to another is MOV. High Level Languages: Another way of writing program for a microcomputer is with high-level languages such as BASIC, C, JAVA or C++. These languages use program statements, which are even more English-like than those of assembly language. Each high-level statement may represent many machine code instructions. An interpreter program or a compiler program is used to translate higher-level language statements to machine codes, which can be loaded into memory and executed. Compiled by : Dr. Manoj V.N.V. Page 32

2 2.2. Addressing Modes Of 8086 Addressing mode indicates a way of locating data or operands. Depending upon the data types used in the instruction and the memory addressing modes, any instruction may belong to one or more addressing modes, or some instruction may not belong to any of the addressing modes. Thus the addressing modes describe the types of operands and the way they are accessed for executing an instruction. The addressing mode depends upon the operands and suggests how the effective address may be computed for locating the operand, if it lies in memory. The different addressing modes of the 8086 instructions are listed in Table 2.2. The R/M column and addressing mode row element specifies the R/M field, while the addressing mode column specifies the MOD field. Table 2.2 Addressing Modes and the Corresponding MOD, REG and RIM Fields Memory Operands Note: 1. D8 and D16 represent 8 and 16 bit displacements respectively. 2. The default segment for the addressing modes using BP and SP is SS. For all other addressing modes the default segments are DS or ES. When a data is to be referred as an operand, DS is the default data segment register. CS is the default code segment register for storing program codes (executable codes). SS is the default segment register for the stack data accesses and operations. ES is the default segment register for the destination data storage. All the segments available (defined in a particular program) can be read or written as data segments by newly defining the data segment as required. There is no physical difference in the memory structure or no physical separation between the segment areas. They may or may not overlap with each other. According to the flow of instruction execution, the instructions may be categorized as (i) Sequential control flow instructions and (ii) Control transfer instructions. Compiled by : Dr. Manoj V.N.V. Page 33

3 Sequential control flow instructions are the instructions, which after execution, transfer control to the next instruction appearing immediately after it (in the sequence) in the pro- gram. For example, the arithmetic, logical, data transfer and processor control instructions are sequential control flow instructions. The control transfer instructions, on the other hand, transfer control to some predefined address or the address somehow specified in the instruction, after their execution. For example, INT, CA.LL, RET and JUMP instructions fall under this category. The addressing modes for sequential control transfer instructions are explained as follows: 1. Immediate In this type of addressing, immediate data is a part of instruction, and appears in the form of successive byte or bytes. Example MOV AX, 0005H In the above example, 0005H is the immediate data. The immediate data may be 8-bit or 16-bit in size. 2. Direct. In the direct addressing mode, a 16-bit memory address (offset) is directly specified in the instruction as a part of it. Example MOV AX, [5000H] Here, data resides in a memory location in the data segment, whose effective address may be computed using 5000H as the offset address and content of DS as segment address. The effective address, here, is 10H*DS+5000H. 3. Register In register addressing mode, the data is stored in a register and it is referred using the particular register. All the registers, except IP, may be used in this mode. Example MOV BX, AX. 4. Register Indirect. Sometimes, the address of the memory location, which contains data or operand, is determined in an indirect way, using the offset registers. This mode of addressing is known as register indirect mode. In this addressing mode, the offset address of data is in either BX or SI or DI registers. The default segment is either DS or ES. The data is supposed to be available at the address pointed to by the content of any of the above registers in the default data segment. Example MOV AX, [BX] Here, data is present in a memory location in DS whose offset address is in BX. The effective address of the data is given as 10H*DS+[BXI. 5. Indexed. In this addressing mode, offset of the operand is stored in one of the index registers. DS and ES are the default segments for index registers SI and DI respectively. This mode is a special case of the above discussed register indirect addressing mode. Example MOV AX, [SI] Here, data is available at an offset address stored in SI in DS. The effective address, in this case, is computed as 10H*DS+[SI]. Compiled by : Dr. Manoj V.N.V. Page 34

4 6. Register Relative In this addressing mode, the data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX, BP, SI and DI in the default (either DS or ES) segment. The example given below explains this mode. Example MOV AX, 50H [BX] Here, the effective address is given as 10H*DS+50H+[BX]. 7. Based Indexed. The effective address of data is formed, in this addressing mode, by adding content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI). The default segment register may be ES or DS. Example MOV AX, [BXI [SI] Here, BX is the bass register and SI is the index register. The effective address is computed as 10H*DS+[BX]+[SI]. 8. Relative Based Indexed. The effective address is formed by adding an 8 or 16- bit displacement with the sum of contents of any one of the base registers (BX or BP) and any one of the index registers, in a default segment. Example MOV AX, 50 H [BX] [SI] Here, 50H is an immediate displacement, BX is a base register and SI is an index register. The effective address of data is computed as 10H*DS+ [BXI+ [SI] +50H. For the control transfer instructions, the addressing modes depend upon whether the destination location is within the same segment or a different one. It also depends upon the method of passing the destination address to the processor. Basically, there are two addressing modes for the control transfer instructions, viz. intersegment and intrasegment addressing modes. If the location to which the control is to be transferred lies in a different segment other than the current one, the mode is called intersegment mode. If the destination location lies in the same segment, the mode is called intrasegment mode. The following Figure shows the modes for control transfer instructions. Fig. Addressing Modes for Control Transfer Instructions 9.Intrasegment Direct. In this mode, the address to which the control is to be transferred lies in the same segment in which the control transfer instruction lies and appears directly in the instruction as an immediate displacement value. In Compiled by : Dr. Manoj V.N.V. Page 35

5 this addressing mode, the displacement is computed relative to the content of the instruction pointer IP. The effective address to which the control will be transferred is given by the sum of 8 or 16 bit displacement and current content of IP. In case of jump instruction, if the signed displacement (d) is of 8 bits (i.e. -128< d <+127), we term it as short jump and if it is of 16 bits (i.e <d<+32767), it is termed as long jump. 10. Intrasegment Indirect. In this mode, the displacement to which the control is to be transferred is in the same segment in which the control transfers instruction lies, but it is passed to the instruction indirectly. Here, the branch address is found as the content of a register or a memory location. This addressing mode may be used in unconditional branch instructions. 11. Intersegment Direct. In this mode, the address to which the control is to be transferred is in a different segment. This addressing mode provides a means of branching from one code segment to another code segment. Here, the CS and IP of the destination address are specified, directly in the instruction. 12. Intersegment Indirect. In this mode, the address to which the control is to be transferred lies in a different segment and it is passed to the instruction indirectly, i.e. contents of a memory block containing four bytes, i.e. IP (LSB), IP (MSB), CS (LSB) and CS (MSB) sequentially. The starting address of the memory block may be referred using any of the addressing modes, except immediate mode. Example: Suppose our main program resides in the code segment where CS=l0000H. The main program calls a subroutine, which resides in the same code segment. The base register contains offset of the subroutine, i.e. BX= 0050H. Since the offset is specified indirectly, as the content of BX, this is indirect addressing. The instruction CALL [BX] calls the subroutine located at an address 10H*CS+[BX]=10050H, i.e. in the same code segment. Since the control goes to the subroutine, which resides in the same segment, this is an example of intrasegment indirect addressing mode. Example Let us now assume that the subroutine resides in another code segment, where CS=2000H. Now CALL 2000H:0050H is an example of intersegment direct addressing mode, since the control now goes to different segment and the address is directly specified in the instruction. In this case, the address of the subroutine is 20050H. Compiled by : Dr. Manoj V.N.V. Page 36

6 2.3 INSTRUCTION SET OF 8086/ Classification of Instruction: The 8086/8088 instructions are categorized into the following main types. This section ex- plains the function of each of the instructions with suitable examples wherever necessary. (1) Data Transfer Instructions. This type of instructions is used to transfer data from source operand to destination operand. All the store, move, load, exchange, input and output instructions belong to this category. Under this category there are following group of instructions General-Purpose Byte or Word Transfer Instructions: MOV Copy byte or word from specified source to specified destination. PUSH Copy specified word to top of stack. POP Copy word from top of stack to specified location. XCHG Exchange bytes or exchange words. XLAT Translate a byte in AL using a table in memory. Simple Input Output Port Transfer Instructions: IN Copy a byte or word from specified port to accumulator. OUT Copy a byte or word from accumulator to specified port. Special Address Transfer Instructions: LEA Load effective address of operand into specified register. LDS Load DS register and other specified register from memory. LES Load ES register and other specified register from me Flag Transfer Instructions: LAHF Load (copy to) AH with the low byte of the flag register. SAHF Store (copy) AH register to low byte of flag register. PUSHF Copy flag register to top of stack. POPF Copy word at top of stack to flag register. (2) Arithmetic Instructions. Under this category there are following group of instructions Addition Instructions: ADD Add specified byte-to-byte or specified word to word. ADC Add byte + byte + carry flag or word + word + carry flag. INC Increment specified byte or specified word by 1. AAA ASCII adjust after addition. DAA Decimal (BCD) adjust after addition. Subtraction Instructions: SUB Subtract byte from byte or word from word. SBB Subtract byte and carry flag from byte or word and carry flag from word. DEC Decrement specified byte or specified word by 1. NEG Negate-Invert each bit of a specified byte or word and add 1 (form 2's complement). Compiled by : Dr. Manoj V.N.V. Page 37

7 CMP Compare two specified bytes or two specified words. AAS ASCII adjust after subtraction. DAS Decimal (BCD) adjust after subtraction. Multiplication Instructions: MUL Multiply unsigned byte-by-byte or unsigned word by word. IMUL Multiply signed byte by byte or signed word by word. AAM ASCII adjust after multiplication. Division Instructions: DIV Divide unsigned word by byte or unsigned double word by word. IDIV Divide signed word by byte or signed double word by word. AAD ASCII adjust before division. CBW Fill upper byte of word with copies of sign bit of lower byte. CWD Fill upper word of double word with sign bit of lower word. (3) Bit Manipulation Instructions. Under this category there are following group of instructions Logical Instructions: NOT Invert each bit of a byte or word. AND AND each bit in a byte or word with the corresponding bit in another byte or word. OR OR each bit in a byte or word with the corresponding bit in another byte or word. XOR Exclusive OR each bit in a byte or word with the corresponding bit in another byte or word. TEST AND operands to update flags, but don't change operands. Shift Instructions: SHL/SAL Shift bits of word or byte left, put zero(s) in LSB(s). SHR Shift bits of word or byte right, put zero(s) in MSB(s). SAR Shift bits of word or byte right, copy old MSB into new MSB Rotate Instructions: ROL Rotate bits of byte or word left, MSB to LSB and to CF. ROR Rotate bits of byte or word right, LSB to MSB and to CF. RCL Rotate bits of byte or word left, MSB to CF and CF to LSB. RCR Rotate bits of byte or word right, LSB to CF and CF to MSB. (4) String Instructions: A string is a series of bytes or a series of words in sequential memory locations. A string often consists of ASCII character codes. In this list, a / is used to separate different mnemonics for the same instruction. Use the mnemonic, which most clearly describes the functions of the instruction in a specific application. A B in a mnemonic is used to specifically indicate that a string of bytes is to be acted upon. A W in the mnemonic is used to indicate that a string of words is to be acted upon. REP An instruction prefix. Repeat following instruction until CX = 0. REPE/REPZ An instruction prefix. Repeat instruction until CX = 0 or zero flag ZF 1. Compiled by : Dr. Manoj V.N.V. Page 38

8 REPNE/REPNZ An instruction prefix. Repeat until CX = 0 or ZF = 1. MOVS/MOVSB/MOVSW Move byte or word from one string to another. COMPS/COMPSB/COMPSW Compare two string bytes or two string words. SCAS/SCASB/SCASW Scan a string. Compare a string byte with a byte in AL or a string word with a word in AX. LODS/LODSB/LODSW Load string byte into AL or string word into AX. STOS/STOSB/STOSW Store byte from AL or word from AX into string. (5) Program Execution Transfer Instructions: These instructions are used to tell the 8086 to start fetching instructions from some new address, rather than continuing in sequence. It contains the following group of instructions. Unconditional Transfer Instructions: CALL Call a procedure (subprogram), save return address on stack. RET Return from procedure to calling program. JMP Go to specified address to get next instruction. Conditional Transfer Instructions: A / is used to separate two mnemonics which represent the same Instruction. Use the mnemonic, which most clearly describes the decision condition in a specific program. These instructions are often used after a compare instruction. The terms below and above refer to unsigned binary numbers. Above means larger in magnitude. The terms greater than or less than refer to signed binary numbers. Greater than means more positive. JA/JNBE Jump if above/jump if not below or equal. JAE/JNB Jump if above or equal/jump if not below. JB/JNAE Jump if below/jump if not above or equal. JBE/JNA Jump if below or equal/jump if not above. JC Jump if carry flag CF = 1. JE/JZ Jump if equal/jump if zero flag ZF = 1. JG/JNLE Jump if greater/jump if not less than or equal. JGE/JNL Jump if greater than or equal/ Jump if not less than. JL/JNGE Jump if less than/jump if not greater than or-equal. JLE/JNG Jump if less than or equal/jump if not greater than. JNC Jump if no carry (CF = 0). JNE/JNZ Jump if not equal/jump if not zero (ZF = 0). JNO Jump if no overflow (overflow flag OF = 0). JNP/JPO Jump if not parity/jump if parity odd (PF = 0). JNS Jump if not sign (sign flag SF= 0). JO Jump if overflow flag OF = 1. JP/JPE Jump if parity/jump if parity even (PF = 1). JS Jump if sign (SF Compiled by : Dr. Manoj V.N.V. Page 39

9 Iteration Control Instructions: These instructions can be used to execute a series of instructions some number of times. Here mnemonics separated by a "/ " represent the same instruction. Use the one that best fits the specific application. LOOP Loop through a sequence of instructions until CX = 0. LOOPE/LOOPZ Loop through a sequence of instructions while ZF =1 and CX 0. LOOPNE/LOOPNZ Loop through a sequence of instructions while ZF = 0 and CX 0. JCXZ Jump to specified address if CX = 0. Interrupt Instructions: INT Interrupt program execution, call service procedure. INTO Interrupt program execution if OF = 1. IRET Return from interrupt service procedure to main program. (6) Processor Control Instructions: This category includes the following groups of instructions. Flag Set/clear Instructions: STC Set carry flag CF to 1. CLC Clear carry flag CF to 0. CMC Complement the state of the carry flag CF. STD Set direction flag DF to 1 (decrement string pointers). CLD Clear direction flag DF to 0. STI Set interrupt enable flag to 1 (enable INTR input). CLI Clear interrupt enable flag to 0 (disable INTR input). External Hardware Synchronization Instructions: HLT Halt (do nothing) until interrupt or reset. WAIT Wait (do nothing) until signal on the TEST pin is low. ESC Escape to external coprocessor such as 8087 or 8089 LOCK An instruction prefix. Prevents another processor from taking the bus No Operation Instruction: NOP No action except fetch and decode Data Transfer Instructions General-Purpose Byte Or Word Transfer Instructions: MOV---Copy a Word or Byte---MOV Destination, Source The MOV instruction copies a word or byte of data from a specified source to a specified destination. The destination can be a register or a memory location. The source can be a register, a memory location, or an immediate number. The source and destination in an instruction cannot both be memory locations. The source and destination in a MOV instruction must both be of type byte, or they must both be of type word. MOV instructions do not affect any flags. Compiled by : Dr. Manoj V.N.V. Page 40

10 MOV CX, 037AH Put the immediate number 037AH in CX MOV BL, [437AH] Copy byte in DS at offset 437AH to BL MOV AX, BX Copy contents of register BX to AX MOV DL, [BX] Copy byte from memory at [BX] to DL. MOV DS, BX Copy word from BX to DS register MOV RESULTS[BP],AX Copy AX to two memory locations-al to the first location, AH to the second. EA of the first memory location is the sum of the displacement represented by RESULTS and contents of BP. Physical address = EA + SS. MOV CS:RESULTS[BP],AX Same as the above instruction, but physical address = EA + CS because of the segment override prefix CS. PUSH-PUSH Source The PUSH instruction decrements the stack pointer by 2 and copies a word from a specified source to the location in the stack segment where the stack pointer then points. The source of the word can be a general- purpose register, a segment register, or memory. The stack segment register and the stack pointer must be initialized before this instruction can be used. PUSH can be used to save data on the stack so that it will not be destroyed by a procedure. It can also be used to put data on the stack so that a procedure can access it there as needed. No flags are affected by this instruction. PUSH BX Decrement SP by 2, copy BX to stack PUSH DS Decrement SP by 2, copy DS to stack PUSH AL Illegal, must push a word PUSH TABLE [BX] Decrement SP by 2, copy word from memory in DS at EA = TABLE + [BX] to stack POP-POP Destination The POP instruction copies a word from the stack location pointed to by the stack pointer to a destination specified in the Instruction. The destination can be a general-purpose register, a segment register, or a memory location. The data in the stack is not changed. After the word is copied to the specified destination, the stack pointer is automatically incremented by 2 to point to the next word on the stack. No flags are affected by the POP instruction. NOTE: POP CS Is illegal. POP DX Copy a word from top of stack to DX Increment SP by 2 POP DS Copy a word from top of stack to DS Increment SP by 2 POP TABLE [BX] Copy a word from top of stack to memory in DS with EA = TABLE +[BX] XCHG-XCHG Destination, Source The XCHG instruction exchanges the contents of a register with the contents of another register or the contents of a register with the contents of a Compiled by : Dr. Manoj V.N.V. Page 41

11 memory locations). The XCHG cannot directly exchange the contents of two memory locations. A memory location can be specified as the source or as the destination by any of the 24 addressing modes. The source and destination must both be words, or they must both be bytes. The segment registers cannot be used in this instruction. No flags are affected by this instruction. XCHG AX,DX Exchange word in AX with word in DX XCHG BL,CH XCHG AL,PRICES [BX] Exchange byte in BL with byte in CH Exchange byte in AL with byte in memory at EA = PRICES [BX] in DS XLAT/XLATB-Translate a Byte in AL The XLATB instruction is used to translate a byte from one code to another code. The instruction replaces a byte in the AL register with a byte pointed to by BX in a lookup table in memory. Before the XLATB instruction can be executed, the lookup table containing the values for the new code must be put in memory, and the offset of the starting address of the lookup table must be loaded in BX. The code byte to be translated is put in AL. To point to the desired byte in the lookup table, the XLATB instruction adds the byte in AL to the offset of the start of the table in BX. It then copies the byte from the address pointed to by (BX + AL) back into AL. XLATB changes no flags. EXAMPLE: 8086 routine to convert ASCII code byte to EBCDIC equivalent. ASCII code byte is in AL at start. EBCDIC code in AL at end. MOV BX,OFFSET EBCDIC_TABLE Point BX at start of EBCDIC table in DS XLATB Replace ASCII in AL with EBCDIC from table The XLATB instruction can be used to convert any code of 8 bits or less to any other code of 8 bits or less Simple Input Output Port Transfer Instructions: IN-Copy Data from a Port--IN Accumulator, Port The IN instruction will copy data from a port to the AL or AX register. If an 8-bit port is read, the data will go to AL. If a 16-bit port is read, the data will go to AX. The IN instruction has two possible formats, fixed port and variable port. For the fixed-port type, the 8-bit address of a port is specified directly in the instruction. IN AL, 0C8H Input a byte from port 0C8H to AL IN AX,34H Input a word from port 34H to AX A_TO_D EQU 4AH IN AX,A_TO_D Input a word from port 4AH to AX For the variable-port-type IN instruction, the port address is loaded into the DX register before the IN instruction. Since DX is a 16-bit register, the port Compiled by : Dr. Manoj V.N.V. Page 42

12 address can be any number between 0000H and FFFFH. Therefore, up to 65,536 ports are addressable in this mode. MOV DX, 0FF78H Initialize DX to point to port IN AL, DX Input a byte from 8-bit port 0FF78H to AL IN AX, DX Input a word from 16-bit port 0FF78H to AX The variable-port IN instruction has the advantage that the port address can be computed or dynamically determined in the program. Suppose, for example, that an 8086-based computer needs to input data from 10 terminals, each having its own port address. Instead of having a separate procedure to input data from each port, we can write one generalized input procedure and simply pass the address of the desired port to the procedure in DX. The IN instructions do not change any flags. OUT-Output a Byte or Word to a Port--OUT Port, Accumulator AL or AX The OUT instruction copies a byte from AL or a word from AX to the specified port. The OUT instruction has two possible forms, fixed port and variable port. For the fixed-port form, the 8-bit port address is specified directly in the instruction. With this form, any one of 256 possible ports can be addressed. OUT 3BH,AL Copy the contents of AL to port 3BH OUT 2CH,AX Copy the contents of AX to port 2CH For the variable-port form of the OUT instruction, the contents of AL or AX will be copied to the port at an address contained in DX. Therefore, the DX register must always be loaded with the desired port address before this form of the OUT instruction is used. The advantage of the variable-port form of addressing is described in the discussion of the IN instruction. The OUT instruction does not affect any flags. MOV DX, 0FFF8H Load desired port address in DX OUT DX, AL Copy contents of AL to port FFF8H OUT DX, AX Copy contents of AX to port FFF8H Special Address Transfer Instructions: LEA-Load Effective Address-LEA Register, Source This instruction determines the offset of the variable or memory location named as the source and puts this offset in the indicated 16-bit register. LEA changes no flags. LEA BX, PRICES Load BX with offset of PRICES in DS LEA BP, SS: STACK_TOP Load BP with offset of STACK_TOP in SS LEA CX, [BX][DI] Load CX with EA = (BX) + (DI) Assume PRICES is an array of bytes in a segment called ARRAYS. The instruction LEA BX, PRICES will load the displacement of the first element of PRICES directly into BX. The instruction MOV AL,[BX] can then be used to bring an element from the array into AL. Compiled by : Dr. Manoj V.N.V. Page 43

13 LDS-Load Register and DS with Words from Memory-LDS Register, Memory Address of First Word This instruction copies a word from two memory locations into the register specified in the instruction. It then copies a word from the next two memory locations into the DS register. LDS is useful for pointing SI and DS at the start of a string before using one of the string instructions, LDS affects no flags. LDS BX, Copy contents of memory at displacement 4326H in DS to BL, contents of 4327H to BH. Copy contents at displacement of 4328H and 4329H in DS to DS register. LDS SI, STRING_POINTER Copy contents of memory at displacements STRING_POINTER and STRING_POINTER+1 in DS to SI register. Copy contents of memory at displacements STRING_POINTER+2 and STRING POINTER+3 In DS to DS register. DS:SI now points at start of desired string. LES-Load Register and ES with Words from Memory-LES Register, Memory Address of First Word This instruction loads new values into the specified register and into the ES register from four successive memory locations. The word from the first two memory locations is copied into the specified register, and the word from the next two memory locations is copied into the ES register. LES can be used to point DI and ES at the start of a string before a string instruction is executed. LES affects no flags. LES BX, [789AH] Contents of memory at displacements 789AH and 789BH In DS copied to BX. Contents of memory at displacements 789CH and 789DH in DS copied to ES register. LES DI, [BX] Copy contents of memory at offset [BX] and offset [BX+1] in DS to DI register. Copy contents of memory at offsets [BX + 2] and [BX + 3] to ES register Flag Transfer Instructions LAHF-Copy Low Byte of Flag Register to AH The lower byte of the 8086 flag register is the same as the flag byte for the LAHF copies these 8085 equivalent flags to the AH register. They can then be pushed onto the stack along with AL by a PUSH AX instruction. An LAHF instruction followed by a PUSH AX instruction has the same effect as the 8085 PUSH PSW instruction. The LAHF instruction was included in the 8086 instruction set so that the 8085 PUSH PSW instruction could easily be simulated on an LAHF changes no flags. SAHF-Copy AH Register to Low Byte of Flag Register The lower byte of the 8086 flag register corresponds exactly to the 8085 flag byte. SAHF replaces this 8085 equivalent flag byte with a byte from the AH register. SAHF is used with the POP AX instruction to simulate the 8085 POP PSW instruction. As described under the heading LAHF, an 8085 PUSH PSW Compiled by : Dr. Manoj V.N.V. Page 44

14 instruction will be translated to an LAHF--PUSH AX sequence to run on an An 8085 POP PSW instruction will be translated to a POP AX--SAHF sequence to run on an SAHF changes the flags in the lower byte of the flag register. PUSHF-Push Flag Register on the Stack This instruction decrements the stack pointer by 2 and copies the word In the flag register to the memory locations pointed to by the stack pointer. The stack segment register is not affected. No flags are changed. POPF-Pop Word from Top of Stack to Flag Register This instruction copies a word from the two memory locations at the top of the stack to the flag register and increments the stack pointer by 2. The stack segment register and the word on the stack are not affected. AU flags are affected Arithmetic Instructions Addition Instructions ADC-Add with Carry-ADC Destination, Source ADD-Add-ADD Destination, Source These instructions add a number from some source to a number from some destination and put the -result in the specified destination. The Add with Carry instruction, ADC, also adds the status of the carry flag into the result. The source may be an immediate number, a register, or a memory location specified by any one of the 24 addressing modes. The destination may be a register or a memory location specified by any one of the 24 addressing modes. The source and the destination in an instruction cannot both be memory locations. The source and the destination must be of the same type. In other words, they must both be byte locations, or they must both be word locations. If you want to add a byte to a word, you must copy the byte to a word location and fill the upper byte of the word with 0's before adding. Flags affected: AF, CF, OF, PF, SF, ZF. ADD AL, 74H Add immediate number 74H to contents of AL. Result In AL ADC CL, BL Add contents of BL plus carry status to contents of CL. ADD DX, BX Add contents of BX to contents of DX ADD DX,[SI] Add word from memory at offset [SI]in DS to contents of DX ADC AL, PRICES [BX] Add byte from effective address PRICES [BX] plus carry status to contents of AL ADD PRICES [BX], AL Add contents of AL to contents of memory location at effective address PRICES[BX] ADD CL, BL Addition of unsigned numbers CL = = 115 decimal + BL = = 79 decimal Result in CL = = 194 decimal Addition of signed numbers CL = = decimal Compiled by : Dr. Manoj V.N.V. Page 45

15 + BL = decimal ADD CL, BL Result in CL= =62 decimal - incorrect because result too large to fit in 7 bits. FLAG RESULTS FOR SIGNED ADDITION EXAMPLE CF = 0 No carry out of bit 7. PF = 0 Result has odd parity. AF = 1 Carry was produced out of bit 3. ZF = 0 Result in destination was not 0. SF = 1 Copies most significant bit of result; indicates negative result if you are adding signed numbers. OF= 1 Set to indicate that the result of the addition was too large to fit in the lower 7 bits of the destination used to represent the magnitude of a signed number. In other words, the result was greater than decimal, so the result overflowed into the sign bit position and incorrectly indicated that the result was negative. If you are adding two signed 16-bit values, the OF will be set if the magnitude of the result is too large to fit in the lower 15 bits of the destination. NOTE: PF is meaningful only for an 8-bit result. AF is set only by a carry out of bit 3. Therefore, the DAA instruction cannot be used after word additions to convert the result to correct BCD. INC-increment-INC Destination The INC instruction adds I to a specified register or to a memory location specified in any one of the 24 ways. AF, OF, PF, SF, and ZF are affected (updated) by this instruction. Note that the carry flag (CF) is not affected. This means that if an 8-bit destination containing FFH or a 16-bit destination containing FFFFH is incremented, the result will be all 0's with no carry. INC BL Add 1 to contents of BL register INC CX Add I to contents of CX register INC BYTE PTR [ BX] Increment byte in data segment at offset contained in BX. The BYTE PTR directive is necessary to tell the assembler to put in the right code to indicate that a byte in memory, rather than a word, is to be incremented. The instruction essentially says, "Increment the byte pointed to by the contents of BX." INC WORD PTR [BX] Increment the word at offset of [BX] and [BX + 1] in the data segment. In other words, increment the word in memory pointed to by BX. INC MAX_TEMPERATURE Increment byte or word named MAX- TEMPERATURE in data segment. Increment byte if MAX_TEMPERATURE declared with DB. Increment word if MAX-TEMPERATURE declared with DW. INC PRICES [BX] Increment element pointed to by [BX] in array PRICES. Increment a word if PRICES was defined as an array of words with a DW Compiled by : Dr. Manoj V.N.V. Page 46

16 directive. Increment a byte if PRICES was defined as an array of bytes with a DB directive. NOTE: The PTR operator is not needed in the last two examples because the assembler knows the type of the operand from the DB or DW used to declare the named data initially. AAA-ASCII Adjust for Addition Numerical data coming into a computer from a terminal is usually in ASCII code. In this code, the numbers 0 to 9 are represented by the ASCII codes 30H to 39H. The 8086 allows you to add the ASCII codes for two decimal digits without masking off the "3" in the upper nibble of each. After the addition, the AAA Instruction is used to make sure the result is the correct unpacked BCD; A simple numerical example will show how this works. EXAMPLE: Assume AL = , ASCII 5 BL = , ASCII 9 ADDAL,BL Result: AL= = 6EH,which is incorrect BCD AAA Now AL = , unpacked BCD 4. CF = 1 indicates answer is 14 decimal NOTE: OR AL with 30H to get 34H, the ASCII code for 4, if you want to send the result back to a CRT terminal. The 1 in the carry flag can be rotated into the low nibble of a register, ORed with 30H to give the ASCII code for 1, and then sent to the terminal. The AAA instruction works only on the AL register. The AAA instruction updates AF and CF, but OF, PF, SF, and ZF are left undefined. DAA-Decimal Adjust AL after BCD Addition This instruction is used to make sure the result of adding two packed BCD numbers is adjusted to be a legal BCD number. The result of the addition must be in AL for DAA to work correctly. If the lower nibble in AL after an addition is greater than 9 or AF was set by the addition, then the DAA instruction will add 6 to the lower nibble in AL. If the result in the upper nibble of AL is now greater than 9 or if the carry flag was set by the addition or correction, then the DAA instruction will add 60H to AL. AL = = 59 BCD ; BL = = 35 BCD ADD AL, BL AL = = 8EH DAA Add because 1110 > 9 AL = = 94 BCD AL = = 88 BCD BL = = 49 BCD ADD AL, BL DAA AL = , AF=1 Add 0110 because AF =1, AL = = D7H 1101 > 9 so add AL = = 37 BCD, CF =1 Compiled by : Dr. Manoj V.N.V. Page 47

17 The DAA instruction updates AF, CF, PF, and ZF. OF is undefined after a DAA instruction Subtraction Instructions SBB-Subtract with Borrow-SBB Destination, Source SUB-Subtract-SUR Destination, Source These instructions subtract the number in the indicated source from the number in the indicated destination and put the result in the indicated destination. For subtraction, the carry flag (CF) functions as a borrow flag. The carry flag will be set after a subtraction if the number in the specified source is larger than the number in the specified destination. In other words, the carry/borrow flag will be set if a borrow was required to do the subtraction. The Subtract instruction, SUB, subtracts just the contents of the specified source from the contents of the specified destination. The Subtract with Borrow instruction, SBB, subtracts the contents of the source and the contents of CF from the contents of the indicated destination. The source may be an immediate number, a register, or a memory location specified by any of the 24 addressing modes. The destination can also be a register or a memory location. However, the source and the destination cannot both be memory locations in an instruction. The source and the destination must both be of type byte or both be of type word. If you want to subtract a byte from a word, you must first move the byte to a word location such as a 16-bit register and fill the upper byte of the word with O's. AF, CF, OF, PF, SF, and ZF are updated by the SUB instruction. SUB CX, BX CX - BX. Result in CX SBB CH, AL Subtract contents of AL and contents of CF from contents of CH. Result In CH SUB AX,3427H Subtract immediate number 3427H from AX SBB BX,[3427H] Subtract word at displacement 3427H in DS and contents of CF from BX SUB PRICES[BX], 04H Subtract 04 from byte at effective address PRICES [BX] if PRICES declared with DB. Subtract 04 from word at effective address PRICES [BX] if PRICES declared with DW. SBB CX, TABLE[BX] Subtract word from effective address TABLE [BX] and status of CF from CX. SBB TABLE[BX], CX Subtract CX and status of CF from word in memory at effective address TABLE[BX]. Example subtracting unsigned numbers CL = = 156 decimal BH = = 55 decimal SUB CL, BH Result: CF,AF,SF,ZF = 0, OF,PF=1,CL= = 101 decimal Compiled by : Dr. Manoj V.N.V. Page 48

18 Example 1 subtracting signed numbers CL= = + 46 decimal BH= =+ 74 decimal SUB CL, BH Results: AF,ZF = 0, PF = 1 CL = = - 28 decimal CF = 1, borrow required SF = 1, result negative OF = 0, magnitude of result fits in 7 bits Example 2 subtracting signed numbers CL= = - 95 decimal BH= = + 76 decimal SUB CL,BH Results: CF,ZF = 0, AF,PF = 1,CL = = + 85 decimal SF = 0, result positive! OF = 1, invalid result. The overflow flag being set indicates that the magnitude of the expected result, decimal, is too large to fit in the 7 bits used for the magnitude in an 8-bit signed number. If the Interrupt on Overflow instruction, INTO, has been executed previously, this error will cause the 8086 to perform a software interrupt procedure. Part of this procedure is a user-written subroutine to handle the error. NOTE: The SBB Instruction allows you to subtract two multibyte numbers because any borrow produced by subtracting less significant bytes is included in the result when the SBB instruction executes. Although the preceding examples were for 8-bit numbers to save space, the principles are the same for 16-bit numbers. For 16-bit signed numbers, however, SF is a copy of bit 15, and the least significant 15 bits of the number are used to represent the magnitude. Also, PF and AF function only for the lower 8 bits. DEC-Decrement Destination Register or Memory-DEC Destination This Instruction subtracts 1 from the destination word or byte. The destination can be a register or a memory location specified by any one of the 24 addressing modes. AF, OF, PF, SF, and ZF are updated, but CF is not affected. This means that if an 8-bit destination containing 00H or a 16-bit destination containing 0000H is decremented, the result will be FFH or FFFFH with no carry (borrow). EXAMPLES DEC CL Subtract 1 from contents of CL register DEC BP Subtract 1 from contents of BP register DEC BYTE PTR [BX] Subtract 1 from byte at offset [BX]in DS. The BYTE PTR directive is necessary to tell the assembler to put in the correct code for decrementing a byte in memory, rather than decrementing a word. The instruction essentially says, "Decrement the byte in memory pointed to by the offset in BX. " DEC WORD PTR [BP] Subtract 1 from a word at offset [BP] in SS. The WORD PTR directive tells the assembler to put in the code for decrementing a word pointed to by the contents of BP. An offset in BP will be added to the SS register contents to produce the physical address. Compiled by : Dr. Manoj V.N.V. Page 49

19 DEC TOMATO_CAN_COUNT, Subtract 1 from byte or word named TOMATO_CAN_COUNT In DS. If TOMATO_CAN_COUNT was declared with a DB, then the assembler will code this instruction to decrement a byte. If TOMATO-CAN-COUNT was declared with a DW, then the assembler will code this instruction to decrement a word. NEG-Form 2's Complement-NEG Destination This Instruction replaces the number in a destination with the 2's complement of that number. The destination can be a register or a memory location specified by any one of the 24-addressing modes. This instruction forms the 2's complement by subtracting the original word or byte in the indicated destination from zero. You may want to try this with a couple of numbers to convince yourself that it gives the same result as the invert each bit and add 1 algorithm. As shown in some of the following examples, the NEG Instruction is useful for changing the sign of a signed word or byte. An attempt to NEG a byte location containing or a word location containing - 32,768 will produce no change in the destination contents because the maximum positive signed number in 8 bits is and the maximum positive signed number In 16 bits is + 32,767. OF will be set to Indicate that the operation could not be done. The NEG instruction updates AF, CF, SF, PF, ZF, and OF. NEG AL Replace number in AL with its 2's complement NEG BX Replace word in BX with its 2's complement NEG BYTE PTR [BX] Replace byte at offset [BX] in DS with its 2's complement NEG WORD PTR [BP] Replace word at offset [BP] in SS with its 2's complement NOTE: The BYTE PTR and WORD PTR directives are required in the last two examples to tell the assembler whether to code the instruction for a byte operation or a word operation. The [BP] reference by itself does not indicate the type of the operand. CMP-Compare Byte or Word-CMP Destination, Source This instruction compares a byte from the specified source with a byte from the specified destination, or a word from the specified source with a word from the specified destination. The source can be an immediate number, a register, or a memory location specified by one of the 24 addressing modes. The destination can be a register or a memory location. However, the source and the destination cannot both be memory locations in the same instruction. The comparison is actually done by subtracting the source byte or word from the destination byte or word. The source and the destination are not changed, but the flags are set to indicate the results of the comparison. AF, OF, SF, ZF, PF, and Compiled by : Dr. Manoj V.N.V. Page 50

20 CF are updated by the CMP instruction. For the instruction CMP CX, BX, CF, ZF, and SF will be left as follows: CF ZF SF CX = BX Result of subtraction is 0 CX > BX No borrow required, so CF = 0 CX < BX Subtraction required borrow, so CF = 1 CMP AL, 01H Compare immediate number01h with byte In AL CMP BH, CL Compare byte in CL with byte in BH CMP CX, TEMP_MIN Compare word in DS at displacement TEMP_MIN with word in CX CMP TEMP-MAX, CX Compare CX with word in DS at displacement TEMP- CMP PRICES [BX], 49H MAX Compare immediate 49H with byte at offset [BX] in array PRICES NOTE: The Compare instructions are often used with the Conditional Jump instructions. Having the Compare instructions formatted the way they are makes this use very easy to understand. AAS--ASCII Adjust for Subtraction Numerical data coming into a computer from a terminal is usually in ASCII code. In this code the numbers 0 to 9 are represented by the ASCII codes 30H to 39H. The 8086 allows you to subtract the ASCII codes for two decimal digits without masking the "3" in the upper nibble of each. The AAS instruction is then used to make sure the result is the correct unpacked BCD. Some simple numerical examples will show how this works. EXAMPLE: ASCII 9-ASCII 5 (9-5) AL = = 39H = ASCII 9 BL = = 35H = ASCII 5 SUB AL, BL Result: AL = = BCD 04 and CF = 0 AAS Result: AL = = BCD 04 and CF = 0 no borrow required ASCII 5-ASCII 9 (5-9) Assume AL = = 35H ASCII 5 and BL = = 39H = ASCII 9 SUB AL, BL Result: AL = = - 4 in 2s complement and CF =1 AAS Result: AL = = BCD 04 and CF = 1, borrow needed The AAS instruction leaves the correct unpacked BCD result in the low nibble of AL and resets the upper nibble of AIL to all 0's. If you want to send the result back to a CRT terminal, you can OR AL with 30H to produce the correct ASCII code for the result. If multiple-digit numbers are being subtracted, the CF can be taken into account by using the SBB instruction when subtracting the next digits. Compiled by : Dr. Manoj V.N.V. Page 51

21 The AAS instruction works only on the AL register. It updates AF and CF, but OF, PF, SF, and ZF are left undefined. DAS-Decimal Adjust after BCD Subtraction This instruction is used after subtracting two packed BCD numbers to make sure the result is correct packed BCD. The result of the subtraction must be in AL for DAS to work correctly. If the lower nibble in AL after a subtraction is greater than 9 or the AF was set by the subtraction, then the DAS instruction will subtract 6 from the lower nibble of AL. If the result in the upper nibble is now greater than 9 or if the carry flag was set, the DAS instruction will subtract 60 from AL. AL BCD ; BH BCD SUB AL,BH AL FH, CF = 0 DAS Lower nibble of result is 1111,so DAS automatically subtracts to give AL = BCD AL BCD BH BCD SUB AL,BH AL D7H, CF = 1 DAS Subtracts (- 60H) because 1101 in upper nibble > 9 AL = = 77 BCD, CF=1 CF=1 means borrow was needed The DAS instruction updates AF, CF, SF, PF, and ZF, but OF is undefined Multiplication Instructions MUL---Multiply Unsigned Bytes or Words---MUL Source This instruction multiplies an unsigned byte from some source times an unsigned byte in the AL register or an unsigned word from some source times an unsigned word In the AX register. The source can be a register or a memory location specified by any one of the 24 addressing modes. When a byte is multiplied by the contents of AL, the result (product) is put in AX. A 16-bit destination is required because the result of multiplying an 8-bit number by an 8- bit number can be as large as 16 bits. The most significant byte of the result is put in AH, and the least significant byte of the result is put in AL. When a word is multiplied by the contents of AX, the product can be as large as 32 bits. The most significant word of the result is put in the DX register, and the least significant word of the result is put in the AX register. If the most significant byte of a 16-bit result or the most significant word of a 32-bit result is 0, CF and OF will both be 0's. Checking these flags, then, allows you to detect and perhaps discard unnecessary leading 0's in a result. AF, PF, SF, and ZF are undefined after a MUL Instruction. If you want to multiply a byte by a word, you must first move the byte to a word location such as an extended register and fill the upper byte of the word with all 0's. Compiled by : Dr. Manoj V.N.V. Page 52

22 MUL BH AL times BH, result in AX MUL CX AX times CX, result high word in DX, low word in AX MUL BYTE PTR [BX] AL times byte in DS pointed to by IBXI MUL CONVERSION_FACTOIR[BX] Multiply AL times byte at effective address CONVERSION-FACTORIBXI if it was declared as type byte with DB. Multiply AX times word at effective address CONVERSION_FACTOR [BX] if it was declared as type word with DW. ; Example showing a byte multiplied by a word MOV AX, MULTIPLICAND_16 Load 16-bit multiplicand into AX MOV CL, MULTIPLIER_8 Load 8-bit multiplier into CL MOV CH, 00H Set upper byte of CX to all O's MUL CX AX times CX, 32-bit result in DX and AX IMUL-Multiply Signed Numbers--IMUL Source This instruction multiplies a signed byte from some source times a signed byte in AL or a signed word from some source times a signed word in AX. The source can be another register or a memory location specified by any one of the 24 addressing modes shown. When AL multiplies a byte from some source, the signed result (product) will be put in AX. A 16-bit destination is required because the result of multiplying two 8-bit numbers can be as large as 16 bits. When a word from some source is multiplied by AX, the result can be as large as 32 bits. The high-order (most significant) word of the signed result is put in DX, and the low-order (least significant) word of the signed result is put in AX. If the magnitude of the product does not require all the bits of the destination, the, unused bits will be filled with copies of the sign bit. If the upper byte of a 16-bit result or the upper word of a 32-bit result contains only copies of the sign bit (all 0's or all 1's), then CF and the OF will both be 0. If the upper byte of a 16-bit result or the upper word of a 32-bit result contains part of the product, CF and OF will both be 1. You can use the status of these flags to determine whether the upper byte or word of the product needs to be kept. AF, PF, SF, and ZF are undefined after IMUL. If you want to multiply a signed byte by a signed word, you must first move the byte into a word location and fill the upper byte of the word with copies of the sign bit. If you move the byte into AL, you can use the 8086 Convert Byte to Word instruction, CBW, to do this. CBW extends the sign bit from AL into all the bits of AH. Once you have converted the byte to, a word, you can do word times word IMUL. The result of this multiplication will be in DX and AX. IMUL BH Signed byte in AL times signed byte in BH, result in AX IMUL AX AX times AX, result in DX and AX Multiplying a signed byte by a signed word MOV CX, MULTIPLIER Load signed word in CX Compiled by : Dr. Manoj V.N.V. Page 53