Chapter 3: Arithmetic for Computers

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1 Chapter 3: Arithmetic for Computers

2 Objectives Signed and Unsigned Numbers Addition and Subtraction Multiplication and Division Floating Point Computer Architecture CS

3 The Binary Numbering System A computer s internal storage techniques are different from the way humans represent information in daily lives Humans Decimal numbering system to rep real numbers Base-10 Each position is a power of = 3 x x x x 10 0 Computer Architecture CS

4 Binary Representation of Numbers Information inside a digital computer is stored as a collection of binary data Binary numbering system Base-2 Built from ones and zeros Each position is a power of = 1 x x x x 2 0 Digits 0,1 are called bits (binary digits) Computer Architecture CS

5 Binary Representation of Numbers 6-Digit Binary Number (111001) = 1 x x x x x x 2 0 = = 57 5-Digit Binary Number (10111) = 1 x x x x x 2 0 = = 23 Computer Architecture CS

6 Binary Representation of Numbers Computers use finite number of Bits for Integer Storage Size ( word ) Max Unsigned Number Allowed 16 1x x x2 1 +1x2 0 MIPS-32 1x x x x2 0 Otherwise Arithmetic Overflow Computer Architecture CS

7 Number Representation MIPS word Example: 11 ten = 1 x x x x 2 0 = 1011 two Most-significant bit Least-significant bit Computer Architecture CS

8 Signed Number Representation Sign/Magnitude Notation Signed Number Examples: -49, +3, -8 Most significant Bit Stores sign 0 +ve number 1 -ve number Remaining Bits represent Magnitude of number Find the decimal value for the 32-bit sign/magnitude notation: Computer Architecture CS

9 Signed Number Representation Two s Complement Notation Leading 0s mean +ve Leading 1s mean -ve x X x x x x x2 2 +0x2 1 +1x2 0 = -2,147,483, = -2,147,483,609 Compare with sign/magnitude representation for -49 Computer Architecture CS

10 cf: Sign Magnitude/ Two s Complement Notations Up Close Sign Magnitude Two's Complement 000 = = = = = = = = = = = = = = = = -1 Computer Architecture CS

11 MIPS 32 bit signed numbers: Two s Complement Representation Value = = = = + 2,147,483, = + 2,147,483, = 2,147,483, = 2,147,483, = 2,147,483, = = = 1 Computer Architecture CS

12 Two s Complement Operation To Negate a Two's complement number: First invert all bits then Add 1 to the inverted bits To Convert n bit numbers into numbers with more than n bits: MIPS 16 bit immediate gets converted to 32 bits for arithmetic copy the most significant bit (the sign bit) into the LHS half of the word > > Computer Architecture CS

13 Addition and Subtraction Addition (carries 1s) 0011 = = = + 5 Subtraction: use addition of negative numbers 0011 = = = + 1 Overflow (if result too large to fit in the finite computer word of the result register) e.g., adding two n-bit numbers does not yield an n-bit number Computer Architecture CS

14 Overflow No overflow when adding a positive and a negative number No overflow when signs are the same for subtraction Overflow occurs when the value affects the sign: overflow when adding two positives yields a negative or, adding two negatives gives a positive or, subtract a negative from a positive and get a negative or, subtract a positive from a negative and get a positive Computer Architecture CS

15 Multiplication Recall: X 1000 ten 1001 ten Multiplicand Multiplier Observations ten Product More storage required to store the product Place copy of multiplicand in proper location if multiplier is a 1 Place 0 in proper location if multiplier is 0 Product of n-bit Multiplicand and m-multiplier is (n + m)-bit long Number of steps (move digits to LHS) is n -1; where n rep the number of digits (1,0) Let's examine 2 versions of multiplication algorithm for binary numbers Computer Architecture CS

16 Multiplication Version 1 Start Multiplier0 = 1 1. Test Multiplier0 Multiplier0 = 0 Multiplicand 64 bits Shift left 1a. Add multiplicand to product and place the result in Product register 64-bit ALU Multiplier Shift right 32 bits 2. Shift the Multiplicand register left 1 bit Product Write Control test 3. Shift the Multiplier register right 1 bit 64 bits Datapath Control No: < 32 repetitions 32nd repetition? Yes: 32 repetitions Done Computer Architecture CS

17 Multiplication Refined Version Start Product0 = 1 1. Test Product0 Product0 = 0 32-bit ALU Multiplicand 32 bits Add multiplicand to bits 32 thru 63 in product register and place the result in bits 32 thru 63 of product register Product 64 bits Shift right Write Control test 3. Shift the Product register right 1 bit 32nd repetition? No: < 32 repetitions Yes: 32 repetitions Done Computer Architecture CS

18 Multiplication Negative Numbers Convert Multiplicand and Multiplier to Positive Numbers Run the Multiplication algorithm for 31 iterations (ignoring the sign bit) Negate product only if original signs for Multiplicand and Multiplier are different Computer Architecture CS

19 Floating Point (Overview) Binary Representation Floats Provide representation for: Decimal numbers, e.g., Fractions, very small numbers, e.g.,.1 First Convert number to scientific notation: +MxB +E M ~ mantissa; B ~ base (2) of exponent E ~ exponent Computer Architecture CS

20 Floats Binary Representation: Example has binary value = ½ + ¼ = = 0.11 (binary value) 5.75 = x 2 0 (scientific notation) Normalize number: 5.75 = x 2 3 (i.e., 1/2 + 1/8 + 1/16 + 1/32) Computer Architecture CS

21 Floating Point MIPS Sign Magnitude Representation = x Most-significant bit Show that: General Sign Magnitude Representation (-1) s xfx2 E Least-significant bit Min value of numbers is 2x10-38 Max value of numbers is 2x10 38 How do you increase the precision? Computer Architecture CS

22 MIPS Representation Overflow/Underflow/Double Precision Exponent is too large Overflow Exponent too small Underflow MIPS solution: Double Precision representation Combine two MIPS word = x Computer Architecture CS

23 Floating Point IEEE 754 Representation Observations so far: We can increase the precision by making leading 1 bit of the normalized number implicit Logically 24 bits (instead of 23) for the fractional part In our representation, the exponent of 2-1 Looks like a large binary number On the other hand the exponent 2 +1 looks like a smaller binary number Let s make the most negative exponent 000 and most positive Hence introduce a transformation (Bias) Single Precision (7 bits) subtract 127 from exponent why 7 bits? Double Precision (10 bits) subtract 1023 from exponent why 10 bits? IEEE 754 Binary Representation: (-1) s x(1 + F)x2 (E- Bias) Computer Architecture CS

24 Floating Point IEEE 754 Binary Representation Show the IEEE 754 Single Precision Binary Representation of = x2-1 Hence, normalized notation: x (a) cf (a) with generalized form: (-1) s x(1 + F)x2 (E- Bias) Then (a) becomes: (-1) 1 x ( ) x 2 ( ) Computer Architecture CS

25 Floating Point IEEE 754 Binary Representation Show the IEEE 754 Double Precision Binary Representation of = x2-1 Hence, normalized notation: x (a) cf (a) with generalized form: (-1) s x(1 + F)x2 (E- Bias) Then (a) becomes: (-1) 1 x ( ) x 2 ( ) Computer Architecture CS

Computer Architecture Chapter 3. Fall 2005 Department of Computer Science Kent State University

Computer Architecture Chapter 3 Fall 2005 Department of Computer Science Kent State University Objectives Signed and Unsigned Numbers Addition and Subtraction Multiplication and Division Floating Point