Logical and bit operations
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1 Assembler lecture 6 S.Šimoňák, DCI FEEI TU of Košice Logical and bit operations instructions performing logical operations, shifts and rotations logical expressions and bit manipulations strings Logical operations bit a unit of information 0/1 (True/False) instructions (and, or, not, xor, test) for performing logical operations binary and unary (not) operations over 8,16,32-bit operands affects status flags (except the CF, OF 0, AF undefined) instructions discussed yet, now their typical usage will be demonstrated instruction and composing logical expressions, bitwise AND operation of HL languages (later) resetting bits isolating bits Resetting bits bit masks (if bit of mask = 0 output: 0, if bit of mask = 1 output: a copy of the second input bit) AL = (operand) BL = (mask) and AL,BL =
2 Example: ASCII to number conversion relation between the ASCII code and binary representation of numbers 0 9 masking upper 4 bits (AL): and AL,0FH Isolating bits masking-out all the other bits Example: even/odd number? test (LSb = 1 - odd)
3 instruction or composing logical expressions, bitwise OR operation of HL languages (later) setting bits (if bit of mask = 0 output: a copy of second input bit, if bit of mask = 1 output: 1) AL = (operand) BL = (mask) or AL,BL = Example: conversion of number (8-bit unsigned, 0-9) to ASCII character setting bits b 4, b 5 without modifying remaining bits (mask ) or AL,30H Cutting and pasting bits new byte in AL combining odd bits from AL with even from BL instruction xor and AL,55H ; odd bits of AL and BL,0AAH ; even bits of BL or AL,BL ; combination composing logical expressions of HL languages (later) toggling the value of a bit register initialization (0) Toggling the value of a bit mask with the value 1 at position, where the value is to be toggled using xor twice original value
4 Example: simple data encoding encoding key mask for the xor instruction xor AL,26H ; key 26H decoding the same process over encoded datum encoding: (char B, 42H) decoding: (char d) (mask, 26H) (mask) (char d, 64H) (char B) Register initialization same number of clocks, mov needs more memory instruction not mov AX,0 xor AX,AX (affects flags) composing logical expressions of HL languages (later) negation (complement) of bits of operand changing the operand sign instruction neg instruction test logical equivalent of instruction cmp (AND without changing the destination operand like non-destructive and) setting flags, often conditional jump follows
5 Shifts two types of shifts logical (unsigned numbers) shl, shr arithmetic (signed numbers) sal, sar status flags AF undefined ZF, PF according to the result of operation, CF last bit shifted out of the operand OF undefined for multi-bit shifts shifts by one bit OF = 1, when the sign bit is changed, OF = 0 otherwise Instructions of logical shifts bit manipulations Example: another encoding exchanging upper and lower nibble of byte (restoring the datum second application) mov AH,AL ; AL consists byte to encode shl AL,4 ; shl/shr zeros enter freed positions shr AH,4 or AL,AH multiplying/dividing of unsigned numbers by power of 2 double/half of unsigned (generally power of 2) dividing integer (eventual fractional (non-integer) part is dropped) Example: 28, 168
6 Instructions of arithmetic shifts syntax sal dest,count sar dest,count sal dest,cl sar dest,cl semantics [1] Doubling signed numbers shift left by one bit (MSb sign makes no problem) sign-extension (to greater number of bits as necessary for representing the number) no difference (in operation) when compared to unsigned numbers no special instruction needed (sal is an alias for shl)
7 Halving signed numbers leftmost bit required to replace by a copy of sign bit so special instruction required - sar shifts more efficient compared to corresponding instructions for multiplying/dividing Double-shift instructions two instructions for 32 and 64-bit shifts syntax (count immediate or CL) shld dest,src,count ; dest/src word, doubleword shrd dest,src,count ; dest R/M, src R difference between shift and double-shift instructions bits shifted out from src enter into dst (src without modification) [1]
8 Rotations shifts bits shifted out are lost (not always what we need) instructions presented yet now their typical usage Rotations without CF (rol, ror) rearranging bits in byte, word, double word Example: encoding exchanging upper and lower nibble of byte (using rol/ror simpler) mov CL,4 ror AL,CL ; similarly rol AL,CL Rotations through CF (rcl, rcr) CF like input Example: shifts of 64-bit numbers (multiplying 64-bit unsigned number (EDX:EAX) by 16, dividing analogically) a) using rotations b) using double-shifts mov ECX,4 shld EDX,EAX,4 ; EAX unchanged shift_left: shl EAX,4 shl EAX,1 ; MSb EAX CF rcl EDX,1 ; CF LSb EDX loop shift_left Logical expressions in HL Languages representing boolean values one bit is enough, but disadvantage here is a need for its isolation so most languages use a byte (0 false, otherwise true)
9 logical expressions e.g. C language logical operators (&& - AND, - OR) Example: translation of C - logical expression [1] a) C code b) translated (Turbo C) variable X mapped to [BP-12] Y to CX, Z to [BP-14] result of (X && Y) in AX complement pushed onto stack (line 11) (Y Z) lines 13 21, result in AX if the result is 0 (false), body of the if statement is skipped (line 25) Implementation of operations of HL languages logical by flow of control bitwise equivalents in instructions
10 Bit manipulations C language bitwise logical operators: and (&), or ( ), xor (^), not (~) operators of bit shifts: left (<<), right (>>) Example: bitwise operation translation (variable mask in SI register) [1] Evaluating logical expressions full evaluation whole logical expression evaluated before assigning the value to it (Pascal) partial evaluation result can be obtained without evaluating the whole expression (C language) rules used: cond1 AND cond2 (result false, if one of inputs is false) cond1 OR cond2 (if cond1 is true, evaluating of cond2 is not required) partial evaluation more efficient code
11 Bit instructions bit test and modify 4 instructions, syntax bt operand,bit_pos (operand: 16/32-bit R/M, bit_pos: I/R, LSb = 0, bts, btr, btc similarly) semantics (copying the bit into CF) [1] bit scan two instructions, scan direction (bit scan forward/reverse) scan operand for a bit set to 1, if found, bit position returned in register bsf bsr dst_reg,operand (operand: 16/32-bit R/M, dst_reg: 16/32-bit R, bit position) dst_reg,operand if all the bits of operand are zeros: ZF = 1 otherwise: ZF = 0 and dest_reg contains a position of first bit set to 1 found rest of status flags undefined
12 String processing Representing strings fixed length representation shorter strings enlarged to given length longer strings shortened representation disadvantages inefficient memory usage (if shortening is not welcome) variable length representation removing disadvantages of fixed length representation attribute giving the length of string length explicitly given string DB 'Error message' str_len DW $ - string ; $ - actual position in code (location counter) marking the end of string (special character not appearing in a string, sentinel character) usually 00H (ASCIIZ string), C language, further we usually consider this representation string DB 'Error message',0 String instructions 5 basic string instructions in x86 language [1] operands (source, destination) implicit explicit specification of operand size (NASM) usable also for another purposes (copying data memorymemory)
13 Operands of string instructions source (DS:ESI), destination (ES:EDI), both for 16-bit segments (SI, DI) Variations support for 8,16,32-bit data; automatic update (increment/decrement) of index registers used (1,2,4) prefix support for repeated execution (repetition prefix) processing direction forward/backward (direction flag, DF) Prefixes of string instructions unconditional/conditional repeating status flags not affected prefix rep (unconditional repeating, according to the value in ECX/CX) ECX tested firstly for 0 (difference compared to loop) prefix repe/repz (except the ECX also ZF is relevant)
14 prefix repne/repnz (ECX and condition: ZF = 1) Direction of string processing according to the value of DF (DF = 0 forward (auto-increment), DF = 1 backward) DF manipulation (2 instructions without operands, 1B) std cld (set DF) (clear DF) often the direction is not essential (but in some cases is) e.g. shift of string by one position right (from the end: abc0 aabc0, from the beginning: abc0 aaaa0) Moving strings (movs, lods, stos) 3 forms for each of instructions, syntax: movsb, movsw, movsd (lods, stos - similarly) suffix b, w, d explicit specification of operand size (also for other string instructions) movs copy a value (b, w, d) from source string into the destination one lods copy a value from source string (DS:ESI) into AL (lodsb), AX (lodsw), or EAX (lodsd) stos copy a value in AL, AX, or EAX into the destination string (ES:EDI)
15 semantics of instructions movs, lods, stos [1]: String comparison (cmps) compares bytes (words, double-words) at DS:ESI and ES:EDI and sets flags (like cmp) updates values in ESI, EDI (according to DF and operand size) Example: comparing strings [1] leaves ESI pointing to 'g' in string1 EDI pointing to 'f' in string2 after executing dec ESI, dec EDI, these point to the first occurrence of different characters conditional jumps can also be used
16 Scanning strings (scas) scanning for given value in a string value in AL (scasb), AX (scasw), or EAX (scasd), ES:EDI string scanned compares the value in AL (AX, EAX) with the value at ES:EDI and sets flags (like cmp) updates EDI (according to DF) prefixes repe/repz, repne/repnz can be used Instructions lds, les syntax lds les reg,src (reg 32b GPR, src pointer to 48-bit operand in memory) reg,src semantics (32-bit value copied to reg, following 16-bit value to segment register, without affecting flags) lds: reg [src], DS [src+4] les: reg [src], ES [src+4] instructions used with advantage when setting registers (ES:EDI) for string operations (les EDI,string1) Advantages of using string instructions automatic index register update ability to work with two memory operands (other instructions do not support M/M transfers) performance compared to mov with an auxiliary register (elegant and efficient solution) Study literature: [1] Dandamudi,S.,P.: Introduction to Assembly Language Programming, Springer Science+Business Media, Inc., [2] Carter, A., P.: PC Assembly Language, 2006,
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