I Introduction to Real-time Applications By Prawat Nagvajara

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1 Electrical and Computer Engineering I Introduction to Real-time Applications By Prawat Nagvajara Synopsis This note is an introduction to a series of nine design exercises on design, implementation and verification of real-time applications. Real-time applications are software and hardware interacting within a dynamical system. They are implemented on a processor and peripherals which often interface to sensors and actuators. In the series two design exercises - motor speed control and single-tone signal detection are examples of real-time applications. 1. Real-time Applications Real-time application software uses the processor peripherals to interact with other objects in dynamical system. Dynamical system changes with time and the application responds to the changes. Controllers and signal processors are examples of real-time applications in dynamical systems. Figure 1 depicts a view of a real-time application software application runs on processor (hardware), it uses peripherals (hardware) to interact with dynamical system. The application is part of the dynamical system. Dynamical System Hardware Software Fig. 1 Real-time Application Implementing Real-time Application Real-time applications are software that run on the processor systems. Processor system comprises a processor, memory, bus interconnection and peripherals. The peripherals are hardware devices that interact with other components in the dynamical system. For instance, the device that provides means to interface with the external signals is called the General-Purpose Input Output GPIO. GPIOs are circuits that handle input and output signals - digital (two voltage level) and analog (continuous voltage). Peripherals are connected to the processor via the system bus which provides multi-point communication between source and destination devices. The processor reads and writes to the registers of the peripherals by memory-mapped addresses. Integrated Design Environment (IDE) tools provide Application Program Interface (API) functions for tasks performed on the peripherals such as configuration, initialization, start, stop and data transfers. API functions access the peripherals via writes and reads to addresses mapped to the peripheral registers. APIs alleviate programmers having to code the routine tasks. Furthermore, most Integrated Design Environment (IDE) tools provide GUI for the peripheral configuration and generate the configuration codes to be included in the applications. Figure 2 shows a block diagram of Xilinx Vivado IDE project block diagram for FPGA (Field Programmable Gate Array) based implementation. It demonstrates a typical processor system for running a real-time application. It comprises the processor (ZYNQ7 1

2 Processing System), the Processor System Reset, the system bus (AXI Interconnect, AXI is the name of this bus standard), and 4 peripherals. The peripherals are the GPIO for GPIO for buttons (AXI GPIO connected to a port named the buttons which is an input signal port), the switches GPIO, a custom ip (Intellectual Property) hardware peripheral for LEDs drive (led_ip_v1.0) and memory controller (AXI BRAM Controller) which connects to a block RAM memory (block RAM is Field Programmable Gate Array-FPGA). The diagram shows system reset signal connections to additional peripherals not included in the diagram, the FIXED IO and the DDR (Double Data Rate) memory peripherals. Fig. 2 Processor, Bus and Peripherals Tools Integrated Design Environment (IDE) tools provide designers with automation for developing the processing system hardware and software, that is, the tool can build a processing system tailored to the design specification. Designer describes the components, the interconnections and the software application using GUIs and code editors. Automation tools perform the following implementation steps when building the system - placing and routing the peripherals hardware and generates API codes for the peripherals. The building of hardware is a compilation of the block diagram where the blocks and interconnections may be in the form of user Hardware Description Language (HLD) or ready-made Intellectual Property (IP) HLD cores from a library or existing hardware devices. Components such as the processor, the bus and the GPIO often are wired hardware. However, with programmable devices such as FPGA the processors and interconnections often are configured onto the FPGA. Some development boards have fixed peripheral devices. When building the system the tool also generates a set of APIs for each peripheral. The tool generates an arsenal of codes (headers files containing the definitions of memory-mapped peripherals and C files for the API functions). Without automatic code generation aids, designer codes the necessary APIs for the peripherals using write and read to memory locations predefined by the development board manufacturers. Coding APIs from scratch is not difficult but can be tedious and mundane. Real-time Code Structure Consider single-threaded application where the processor does not have real-time operating system, the main program starts by initializing the peripheral hardware components, for example, it initializes the bus communication between the process and peripherals, and the states of the peripherals. The main program also initializes the variables uses for communicating with the subroutines which run when interrupts occur. Interrupt is a mechanism supported by the processor hardware in which the processor branches, temporally leaves the current program execution, when an interrupt event occurs to execute a subroutine program. Hardware interrupt events typically are indicated by digital signal changing from a low voltage, 0 V (0 logic) to a high voltage V DD, e.g., 3.3 V (1 logic) - rising edges, or falling edges. For example, in a computer system pressing a key on the key board or moving a mouse generates a rising edge digital signals which are connected to interrupt input ports of the processor. The processor s operating system switches to execute the routines that handle the keyboard or the mouse input data. In applications there are different interrupt sources (signals) and their corresponding subroutines. Depending on 2

3 which peripherals cause the interrupts and their priority, the processor branches to execute the associated code. 2. Example-Square Wave Period Measurement This section goes into the details of a square wave period measurement application. This design example demonstrates the use of peripherals, the interrupt and application code structure. The example takes the readers through an overview on important concepts covered in the series of exercises in this pamphlet. It first covers the peripherals describing the details on certain component configurations and the APIs generated by the IDE tool. Secondly the example covers the structure of a real-time application code. It is straightforward to use a timer peripheral for measuring elapsed time between two risingedges in a periodic square wave. A timer is a counter that when it is reset to its maximum count and set to free-running mode it counts down on every clock cycle. When a capture input event, for example configured to capture a rising edge, occurs the timer hardware writes the counter content to its register called compare register. The difference between two consecutive readings, from the compare register, right after capture events occur yields the elapsed time. Figure 3 shows a schematic of the peripherals used in the period measurement project developed using the PSoC Creator IDE [1]. The schematic comprises the Timer Counter component named Timer, the UART (Universal Asynchronous Receiver Transceiver the serial port) component named UART, the PWM (Pulse Width Modulation) component named PWM, the GPIO component or pin (configured as a digital input) named Captured_Input, the GPIO component (configured as a digital output) named Sq_Wave_Out, the Interrupt component named CC_ISR, and the Clock components named Clock_1 and Clock_2. The line named External wire connecting the Sq_Wave_Out pin and the Captured_Input pin annotates the connection during the verification after the processing system is built (it is not a component in the IDE tool). Note also that the schematic does not include the processor and the bus. The signal on the external wire is a square wave generated by the PWM. The timer is configured to capture a signal rising-edge event. When a capture happens the timer hardware loads its current counter content to the compare register and generates an interrupt at its interrupt output. Schematic Designer places, configures, connects the peripherals and builds the APIs as below. Fig. 3 PSoC Creator IDE Schematic Fig. 4 Timer Configuration 3

4 Timer Configuration Figure 4 shows the PSoC Creator GUI for the timer configuration. Designer gets to the Configure TCPWM_P4 (TCPWM_P4 is Timer Counter and Pulse Width Modulator PSoC4) by double clicking on the Timer block in the schematic. In the Timer/Counter tap, the interrupt is checked for On Compare/Capture count. This means that the timer will generate an interrupt signal at its interrupt output port on a capture event. The input capture is checked as present and the mode is Rising edge. The Period and Compare Register selections are configured 65,535 = for a maximum freerunning count, that is, the maximum count for a 16-bit counter. The component datasheet provides all information on the hardware and the APIs (Datasheet button is at the bottom left corner in Fig. 4). Interrupt Component The interrupt component named CC_ISR is connected to the timer interrupt output. It is an interface block that defines the interrupt trigger hardware. Designer configures the name of the interrupt, e.g., CC_ISR (Capture Counter Interrupt Service Routine), and the type of interrupt using the GUI. The generated APIs for this interrupt will have names started with CC_ISR_*, for example the API function CC_ISR_Start_Ex(InterruptHandler) sets up the interrupt routine named InterruptHandler where the function CY_ISR allows the designer to code the interrupt routine, Fig. 5 UART Configuration Pulse Width Modulator The design also uses the Pulse Width Modulator) component named PWM for generating test signal. Designer can verify the correctness without using external signal generator. The PWM output port line is connected to the digital output pin Sq_Wave_ Out (Fig. 3). CY_ISR(InterruptHandler) { Interrupt code for a routine named InterruptHandler }; In the main code designer codes CC_ISR_Start_Ex(InterruptHandler); to declare and set up the InterruptHandler. Universal Asynchronous Receiver Transmitter The UART component is configured with the parameters shown in Fig. 5. The baud rate is Fig. 6 PWM Configuration The PWM generates a periodic digital signal with single pulse per period. Application 4

5 software can program during run time the period and the pulse width using the APIs. Designer initializes the PWM configuration using the Configure TCPWM_P4 window, PWM tap (Fig. 6). The Period entry is 2000 counts and the Compare (pulse width) is 500 counts. With a 1MHz clock frequency (Clock_2 in Fig. 3) the period is 2000μs (2 ms) and the pulse width is 500μs. Oscilloscope measurement of the PWM line output (Fig. 7) shows 3.3V peak voltage amplitude (vertical axis) and the horizontal time axis with 500μs per division. Fig. 8 Digital Input GPIO Configuration Fig. 7 Sq_Wave_Out Port Measurement General-Purpose Input Output The GPIO (General Purpose Input Output) pin component named Captured_Input is configured in the Configure cy_pins window with Name assigned as Captured_Input (Fig. 8), in the Type tap is configured as Digital Input and HW Connection (hardware connection) that is a wire connection from the pin must be made to other components. The Preview shows the circuit diagram. The pin (square box with cross mark) is connected to a buffer (triangle) whose output is connected to a terminal (square box). The buffer input is to be either connected to ground or V DD (drain voltage rail). Fig. 9 Digital Input Drive Mode In the General tap (Fig. 9), Drive Mode is selected as High Impedance Digital which means that the drive output circuit an open circuit. The PWM signal is the input which supplies the ground or the V DD connection. In some cases digital input signals do not supply the ground or V DD connection leaving the port open, in which case, the Drive Mode circuit can complete the circuit connection. For example, the pin is connected to a device that grounds the pin for Logic 0 and leaves the pin open (floated) for Logic 1. In this case the GPIO drive mode supplies the V DD connection with resistive load when the pin is floated. When the pin is grounded the buffer input is grounded, and the resistive load prevents a short circuit between 5

6 V DD rail and ground (Fig. 10). Figure 10 shows a circuit where the DR Initial State is High (1) and the output of the inverter is Low (0) which makes the p-type MOS transistor (the top transistor) closed and the n-type (bottom) transistor open. Fig. 10 Resistive Pull-up Drive Mode Assigning GPIO to Physical Pins The GPIO Captured_Input and Sq_Wave_Out are assigned to actual pins available on the. PSoC Creator IDE has the pin assignment under.cydwr, TimerExample01.cydwr in the Workspace panel (Fig. 11). Fig. 11 Workspace Panel The GPIO-to-ports assignments (Fig. 12) consist of the rx and tx (receive and transmit) for the UART (not shown in the schematic Fig. 3). These are assigned to Ports P0[4] and P0[5]. GPIO Captured_Input and Sq_Wave_Out are assigned to Port P0[0] and P1[0]. Fig. 12 GPIO-to-Port Assignments Period Measurement Application Code The code (Fig. 13) consists of the interrupt routine named InterruptHandler, a function printint for printing integer on the serial port using the UART peripheral and the main program. The code includes the device.h header file for the APIs and the definitions and the stdio.h, the C Standard IO header file. It declares two 32-bit unsigned integer variables t0 and Period. The variable t0 is the old timer count stored at the last rising-edge capture event. The period is the difference between current and last counts captured at two consecutive rising-edge capture events. It declares an 8-bit unsigned integer variable data_ready, a flag used between the interrupt routine and the main program. The convention used in this particular IDE (PSoC Creator) is the generated APIs and definitions format begins with the component name, underscore then followed by the generic API or definition name. For example, the component Timer has the generated start API as Timer_Start() and the clear interrupt flag API function as Time_ClearInerrupt(Timer_INTR_ MASK_CC_MATCH). When an interrupt event on the CC_ISR component occurs (see Fig. 3), the interrupt code first clears the Timer interrupt flag. The API ClearInterrupt() is used with bit vector variable corresponding to the timer status register interrupt flag bits Timer_INTR_MASK_ CC_MATCH. It next calculates the difference between current count, the Timer_Read Capture() and the previous count t0. It then updates t0 with current count and sets the data_ready flag telling the main program. 6

7 the data_ready flag (a variable indicating new Period is available) it prints the Period value and reset the data_ready flag. A function CyDelay(200) pulses the processor for 200ms, making the printing action more visible. Implementation and Verification Reader can follow the design steps for this example. This involves 1. Place, configure the components and build 2. Edit main.c and build 3. Assign ports and build 4. Connect USB cable between the development board (CY8CKIT-024) and host computer, and program 5. Verify results Results Output on Serial Terminal When using the UART on the PSoC 4 CY8CKIT- 024 board [2], user wires the rx and tx (Ports P0[4] and P0[5]) to P12[7] and P12[6] (yellow wires in Fig. 14). The external wire (red wire in Fig. 13) connects P0[0] (Captured_ input) and P1[0] (Sq_Wave_Out). Fig. 14 CY8CKIT-024 Implementation Photo Fig. 13 Real-time Application Code Example The main program first enables the global interrupts, it then sets up the InterruptHandle" and starts the UART, the PWM and the Timer. The main program then goes into the control loop that is a program loop that repeats indefinitely a sequence of steps. In the control loop the program continuously checks (polls) on The processor uses the UART to communicate through the serial ports with, for instance, a serial terminal emulator application (e.g., the putty application). The host computer used for programming the microcontroller in this case a PSoC device also runs PuTTY and displays the design output the measured period of the square wave. 7

8 The setup for the terminal on PuTTY is shown in Fig. 15. Reader will need to verify the actual serial COM port number in the Device Manager under Ports (COM and LPT). 1. Universal Asynchronous Receiver Transmitter (UART) peripheral. 2. General Purpose Input Output (GPIO) 3. Pulse Width Modulator (PWM) 4. Timer 5. Speed control Project 6. Analog-to-Digital Converter (ADC) 7. Ping-Pong Buffer 8. Single-tone detection Project 4. Conclusions From doing the design exercises reader will better understand the basic concepts used in implementing real-time applications. Real-time operating system (RTOS) supporting multithread applications are used in practical applications. Further study includes implementation of RTOS applications and programming. Fig. 15 Serial Connection Parameters References 1. PSoC Creator Quick Start Guide 2. CY8CKIT-024 Pioneer Kit Guide Fig. 16 PuTTY Terminal Display Figure 16 shows PuTTY terminal displaying the difference between two consecutive contents of the timer compare register read when capture events occur. The period measured is the difference less one which corresponds to 2000μs. 3. Series of Design Exercises A series of design exercises that leads up to the motor speed control and single tone detection projects: 8