DAT (cont d) Assume a page size of 256 bytes. physical addresses. Note: Virtual address (page #) is not stored, but is used as an index into the table

Transcription

1 Assume a page size of 256 bytes 5 Page table size (determined by size of program) B 00 xxxxxx xxxxxx physical addresses Residency Bit (0 page frame is empty) Note: Virtual address (page #) is not stored, but is used as an index into the table 10/16/ Computer Organization 122 What is the real/physical address for virtual address 00011F? 0001 indicates virtual page number 1F is the offset from start of the page DAT translates this address to 420B 1F Note that 1F is translation independent The page at virtual address was placed in the page frame at physical address 420B 00 Only the page number part is changed 10/16/ Computer Organization 123 1

2 In a paging system, a virtual address therefore consists of two parts: Pi: virtual page number (used as an index into the page table) Dj: displacement within a page (translation independent) Pi Dj 10/16/ Computer Organization 124 DAT H/W VPi Dj Virtual Address DAT Unit Page Table PPi 10/16/ Computer Organization 125 Dj Physical Address So far - Hardware provides the basis for paging - DAT: VA PA and page fault interrupt generation - O/S (software) provides "intelligence" - builds page tables and controls page table register - O/S gains control on page fault, protection violation, etc. 2

3 This scheme works, but we have a problem: we require two Mp accesses for every one address generated by the CPU (1) we are looking up the physical address in the page table in which is, itself, stored in Mp (2) we then have to access Mp (or the cache) assuming the page is resident to load/store the data Solution: maintain an address cache, also known as a translation look-aside buffer (TLB) 10/16/ Computer Organization 126 To avoid the overhead of two Mp accesses we maintain the TLB so that it contains the most recently used page table entries The TLB is relatively small and can therefore be built using CAM (for fast parallel searches) TLB must be maintained in much the same way as with a normal cache Except it contains address translations not data/code TLB must also be flushed whenever a new process takes control (discard entirely or save it to Mp?) 10/16/ Computer Organization 127 3

4 Example: 16MB virtual address space (24 bit address) 256 byte page size (8 bit offset, 16 bit virtual page number) 4 entry Translation Look-aside Buffer F 1 003A 1 010F 0 xxxx 0 xxxx xxxx VP# PP# F F TLB (LRU Replacement) Current Page Table 10/16/ Computer Organization 128 Consider Three Memory Accesses: 0002 BC Virtual Page Number is 0002 Use this as an index into the TLB entry is in TLB (Physical Page Number is 010F) one Mp reference to 010F BC 10/16/ Computer Organization 129 4

5 Virtual Page Number is 0001 entry is not in the TLB check page table for residency (page is resident) apply LRU replacement in TLB (because it is full); assume is LRU so it will be replaced two Mp accesses are required - 1 for page table access + actual access As long as this is infrequent performance will be OK Does TLB have high hit rate? Is there locality in addresses? Effect of page size? 10/16/ Computer Organization C Virtual Page Number is 0004 entry is not in the TLB check page table for residency page is not resident in Mp, so DAT unit signals a page fault and 10/16/08 COMP Computer Organization 131 5

6 O/S takes control and coordinates the necessary context switch save current process context (registers, TLB, etc.) to Mp select another process for execution loads Page Table Register and purges contents of TLB Starts page-in for the page that caused the page fault (select page frame, apply replacement scheme if necessary, start I/O) 10/16/ Computer Organization 132 More Virtual Memory When all page frames in Mp are currently in use and a page fault occurs then the O/S must select a page frame for replacement LRU, LFU, FIFO, random, etc. Consider LRU replacement: for each resident page, we must maintain some indication of when it was last used There are a couple of implementation possibilities 10/16/ Computer Organization 133 6

7 Add a time stamp to the page table entries residency bit, physical page number, time of last access at replacement time, we must search the page table to find the entry with the oldest time stamp problem: must search all page table entries for all currently executing programs ---> even entries for non-resident Virtual Pages This will be slow!!! 10/16/ Computer Organization 134 Build a queue containing all resident pages every time an access to a resident page is made, move the queue entry for that page to the bottom of the queue when replacement is required, simply use the page frame for the entry at the top of the queue But there is a significant problem with this approach. 10/16/ Computer Organization 135 7

8 Since the queue is unordered, we must use a linear search through the queue each time a resident page is accessed to find entry corresponding to the reference made in order to move it to the end of the queue Of course, page replacement occurs much less frequently then page access so this is less of a problem but still results in lots of extra overhead that is not necessary we would rather incur overhead only at replacement time 10/16/ Computer Organization 136 Use a Page Frame Table instead of constructing a queue, let's construct a page frame table stores all of the necessary information associated with each page frame in Mp Search time for LRU page at replacement time is now constant - equal to number of page frames in Mp and the overhead for the search is only incurred at replacement time (less frequent) 10/16/ Computer Organization 137 8

9 Structure of a Page Frame Table Entry Residency Bit Time Field (or Count) Residency Bit: indicates if the page frame is in use (contains a resident page) Reference Bit: Process Identifier Page Number Reference Bit Dirty Bit set by the hardware whenever the page in the page frame is accessed 10/16/ Computer Organization 138 Dirty Bit: set by the hardware if a write access to the page occurs (used to determine whether the page has to be written back to disk when it is replaced) Process Number: id of process/program that owns the page (used to determine access violations) Page Number: virtual page number of the resident page (used to determine the proper Page Slot for the page on disk) 10/16/ Computer Organization 139 9

10 How do we use the PFT to implement the LRU replacement scheme? the reference bit in a PFT entry can be set (by H/W) each time the program accesses the corresponding page at regular intervals, the O/S checks the reference bit in each PFT entry: OFF: page not referenced since last check (O/S increments time count) ON: page referenced since last check (O/S clears time count) 10/16/ Computer Organization 140 after checking each reference bit the O/S clears it (sets up for next check) pages accessed recently will have low time counts; others will have high time counts at page fault time, the page with the highest count is selected for replacement this scheme approximates LRU without the added overhead of maintaining a complete time stamp on each reference This approach is successful because the page frame table is searched only at fault times 10/16/ Computer Organization

11 Note: O/S does not update the time count field on every reference (for efficiency reasons)... Done much less frequently The technique is also more space efficient than storing the actual time of the last access and still conforms closely to LRU replacement the more often the time counts are updated, the more accurate the approximation to LRU Reasonable results with relatively infrequent updates 10/16/ Computer Organization 142 VM and DAT Summary What we have discussed is a general approach to paging all paging systems need page tables to describe how a program / process is mapped onto physical memory paging systems also need a page frame table to describe the page frames in Mp For efficiency in replacement format, organization, and processing will differ for different architectures 10/16/ Computer Organization

12 Virtual Memory is not paging paging is only one approach to implementing virtual memory other approaches exist: segmentation demand segmentation segmented paging 10/16/ Computer Organization 144 How do the DAT hardware and the paging software (O/S) interact? program is made available for execution size of page table is then known At least initially page table is allocated in Mp and all entries are initialized to indicate they are non-resident 10/16/ Computer Organization

13 Some initial pages of the program are loaded (Paged-In) may involve replacement of other pages From different processes O/S marks these new pages as resident and updates page table address info O/S updates page frame table entry for each page frame used sets owner, residency bit clears time count, reference bit, and dirty bit 10/16/ Computer Organization 146 O/S schedules process for execution The DAT unit s TLB is purged (may be saved with process context info) O/S sets the page table register to the new process page table control is transferred to the new process Program executes CPU generates virtual addresses that are translated by DAT to physical addresses 10/16/ Computer Organization

14 If an address is generated that is outside the virtual address space of the process, then an Access Violation interrupt is generated O/S handles interrupt and normally aborts the offending program 10/16/ Computer Organization 148 If a non-resident address is generated, the DAT unit will signal a Page Fault interrupt O/S services the interrupt searches page frame table for a free page frame if an empty page frame is found, schedule page -in to it if Mp is full, apply replacement scheme page-out selected page frame if dirty bit is set schedule page-in to selected page frame 10/16/ Computer Organization

15 O/S initiates page-in I/O request is scheduled and queued context switch occurs (since I/O is slow) TLB purged, set page table register to next process,... Page-In completes sometime later I/O system generates I/O-completion interrupt which OS services updates page table for faulting process and PFT entry process is placed in READY state (was BLOCKED) so O/S can select it next time it performs a context switch 10/16/ Computer Organization 150 Note: if an invalid access to the page occurs (e.g. write to read only pages) then a Protection Violation occurs CPU is interrupted and O/S takes control and aborts process 10/16/ Computer Organization