Cross Clock-Domain TDM Virtual Circuits for Networks on Chips

Transcription

1 Cross Clock-Domain TDM Virtual Circuits for Networks on Chips Zhonghai Lu Dept. of Electronic Systems School for Information and Communication Technology KTH - Royal Institute of Technology, Stockholm May 4, th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 1 / 20

2 Outline: The PARC structure 1 Problem 2 Approach 3 Result 4 Conclusion 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 2 / 20

3 Outline: The PARC structure 1 Problem 2 Approach 3 Result 4 Conclusion 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 2 / 20

4 Outline: The PARC structure 1 Problem 2 Approach 3 Result 4 Conclusion 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 2 / 20

5 Outline: The PARC structure 1 Problem 2 Approach 3 Result 4 Conclusion 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 2 / 20

6 Problem Cross Clock-Domain QoS Quality-of-Service (QoS): A key challenge for NoCs QoS communication: Provide performance (delay and throughput) guarantees under worst-case conditions. Complications Non-deterministic network contention for shared buffers, crossbars, and links. An advanced SoC typically encompasses many clock domains to manage the clocking complexity and increase power efficiency. 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 3 / 20

7 Problem Cross Clock-Domain QoS Quality-of-Service (QoS): A key challenge for NoCs QoS communication: Provide performance (delay and throughput) guarantees under worst-case conditions. Complications Non-deterministic network contention for shared buffers, crossbars, and links. An advanced SoC typically encompasses many clock domains to manage the clocking complexity and increase power efficiency. 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 3 / 20

8 Problem Cross Clock-Domain QoS Quality-of-Service (QoS): A key challenge for NoCs QoS communication: Provide performance (delay and throughput) guarantees under worst-case conditions. Complications Non-deterministic network contention for shared buffers, crossbars, and links. An advanced SoC typically encompasses many clock domains to manage the clocking complexity and increase power efficiency. 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 3 / 20

9 Problem Cross Clock-Domain QoS Related Work A. Hansson, M. Subburaman, and K. Goossens. Aelite: A flit-synchronous network on chip with composable and predictable services. In Proceedings of the Design, Automation and Test in Europe Conference (DATE 09), April Z. Lu and A. Jantsch. TDM virtual-circuit configuration for network-on-chip. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 16(8): , S. Evain, J.-P. Diguet, and D. Houzet. NoC design flow for TDMA and QoS management in a GALS context. EURASIP Journal on Embedded Systems, pages 1 12, th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 4 / 20

10 Divide-and-Conquer Approach Divide: Partition the chip into multiple communicating synchronous regions. GALS communication style A general FIFO domain interface Conquer: Design reuse plus formal performance analysis For each synchronous region, reuse (synchronous) time-division-multiplexing (TDM) virtual circuits (VC); Address cross-domain issues to ensure correct operation; Determine cross-domain delay and backlog bounds. 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 5 / 20

11 Divide-and-Conquer Approach Divide: Partition the chip into multiple communicating synchronous regions. GALS communication style A general FIFO domain interface Conquer: Design reuse plus formal performance analysis For each synchronous region, reuse (synchronous) time-division-multiplexing (TDM) virtual circuits (VC); Address cross-domain issues to ensure correct operation; Determine cross-domain delay and backlog bounds. 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 5 / 20

12 Divide-and-Conquer Approach Divide: Partition the chip into multiple communicating synchronous regions. GALS communication style A general FIFO domain interface Conquer: Design reuse plus formal performance analysis For each synchronous region, reuse (synchronous) time-division-multiplexing (TDM) virtual circuits (VC); Address cross-domain issues to ensure correct operation; Determine cross-domain delay and backlog bounds. 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 5 / 20

13 Divide-and-Conquer Approach Divide: Partition the chip into multiple communicating synchronous regions. GALS communication style A general FIFO domain interface Conquer: Design reuse plus formal performance analysis For each synchronous region, reuse (synchronous) time-division-multiplexing (TDM) virtual circuits (VC); Address cross-domain issues to ensure correct operation; Determine cross-domain delay and backlog bounds. 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 5 / 20

14 Divide-and-Conquer Approach Divide: Partition the chip into multiple communicating synchronous regions. GALS communication style A general FIFO domain interface Conquer: Design reuse plus formal performance analysis For each synchronous region, reuse (synchronous) time-division-multiplexing (TDM) virtual circuits (VC); Address cross-domain issues to ensure correct operation; Determine cross-domain delay and backlog bounds. 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 5 / 20

15 Divide-and-Conquer Approach Divide: Partition the chip into multiple communicating synchronous regions. GALS communication style A general FIFO domain interface Conquer: Design reuse plus formal performance analysis For each synchronous region, reuse (synchronous) time-division-multiplexing (TDM) virtual circuits (VC); Address cross-domain issues to ensure correct operation; Determine cross-domain delay and backlog bounds. 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 5 / 20

16 Divide-and-Conquer Approach Divide: Partition the chip into multiple communicating synchronous regions. GALS communication style A general FIFO domain interface Conquer: Design reuse plus formal performance analysis For each synchronous region, reuse (synchronous) time-division-multiplexing (TDM) virtual circuits (VC); Address cross-domain issues to ensure correct operation; Determine cross-domain delay and backlog bounds. 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 5 / 20

17 Approach TDM VC A VC is an end-to-end connection which reserves cyclically S out of N time slots to share each passing link bandwidth. D max = D init + D trans = ((N S) + H) T (1) Θ = S N F (2) H: hop count from source to destination; F, T : clock frequency, period. Based on the same notion of time, globally coordinating slot allocation to share link bandwidth in a time-division fashion. Flow on a VC enjoys pipelined, in-order, contention-free delivery, like passing an established circuit. 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 6 / 20

18 Approach TDM VC A VC is an end-to-end connection which reserves cyclically S out of N time slots to share each passing link bandwidth. D max = D init + D trans = ((N S) + H) T (1) Θ = S N F (2) H: hop count from source to destination; F, T : clock frequency, period. Based on the same notion of time, globally coordinating slot allocation to share link bandwidth in a time-division fashion. Flow on a VC enjoys pipelined, in-order, contention-free delivery, like passing an established circuit. 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 6 / 20

19 Approach TDM VC A VC is an end-to-end connection which reserves cyclically S out of N time slots to share each passing link bandwidth. D max = D init + D trans = ((N S) + H) T (1) Θ = S N F (2) H: hop count from source to destination; F, T : clock frequency, period. Based on the same notion of time, globally coordinating slot allocation to share link bandwidth in a time-division fashion. Flow on a VC enjoys pipelined, in-order, contention-free delivery, like passing an established circuit. 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 6 / 20

20 Property and Example Approach TDM VC properties Hard guarantees in delay and throughput Low cost: one buffer per hop Flow composition over shared links An example 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 7 / 20

21 Property and Example Approach TDM VC properties Hard guarantees in delay and throughput Low cost: one buffer per hop Flow composition over shared links An example 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 7 / 20

22 Property and Example Approach TDM VC properties Hard guarantees in delay and throughput Low cost: one buffer per hop Flow composition over shared links An example 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 7 / 20

23 Property and Example Approach TDM VC properties Hard guarantees in delay and throughput Low cost: one buffer per hop Flow composition over shared links An example 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 7 / 20

24 Clock domain interface Approach One FIFO, two distinct clocks with fixed-relation frequency One writer, one reader Handshaking protocol. A composite flow may split after crossing the FIFO interface. 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 8 / 20

25 Clock domain interface Approach One FIFO, two distinct clocks with fixed-relation frequency One writer, one reader Handshaking protocol. A composite flow may split after crossing the FIFO interface. 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 8 / 20

26 Clock domain interface Approach One FIFO, two distinct clocks with fixed-relation frequency One writer, one reader Handshaking protocol. A composite flow may split after crossing the FIFO interface. 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 8 / 20

27 Clock domain interface Approach One FIFO, two distinct clocks with fixed-relation frequency One writer, one reader Handshaking protocol. A composite flow may split after crossing the FIFO interface. 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 8 / 20

28 Approach Cross domain issues Synchronous TDM VC assumes global synchrony, which does not exist any more with multiple clock domains. Correct operation Sufficient bandwidth reservation Read-write synchronization Event preservation Performance analysis Per-flow cross-domain delay bound Cross-domain backlog bound (FIFO size) 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 9 / 20

29 Approach Cross domain issues Synchronous TDM VC assumes global synchrony, which does not exist any more with multiple clock domains. Correct operation Sufficient bandwidth reservation Read-write synchronization Event preservation Performance analysis Per-flow cross-domain delay bound Cross-domain backlog bound (FIFO size) 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 9 / 20

30 Approach Cross domain issues Synchronous TDM VC assumes global synchrony, which does not exist any more with multiple clock domains. Correct operation Sufficient bandwidth reservation Read-write synchronization Event preservation Performance analysis Per-flow cross-domain delay bound Cross-domain backlog bound (FIFO size) 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 9 / 20

31 Approach Cross domain issues Synchronous TDM VC assumes global synchrony, which does not exist any more with multiple clock domains. Correct operation Sufficient bandwidth reservation Read-write synchronization Event preservation Performance analysis Per-flow cross-domain delay bound Cross-domain backlog bound (FIFO size) 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 9 / 20

32 Approach Cross domain issues Synchronous TDM VC assumes global synchrony, which does not exist any more with multiple clock domains. Correct operation Sufficient bandwidth reservation Read-write synchronization Event preservation Performance analysis Per-flow cross-domain delay bound Cross-domain backlog bound (FIFO size) 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 9 / 20

33 Approach Cross domain issues Synchronous TDM VC assumes global synchrony, which does not exist any more with multiple clock domains. Correct operation Sufficient bandwidth reservation Read-write synchronization Event preservation Performance analysis Per-flow cross-domain delay bound Cross-domain backlog bound (FIFO size) 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 9 / 20

34 Approach Cross domain issues Synchronous TDM VC assumes global synchrony, which does not exist any more with multiple clock domains. Correct operation Sufficient bandwidth reservation Read-write synchronization Event preservation Performance analysis Per-flow cross-domain delay bound Cross-domain backlog bound (FIFO size) 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 9 / 20

35 Bandwidth reservation Approach Addressing Cross-Domain Issues Non-decreasing bandwidth reservation r S i N i F i S j N j F j S k N k F k (3) where r: flow rate; {S i N i, S j N j, S k N k }. It will be insufficient if it is changed to r S i N i F i, r S j N j F j, r S k N k F k, as these inequalities can not ensure the preservation of all upstream events at the domain interface. 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 10 / 20

36 Bandwidth reservation Approach Addressing Cross-Domain Issues Non-decreasing bandwidth reservation r S i N i F i S j N j F j S k N k F k (3) where r: flow rate; {S i N i, S j N j, S k N k }. It will be insufficient if it is changed to r S i N i F i, r S j N j F j, r S k N k F k, as these inequalities can not ensure the preservation of all upstream events at the domain interface. 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 10 / 20

37 Approach Read-write synchronization Addressing Cross-Domain Issues Use blocking-read to align timing mismatch. 3T 1 = 4T 2 WRONG! CORRECT 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 11 / 20

38 Approach Addressing Cross-Domain Issues Event preservation Need to transmit all events to preserve timing information crossing the domain boundary. A dummy packet, P d, may be used. WRONG! CORRECT 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 12 / 20

39 Approach Analysis of Delay and Buffer Bounds Network calculus Network Calculus is a mathematical framework to derive per-flow worst-case delay and backlog bounds in communication networks. An arrival curve bounds the accumulated amount of traffic of a flow. A service curve describes the minimal service level of a network element. References R. L. Cruz. A calculus for network delay, part I: Network elements in isolation and part II: Network analysis. IEEE Transactions on Information Theory, 37(1), January C.-S. Chang. Performance Guarantees in Communication Networks. Springer Verlag, J. Y. L. Boudec and P. Thiran. Network Calculus: A Theory of Deterministic Queuing Systems for the Internet. Number 2050 in LNCS, Springer Verlag, th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 13 / 20

40 Approach Analysis of Delay and Buffer Bounds Network calculus Network Calculus is a mathematical framework to derive per-flow worst-case delay and backlog bounds in communication networks. An arrival curve bounds the accumulated amount of traffic of a flow. A service curve describes the minimal service level of a network element. References R. L. Cruz. A calculus for network delay, part I: Network elements in isolation and part II: Network analysis. IEEE Transactions on Information Theory, 37(1), January C.-S. Chang. Performance Guarantees in Communication Networks. Springer Verlag, J. Y. L. Boudec and P. Thiran. Network Calculus: A Theory of Deterministic Queuing Systems for the Internet. Number 2050 in LNCS, Springer Verlag, th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 13 / 20

41 Approach Analysis of Delay and Buffer Bounds Network calculus Network Calculus is a mathematical framework to derive per-flow worst-case delay and backlog bounds in communication networks. An arrival curve bounds the accumulated amount of traffic of a flow. A service curve describes the minimal service level of a network element. References R. L. Cruz. A calculus for network delay, part I: Network elements in isolation and part II: Network analysis. IEEE Transactions on Information Theory, 37(1), January C.-S. Chang. Performance Guarantees in Communication Networks. Springer Verlag, J. Y. L. Boudec and P. Thiran. Network Calculus: A Theory of Deterministic Queuing Systems for the Internet. Number 2050 in LNCS, Springer Verlag, th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 13 / 20

42 Approach Analysis of Delay and Buffer Bounds Linear arrival curve, Latency-rate service curve Linear arrival curve: α r,b (t) = rt + b, where r bounds the rate and b limits the burstiness of the flow. Latency-rate server: β R,T (t) = R(t T ) +, where R is the service rate and T the maximum processing delay. flits (t) =rt + b flits (t) =R(t T ) + flits (t) flits (t) traffic (t) (t) b b T + b R b b + rt time T time T time T (a) Arrival Curve (b) Service Curve (c) Delay Bound (d) Backlog Bound time Figure 1: Performance bounds for linear arrival curve and latency-rate service curve. 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 14 / 20

43 Result The analytical model Model the composite flow with a linear arrival curve, TSPEC (Traffic SPECification), α (L,p,σ,ρ) (t) = min(l + pt, σ + ρt), characterizing both peak and average traffic behavior. Model the service (reading data out) as a latency-rate server. Apply basic analytic results for delay and buffer bounds. 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 15 / 20

44 Result The analytical model Model the composite flow with a linear arrival curve, TSPEC (Traffic SPECification), α (L,p,σ,ρ) (t) = min(l + pt, σ + ρt), characterizing both peak and average traffic behavior. Model the service (reading data out) as a latency-rate server. Apply basic analytic results for delay and buffer bounds. 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 15 / 20

45 Result The analytical model Model the composite flow with a linear arrival curve, TSPEC (Traffic SPECification), α (L,p,σ,ρ) (t) = min(l + pt, σ + ρt), characterizing both peak and average traffic behavior. Model the service (reading data out) as a latency-rate server. Apply basic analytic results for delay and buffer bounds. 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 15 / 20

46 Result The arrival and service curves Determine parameters for TSPEC parameters, L, p, σ, ρ. n n σ = (N j S i + 1) S i /N j (4) i=1 i=1 n ρ = F j S i /N j (5) i=1 Determine parameters for R (rate), and T max, maximum processing delay. n R = F k S i /N k (6) i=1 n T max = τ 0 + τ = τ 0 + (N k S i )T k (7) i=1 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 16 / 20

47 Result The delay and buffer bounds Delay bound Buffer bound D = L + θ(p R)+ R + T max (8) B = σ + ρt max + (θ T max ) + [(p R) + p + ρ] (9) 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 17 / 20

48 Result Cross-domain analysis steps 1 Configuration of slot tables 2 Derive cross-domain arrival and service curves 3 Calculate delay and backlog bounds An example is given in the paper. 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 18 / 20

49 Conclusion Conclusion With correct operation strategies, TDM VCs can smoothly cross clock domain boundaries, maintaining nice properties in hard delay and throughput guarantees. Network calculus can be applied for cross-domain delay and buffer analysis with ease. Extensions Cover a boundary node with multiple clock domain interfaces Support DVFS 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 19 / 20

50 Conclusion Conclusion With correct operation strategies, TDM VCs can smoothly cross clock domain boundaries, maintaining nice properties in hard delay and throughput guarantees. Network calculus can be applied for cross-domain delay and buffer analysis with ease. Extensions Cover a boundary node with multiple clock domain interfaces Support DVFS 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 19 / 20

51 Conclusion Conclusion With correct operation strategies, TDM VCs can smoothly cross clock domain boundaries, maintaining nice properties in hard delay and throughput guarantees. Network calculus can be applied for cross-domain delay and buffer analysis with ease. Extensions Cover a boundary node with multiple clock domain interfaces Support DVFS 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 19 / 20

52 Conclusion Conclusion With correct operation strategies, TDM VCs can smoothly cross clock domain boundaries, maintaining nice properties in hard delay and throughput guarantees. Network calculus can be applied for cross-domain delay and buffer analysis with ease. Extensions Cover a boundary node with multiple clock domain interfaces Support DVFS 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 19 / 20

53 Conclusion Conclusion With correct operation strategies, TDM VCs can smoothly cross clock domain boundaries, maintaining nice properties in hard delay and throughput guarantees. Network calculus can be applied for cross-domain delay and buffer analysis with ease. Extensions Cover a boundary node with multiple clock domain interfaces Support DVFS 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 19 / 20

54 Any Questions? Thank you! 5th Symposium on NoCs (NoCS 11) Cross Clock-Domain TDM Virtual Circuits May 4, Pittsburgh, USA 20 / 20