Embedded Software TI2726 B. 4. Interrupts. Koen Langendoen. Embedded Software Group
|
|
- May Wheeler
- 5 years ago
- Views:
Transcription
1 Embedded Software 4. Interrupts TI2726 B Koen Langendoen Embedded Software Group
2 What is an Interrupt? Asynchronous signal from hardware Synchronous signal from software Indicates the need for attention Indicates the need for execution change 3
3 Why Interrupts? Avoid wasting time in polling loops for external events Make a system reactive and simple Make debugging more fun CPU I2C Switches Internal errors Buttons Sensors Timers Actuators RS232 4
4 Interrupts: Principle dev 1 IRQ # IRQ contr CPU Context switch dev N Program:... MOVE R1, (var-addr) MULT R1, 9 DIVIDE R1, 5 ADD R1, HW CALL ISR: PUSH R1... POP R1 RET 5
5 Where is the interrupt code? Intel 8051 default locations for interrupt service routines Interrupt vector table Where is the interrupt vector table? Default location (Intel 80186) Programmable location 6
6 Some questions Can a microprocessor be interrupted in the middle of an instruction? Which interrupt goes first? Interrupt during another interrupt? What happens immediately after the interrupts are enabled? What is the status of interrupts when the processor starts? 7
7 ATmega2560 too complex 100 pins 54 interrupt sources 8
8 Roll your own: FPGA + Soft Core Xilinx XC3S MHz, 200k gates I/O, LEDs, SSD, buttons, RS232 X32 soft core 32 bit processor peripherals: UART, PWM, timer, decoder 9
9 X32 Peripheral Interrupts buttons, LEDs, SSD, switches, timers, RS232, off-board I/O ports Peripheral 0 - K IRQ 0 IRQ n Interrupt Controller CPU multiple IRQ lines per peripheral possible (e.g., tx+rx IRQ per UART) CPU 10
10 X32: Interrupt Sources CPU: divide by 0, overflow (disable unless needed!) Buttons, switches, I/O ports positive AND negative edge triggered Timers: counter value > threshold reg UART: rx buffer char received / tx buffer empty 11
11 X32: Interrupt Controller IRQ 0 Interrupt Controller interrupt acknowledge IRQ n IE k, prio k, vector k IE_global vector priority exec level CPU FSM for each IRQ: IRQ. IE IE_global. (priority > exec level) stdby IE scheduled acknowledge servicing / interrupt 12
12 X32 Interrupts IRQ # IRQ contr CPU IRQ controller preprocesses multiple IRQ s Each device: (IRQ #, priority, associated with IRQ vector) Vectored IRQ Interrupts NOT disabled automatically Automatic ISR preemption if prio IRQ > prio current ISR Normal call saves context > no interrupt keyword 13
13 X32: Demo Demo.. (x32_projects.tgz, leds.c, buttons.c) 14
14 Shared Data Problem? void isr_read_temps(void) itemp[0] = peripherals[..]; itemp[1] = peripherals[..]; void NOT ATOMIC! main(void)... while (TRUE) tmp0 = itemp[0]; tmp1 = itemp[1]; if (tmp0!= tmp1) panic(); Possible Context Switch Book: page 92 15
15 Finding this bug Can be very tricky The bug does not occur always! Frequency depends on The frequency of interrupts Length of the critical section Problem can be difficult to reproduce Advise: double check the access on data used by ISR! 16
16 Solving the Data Sharing Problem? void void isr_read_temps(void) itemp[0] = peripherals[..]; itemp[1] = peripherals[..]; main(void)... while (TRUE) if (itemp[0]!= itemp[1]) panic(); MOVE R1, (itemp[0]) MOVE R2, (itemp[1]) SUBSTRACT R1,R2 JCOND ZERO, TEMP_OK TEMP_OK: 17
17 Solution #1 Disable interrupts for the ISRs that share the data... while (TRUE)!! DISABLE INT tmp0 = itemp[0]; tmp1 = itemp[1];!! ENABLE INT if (tmp0!= tmp1) panic(); The critical section is now atomic 18
18 X32: Demo Demo.. (x32_projects.tgz, critical.c) 19
19 Atomic & critical section A part of a program is atomic if it cannot be interrupted Interrupts and program code share data atomic can also refer to mutual exclusion Two pieces of code sharing data They can be interrupted The instructions that must be atomic = critical section 20
20 Be careful! static int iseconds, iminutes; void interrupt vupdatetime(void) ++iseconds; if (iseconds>=60) iseconds=0; ++iminutes; long lseconds(void) disable(); return (iminutes*60+iseconds); enable(); too little, too late 21
21 Function calls and enable() enable() can be a source of bugs! void function1 () // enter critical section disable(); temp = f2(); // exit critical section enable(); int f2 () disable(); enable(); should test if this is fine 22
22 More on shared data static long int lsecondstoday; void interrupt vupdatetime() ++lsecondstoday; MOVE R1,(lSecondsToday) MOVE R2,(lSecondsToday+1) RETURN long lgetseconds() return (lsecondstoday); 23
23 Any issues here? static long int lsecondstoday; void interrupt vupdatetime() ++lsecondstoday; long lgetseconds() long lreturn; lreturn = lsecondstoday; while (lreturn!=lsecondstoday) lreturn = lsecondstoday; return (lreturn); ingenious code without interrupts 24
24 Any issues here? volatile static long int lsecondstoday; void interrupt vupdatetime() ++lsecondstoday; long lgetseconds() long lreturn; Otherwise compiler might optimize this code! lreturn = lsecondstoday; while (lreturn!=lsecondstoday) lreturn = lsecondstoday; return (lreturn); 25
25 Interrupt Latency Quick response to IRQ may be needed Depends on previous rules: The longest period of time in which interrupts are disabled The time taken for the higher priority interrupts Overhead operations on the processor (finish, stop, etc.) Context save/restore in interrupt routine The work load of the interrupt itself worst case latency = t_maxdisabled + t_higher prio ISRs + t_myisr + context switches 26
26 Example #1 EI ISR main DI EI DI IRQ ISR blocked ISR code Interrupt execution time worst case analysis 27
27 Example #2 DI EI lp ISR hp ISR main hp IRQ lp IRQ blocked hp ISR actual load Interrupt execution time worst case analysis in the presence of a second interrupt 28
28 Alternatives to disable() Do not disable interrupts but write ingenious code By alternating data buffers (Fig. 4.15/page 108) By using queues (Fig. 4.16/page 109) ISR and (main) code never access the same data Problem: code becomes error prone and hard to read Rule of the thumb: Keep it simple, just disable interrupts as long as: keep the critical sections SHORT keep the ISRs SHORT (to minimize latency) 29
29 Avoiding interrupts #1 static int temp[2]; static bool busy = FALSE; void interrupt readtemp() if (!busy) temp[0]= ; temp[1]= ; else // try again later void main(void) while (TRUE) busy = TRUE; if (temp[0]!=temp[1]) ; busy = FALSE; Idea: use a Boolean flag to protect critical section 30
30 Avoiding interrupts #1 static int tempa[2]; static int tempb[2]; static bool useb = FALSE; void main(void) while (TRUE) void interrupt readtemp() if (useb) tempa[0]= ; tempa[1]= ; else tempb[0]= ; tempb[1]= ; if (useb) if (tempb[0]!=tempb[1]) ; else if (tempa[0]!=tempa[1]) ; useb =!useb; Alternating data buffers example (page 108) 31
31 Avoiding interrupts #2 Make use of a circular queue (example page 109) Interrupt produces temperature readings Main code consumes temperature readings Operation Interrupt adds readings to the queue (modifies the head pointer) Main code extracts readings from the queue (modifies the tail pointer) Queue New values Tail pointer Head pointer 32
32 Questions? 34
In4073 Embedded Real-Time Systems. Embedded Programming
In4073 Embedded Real-Time Systems Embedded Programming Embedded Software TI2726 B 2 nd year BSc course Fast forward (10:1) 2 Embedded Programming More difficult than classical programming Interaction with
More informationIN4073 Embedded Real-Time Systems. X32 Microcontroller Soft core
IN4073 Embedded Real-Time Systems X32 Microcontroller Soft core FGPAs vs Standard Microcontrollers 8051, ARM,.., core architectures AD, Atmel, Dalas, Intel, MC (PIC), NS, ST, TI, Zilog ASICs with core,
More informationBringing Organization to our Code (the shared-data problem)
Bringing Organization to our Code (the shared-data problem) Reference: An Embedded Software Primer By David E Simon (two copies in lab for checkout) Figure 44 Classic Shared-Data Problem Static int itemperatures[2];
More informationFaculty of Electrical Engineering, Mathematics, and Computer Science Delft University of Technology
Faculty of Electrical Engineering, Mathematics, and Computer Science Delft University of Technology exam Embedded Software TI2726-B January 28, 2019 13.30-15.00 This exam (6 pages) consists of 60 True/False
More informationEmbedded Software TI2725 C. 5. Software architectures. Koen Langendoen. Embedded Software Group
Embedded Software 5. Software architectures TI2725 C Koen Langendoen Embedded Software Group Lec.2: Interrupts & data sharing volatile static long int lsecondstoday; void interrupt vupdatetime() ++lsecondstoday;
More informationFaculty of Electrical Engineering, Mathematics, and Computer Science Delft University of Technology
Faculty of Electrical Engineering, Mathematics, and Computer Science Delft University of Technology exam Embedded Software TI2726-B January 29, 2018 13.30-15.00 This exam (6 pages) consists of 60 True/False
More informationFigure 4.4: code example. 4.3: The shared data problem. Figure 4.4: analysis. Fig 4.4: observations. Figure 4.5: Does this fix problem?
4.3: The shared data problem Inconsistency in data used by a task and updated by an ISR; arises because ISR runs at just the wrong time. Data is often shared because it is undesirable to have ISRs do all
More informationExam TI2720-C/TI2725-C Embedded Software
Exam TI2720-C/TI2725-C Embedded Software Wednesday April 16 2014 (18.30-21.30) Koen Langendoen In order to avoid misunderstanding on the syntactical correctness of code fragments in this examination, we
More informationReal Time Embedded Systems. Lecture 10 January 31, 2012 Interrupts
Interrupts Real Time Embedded Systems www.atomicrhubarb.com/embedded Lecture 10 January 31, 2012 Interrupts Section Topic Where in the books Catsoulis chapter 1 (pg 10-12) Simon chapter4 Zilog UM197 (ZNEO
More informationEmbedded Software TI2726 B. 7. Embedded software design. Koen Langendoen. Embedded Software Group
Embedded Software 7. Embedded software design TI2726 B Koen Langendoen Embedded Software Group Overview Timing services RTOS and ISRs Design of embedded systems General principles Timing Functionality
More informationInterrupts Peter Rounce - room 6.18
Interrupts Peter Rounce - room 6.18 P.Rounce@cs.ucl.ac.uk 20/11/2006 1001 Interrupts 1 INTERRUPTS An interrupt is a signal to the CPU from hardware external to the CPU that indicates than some event has
More informationInterrupts Peter Rounce
Interrupts Peter Rounce P.Rounce@cs.ucl.ac.uk 22/11/2011 11-GC03 Interrupts 1 INTERRUPTS An interrupt is a signal to the CPU from hardware external to the CPU that indicates than some event has occured,
More informationGrundlagen Microcontroller Interrupts. Günther Gridling Bettina Weiss
Grundlagen Microcontroller Interrupts Günther Gridling Bettina Weiss 1 Interrupts Lecture Overview Definition Sources ISR Priorities & Nesting 2 Definition Interrupt: reaction to (asynchronous) external
More informationDesign and Implementation Interrupt Mechanism
Design and Implementation Interrupt Mechanism 1 Module Overview Study processor interruption; Design and implement of an interrupt mechanism which responds to interrupts from timer and UART; Program interrupt
More informationInterrupts & Interrupt Service Routines (ISRs)
ECE3411 Fall 2015 Lecture 2c. Interrupts & Interrupt Service Routines (ISRs) Marten van Dijk, Syed Kamran Haider Department of Electrical & Computer Engineering University of Connecticut Email: vandijk,
More informationReal Time Operating System: Inter-Process Communication (IPC)
ECE3411 Fall 2015 Lecture 6c. Real Time Operating System: Inter-Process Communication (IPC) Marten van Dijk, Syed Kamran Haider Department of Electrical & Computer Engineering University of Connecticut
More informationCPUs. Input and output. Supervisor mode, exceptions, traps. Co-processors. Computers as Components 4e 2016 Marilyn Wolf
CPUs Input and output. Supervisor mode, exceptions, traps. Co-processors. I/O devices Usually includes some non-digital component. Typical digital interface to CPU: CPU status reg data reg mechanism Application:
More informationProcess Coordination and Shared Data
Process Coordination and Shared Data Lecture 19 In These Notes... Sharing data safely When multiple threads/processes interact in a system, new species of bugs arise 1. Compiler tries to save time by not
More informationInterrupts CS4101 嵌入式系統概論. Prof. Chung-Ta King. Department of Computer Science National Tsing Hua University, Taiwan
CS4101 嵌入式系統概論 Interrupts Prof. Chung-Ta King Department of Computer Science, Taiwan Materials from MSP430 Microcontroller Basics, John H. Davies, Newnes, 2008 Inside MSP430 (MSP430G2551) 1 Introduction
More informationInterrupts and Low Power Features
ARM University Program 1 Copyright ARM Ltd 2013 Interrupts and Low Power Features Module Syllabus Interrupts What are interrupts? Why use interrupts? Interrupts Entering an Exception Handler Exiting an
More informationECE/CS 5780/6780: Embedded System Design
ECE/CS 5780/6780: Embedded System Design Scott R. Little Lecture 8: Interrupt Synchronization Scott R. Little (Lecture 8: Interrupts) ECE/CS 5780/6780 1 / 22 Administrivia Midterm 1 will be on February
More informationUBC104 Embedded Systems. Review: Introduction to Microcontrollers
UBC104 Embedded Systems Review: Introduction to Microcontrollers Processors General purpose processors: 80386 Pentium Core Duo Large number of pins External memory External peripherals * Figure from Intel
More informationBare Metal Application Design, Interrupts & Timers
Topics 1) How does hardware notify software of an event? Bare Metal Application Design, Interrupts & Timers 2) What architectural design is used for bare metal? 3) How can we get accurate timing? 4) How
More informationWhat happens when an HC12 gets in unmasked interrupt:
What happens when an HC12 gets in unmasked interrupt: 1. Completes current instruction 2. Clears instruction queue 3. Calculates return address 4. Stacks return address and contents of CPU registers 5.
More informationECE 485/585 Microprocessor System Design
Microprocessor System Design Lecture 3: Polling and Interrupts Programmed I/O and DMA Interrupts Zeshan Chishti Electrical and Computer Engineering Dept Maseeh College of Engineering and Computer Science
More informationNewbie s Guide to AVR Interrupts
Newbie s Guide to AVR Interrupts Dean Camera March 15, 2015 ********** Text Dean Camera, 2013. All rights reserved. This document may be freely distributed without payment to the author, provided that
More informatione-pg Pathshala Subject: Computer Science Paper: Embedded System Module: Interrupt Programming in Embedded C Module No: CS/ES/20 Quadrant 1 e-text
e-pg Pathshala Subject: Computer Science Paper: Embedded System Module: Interrupt Programming in Embedded C Module No: CS/ES/20 Quadrant 1 e-text In this lecture embedded C program for interrupt handling
More informationComputer Labs: I/O and Interrupts
Computer Labs: I/O and Interrupts 2 o MIEIC Pedro F. Souto (pfs@fe.up.pt) October 3, 2010 I/O Operation I/O devices are the interface between the computer and its environment Most of the time, the processor
More informationThese three counters can be programmed for either binary or BCD count.
S5 KTU 1 PROGRAMMABLE TIMER 8254/8253 The Intel 8253 and 8254 are Programmable Interval Timers (PTIs) designed for microprocessors to perform timing and counting functions using three 16-bit registers.
More informationIntroduction to Embedded Systems
Stefan Kowalewski, 4. November 25 Introduction to Embedded Systems Part 2: Microcontrollers. Basics 2. Structure/elements 3. Digital I/O 4. Interrupts 5. Timers/Counters Introduction to Embedded Systems
More informationVORAGO VA108x0 I 2 C programming application note
AN1208 VORAGO VA108x0 I 2 C programming application note MARCH 14, 2017 Version 1.1 VA10800/VA10820 Abstract There are hundreds of peripheral devices utilizing the I 2 C protocol. Most of these require
More informationThe Embedded Computing Platform
The Embedded Computing Platform I/O Interfaces and Service José Costa Software for Embedded Systems Department of Computer Science and Engineering (DEI) Instituto Superior Técnico Adapted from the overheads
More informationARM Interrupts. EE383: Introduction to Embedded Systems University of Kentucky. James E. Lumpp
ARM Interrupts EE383: Introduction to Embedded Systems University of Kentucky James E. Lumpp Includes material from: - Jonathan Valvano, Introduction to ARM Cortex-M Microcontrollers, Volume 1 Ebook, EE
More informationTypes of Interrupts:
Interrupt structure Introduction Interrupt is signals send by an external device to the processor, to request the processor to perform a particular task or work. Mainly in the microprocessor based system
More informationUNIVERSITY OF CONNECTICUT. ECE 3411 Microprocessor Application Lab: Fall Quiz III
Department of Electrical and Computing Engineering UNIVERSITY OF CONNECTICUT ECE 3411 Microprocessor Application Lab: Fall 2015 Quiz III There are 5 questions in this quiz. There are 11 pages in this quiz
More informationInterrupts in Zynq Systems
Interrupts in Zynq Systems C r i s t i a n S i s t e r n a U n i v e r s i d a d N a c i o n a l d e S a n J u a n A r g e n t i n a Exception / Interrupt Special condition that requires a processor's
More informationInterrupts and Serial Communication on the PIC18F8520
Interrupts and Serial Communication on the PIC18F8520 Kyle Persohn COEN 4720 Fall 2011 Marquette University 6 October 2011 Outline 1 Background Serial Communication PIC18 Interrupt System 2 Customizing
More informationEmbedded Systems. 3. Hardware Software Interface. Lothar Thiele. Computer Engineering and Networks Laboratory
Embedded Systems 3. Hardware Software Interface Lothar Thiele Computer Engineering and Networks Laboratory Do you Remember? 3 2 3 3 High Level Physical View 3 4 High Level Physical View 3 5 What you will
More informationTasks. Task Implementation and management
Tasks Task Implementation and management Tasks Vocab Absolute time - real world time Relative time - time referenced to some event Interval - any slice of time characterized by start & end times Duration
More informationCSC227: Operating Systems Fall Chapter 1 INTERRUPTS. Dr. Soha S. Zaghloul
CSC227: Operating Systems Fall 2016 Chapter 1 INTERRUPTS Dr. Soha S. Zaghloul LAYOUT 1.3 Devices Controlling Techniques 1.3.1 Polling 1.3.2 Interrupts H/W Interrupts Interrupt Controller Process State
More information1 Execution of main program is suspended. 2 All registers are pushed onto the stack. 3 The ISR, or background thread, is executed.
Introduction ECE/CS 5780/6780: Embedded System Design Chris J. Myers Lecture 7: Interrupt Synchronization Interrupts provide guarantee on response time. Interrupts allow response to rare but important
More informationNCSU - ECE 306- Exam 2 March 27, 2003
NCSU - ECE 306- Exam 2 March 27, 2003 Name: User ID Question 1-15 16-22 23-Algo 23-code Total Score /45 /60 /15 /30 /150 You are permitted 75 minutes to take this test, no more. This is an open book/open
More informationEmbedded Systems. Input/Output Programming
Embedded Systems Input/Output Programming Dr. Jeff Jackson Lecture 11-1 Outline External I/O devices I/O software Polled waiting loops Interrupt-driven I/O Direct memory access (DMA) Synchronization, transfer
More informationChapter 09. Programming in Assembly
Chapter 09 Programming in Assembly Lesson 03 Programming Approach for Main and Interrupt Service Routines in 8051 Program Approach for programming Main Program Instructions 3 Main program initial instructions
More informationInput/Output Programming
Input/Output Programming Chapter 3: Section 3.1, 3.2 Input and output (I/O) programming Communicating with I/O devices Busy-wait I/O Interrupt-driven I/O I/O devices Devices may include digital and non-digital
More informationINTERRUPTS in microprocessor systems
INTERRUPTS in microprocessor systems Microcontroller Power Supply clock fx (Central Proccesor Unit) CPU Reset Hardware Interrupts system IRQ Internal address bus Internal data bus Internal control bus
More informationEEL 4744C: Microprocessor Applications. Lecture 7. Part 1. Interrupt. Dr. Tao Li 1
EEL 4744C: Microprocessor Applications Lecture 7 Part 1 Interrupt Dr. Tao Li 1 M&M: Chapter 8 Or Reading Assignment Software and Hardware Engineering (new version): Chapter 12 Dr. Tao Li 2 Interrupt An
More informationReading Assignment. Interrupt. Interrupt. Interrupt. EEL 4744C: Microprocessor Applications. Lecture 7. Part 1
Reading Assignment EEL 4744C: Microprocessor Applications Lecture 7 M&M: Chapter 8 Or Software and Hardware Engineering (new version): Chapter 12 Part 1 Interrupt Dr. Tao Li 1 Dr. Tao Li 2 Interrupt An
More informationLecture #17 Concurrency Embedded System Engineering Philip Koopman Monday, 21-March-2016 Example application Remote Keyless Entry
Lecture #17 Concurrency 18-348 Embedded System Engineering Philip Koopman Monday, 21-March-2016 Electrical& Computer ENGINEERING Copyright 2006-2016, Philip Koopman, All Rights Reserved Example application
More informationLecture #17 Concurrency Embedded System Engineering Philip Koopman Monday, 21-March-2016
Lecture #17 Concurrency 18-348 Embedded System Engineering Philip Koopman Monday, 21-March-2016 Electrical& Computer ENGINEERING Copyright 2006-2016, Philip Koopman, All Rights Reserved Example application
More informationSYLLABUS UNIT - I 8086/8088 ARCHITECTURE AND INSTRUCTION SET
1 SYLLABUS UNIT - I 8086/8088 ARCHITECTURE AND INSTRUCTION SET Intel 8086/8088 Architecture Segmented Memory, Minimum and Maximum Modes of Operation, Timing Diagram, Addressing Modes, Instruction Set,
More information8051 Timers and Serial Port
8051 Timers and Serial Port EE4380 Fall 2001 Class 10 Pari vallal Kannan Center for Integrated Circuits and Systems University of Texas at Dallas Timer: Mode 1 Operation (recap) 16 bit counter. Load the
More informationSingle thread Scheduler All processes called once each sample
Single thread Scheduler All processes called once each sample void main(void) { init_routines(); done = 0; while (!done) { perform_process1(); // Highest priority process perform_process2(); perform_process3();//
More information8051 Microcontroller
8051 Microcontroller The 8051, Motorola and PIC families are the 3 leading sellers in the microcontroller market. The 8051 microcontroller was originally developed by Intel in the late 1970 s. Today many
More informationPC Interrupt Structure and 8259 DMA Controllers
ELEC 379 : DESIGN OF DIGITAL AND MICROCOMPUTER SYSTEMS 1998/99 WINTER SESSION, TERM 2 PC Interrupt Structure and 8259 DMA Controllers This lecture covers the use of interrupts and the vectored interrupt
More informationApplying User-level Drivers on
Applying User-level Drivers on DTV System Gunho Lee, Senior Research Engineer, ELC, April 18, 2007 Content Background Requirements of DTV Device Drivers Design of LG DTV User-level Drivers Implementation
More informationReal-Time Programming
Real-Time Programming Week 7: Real-Time Operating Systems Instructors Tony Montiel & Ken Arnold rtp@hte.com 4/1/2003 Co Montiel 1 Objectives o Introduction to RTOS o Event Driven Systems o Synchronization
More informationECE 353 Lab 4. General MIDI Explorer. Professor Daniel Holcomb Fall 2015
ECE 353 Lab 4 General MIDI Explorer Professor Daniel Holcomb Fall 2015 Where are we in Course Lab 0 Cache Simulator in C C programming, data structures Cache architecture and analysis Lab 1 Heat Flow Modeling
More informationCS3733: Operating Systems
Outline CS3733: Operating Systems Topics: Synchronization, Critical Sections and Semaphores (SGG Chapter 6) Instructor: Dr. Tongping Liu 1 Memory Model of Multithreaded Programs Synchronization for coordinated
More informationCHAPTER 11 INTERRUPTS PROGRAMMING
CHAPTER 11 INTERRUPTS PROGRAMMING Interrupts vs. Polling An interrupt is an external or internal event that interrupts the microcontroller To inform it that a device needs its service A single microcontroller
More informationIntertask Communication
Inter-task Communication 04/27/01 Lecture # 29 16.070 Task state diagram (single processor) Intertask Communication Global variables Buffering data Critical regions Synchronization Semaphores Mailboxes
More informationMCS-51 Serial Port A T 8 9 C 5 2 1
MCS-51 Serial Port AT89C52 1 Introduction to Serial Communications Serial vs. Parallel transfer of data Simplex, Duplex and half-duplex modes Synchronous, Asynchronous UART Universal Asynchronous Receiver/Transmitter.
More informationWireless Sensor Networks (WSN)
Wireless Sensor Networks (WSN) Operating Systems M. Schölzel Operating System Tasks Traditional OS Controlling and protecting access to resources (memory, I/O, computing resources) managing their allocation
More informationInterrupts, Low Power Modes
Interrupts, Low Power Modes Registers Status Register Interrupts (Chapter 6 in text) A computer has 2 basic ways to react to inputs: 1) polling: The processor regularly looks at the input and reacts as
More informationIn Class Assignment 2
In Class Assignment 2 Name: UMBC ID: Academic Integrity Statement: "Integrity of scholarship is essential for an academic community. The University expects that students will honor this. By signing this,
More informationI Introduction to Real-time Applications By Prawat Nagvajara
Electrical and Computer Engineering I Introduction to Real-time Applications By Prawat Nagvajara Synopsis This note is an introduction to a series of nine design exercises on design, implementation and
More informationInput/Output. Jin-Soo Kim Computer Systems Laboratory Sungkyunkwan University
Input/Output Jin-Soo Kim (jinsookim@skku.edu) Computer Systems Laboratory Sungkyunkwan University http://csl.skku.edu mechanism I/O Devices Usually includes some non-digital component Typical digital interface
More informationIntroduction to general architectures of 8 and 16 bit micro-processor and micro-controllers
Introduction to general architectures of 8 and 16 bit micro-processor and micro-controllers A microcontroller is a microprocessor with inbuilt peripherals.a microcontroller can also be compared with a
More informationEmbedded Systems and Software. Serial Communication
Embedded Systems and Software Serial Communication Slide 1 Using RESET Pin on AVRs Normally RESET, but can be configured via fuse setting to be general-purpose I/O Slide 2 Disabling RESET Pin on AVRs Normally
More informationEmbedded Systems. Read pages
Embedded Systems Read pages 385-417 Definition of Embedded Systems Embedded systems Computer dedicated to serve specific purposes Many physical systems today use computer for powerful and intelligent applications
More informationEmbedded Systems and Software
Embedded Systems and Software Serial Communication Serial Communication, Slide 1 Lab 5 Administrative Students should start working on this LCD issues Caution on using Reset Line on AVR Project Posted
More informationCODE TIME TECHNOLOGIES. Abassi RTOS. I2C Support
CODE TIME TECHNOLOGIES Abassi RTOS I2C Support Copyright Information This document is copyright Code Time Technologies Inc. 2015-2018 All rights reserved. No part of this document may be reproduced or
More informationInterrupt Basics Karl-Ragmar Riemschneider
Interrupt Basics Exceptions and Interrupts Interrupts Handlers vs. Subroutines Accept or hold Pending: Priority control Exception vector table Example Karl-Ragmar Riemschneider Exceptions
More informationUnderstanding the basic building blocks of a microcontroller device in general. Knows the terminologies like embedded and external memory devices,
Understanding the basic building blocks of a microcontroller device in general. Knows the terminologies like embedded and external memory devices, CISC and RISC processors etc. Knows the architecture and
More informationInterrupts and Using Them in C
Interrupts and Using Them in C Lecture 10 Embedded Systems 10-1 In These Notes... Interrupts How they work Creating and debugging C interrupt routines Sources M16C Hardware Manual P&P 8.1 and 8.5 Readings
More informationATmega Interrupts. Reading. The AVR Microcontroller and Embedded Systems using Assembly and C) by Muhammad Ali Mazidi, Sarmad Naimi, and Sepehr Naimi
1 P a g e ATmega Interrupts Reading The AVR Microcontroller and Embedded Systems using Assembly and C) by Muhammad Ali Mazidi, Sarmad Naimi, and Sepehr Naimi Chapter 10: AVR Interrupt Programming in Assembly
More informationCprE 288 Introduction to Embedded Systems (Timers/Input Capture) Instructors: Dr. Phillip Jones
CprE 288 Introduction to Embedded Systems (Timers/Input Capture) Instructors: Dr. Phillip Jones 1 Announcements HW 4, Due Wed 6/13 Quiz 5 (15 min): Wed 6/13, Textbook reading: Section 9.1, 9.2 (your one-side
More informationV8-uRISC 8-bit RISC Microprocessor AllianceCORE Facts Core Specifics VAutomation, Inc. Supported Devices/Resources Remaining I/O CLBs
V8-uRISC 8-bit RISC Microprocessor February 8, 1998 Product Specification VAutomation, Inc. 20 Trafalgar Square Nashua, NH 03063 Phone: +1 603-882-2282 Fax: +1 603-882-1587 E-mail: sales@vautomation.com
More informationApril 4, 2001: Debugging Your C24x DSP Design Using Code Composer Studio Real-Time Monitor
1 This presentation was part of TI s Monthly TMS320 DSP Technology Webcast Series April 4, 2001: Debugging Your C24x DSP Design Using Code Composer Studio Real-Time Monitor To view this 1-hour 1 webcast
More informationSpiNNaker Application Programming Interface (API)
SpiNNaker Application Programming Interface (API) Version 2.0.0 10 March 2016 Application programming interface (API) Event-driven programming model The SpiNNaker API programming model is a simple, event-driven
More informationChapter 6: Process Synchronization
Chapter 6: Process Synchronization Objectives Introduce Concept of Critical-Section Problem Hardware and Software Solutions of Critical-Section Problem Concept of Atomic Transaction Operating Systems CS
More informationUsing Input Capture on the 9S12
The 9S12 Input Capture Function Huang Sections 8.1-8.5 ECT_16B8C Block User Guide o Interrupts on the 9S12 o Capturing the time of an external event o The 9S12 Input Capture Function o Registers used to
More information2. Introduction to Software for Embedded Systems
2. Introduction to Software for Embedded Systems Lothar Thiele ETH Zurich, Switzerland 2-1 Contents of Lectures (Lothar Thiele) 1. Introduction to Embedded System Design 2. Software for Embedded Systems
More informationProgramming Languages
TECHNISCHE UNIVERSITÄT MÜNCHEN FAKULTÄT FÜR INFORMATIK Programming Languages Concurrency: Atomic Executions, Locks and Monitors Dr. Michael Petter Winter term 2016 Atomic Executions, Locks and Monitors
More informationSection I Section Real Time Systems. Processes. 1.4 Inter-Processes Communication (part 1)
EE206: Software Engineering IV 1.4 Inter-Processes Communication 1 page 1 of 16 Section I Section Real Time Systems. Processes 1.4 Inter-Processes Communication (part 1) Process interaction Processes often
More informationMicrium µc/os II RTOS Introduction EE J. E. Lumpp
Micrium µc/os II RTOS Introduction (by Jean Labrosse) EE599 001 Fall 2012 J. E. Lumpp μc/os II μc/os II is a highly portable, ROMable, very scalable, preemptive real time, deterministic, multitasking kernel
More information1. What is Microprocessor? Give the power supply & clock frequency of 8085?
1. What is Microprocessor? Give the power supply & clock frequency of 8085? A microprocessor is a multipurpose, programmable logic device that reads binary instructions from a storage device called memory
More informationECEN 449 Microprocessor System Design. Hardware-Software Communication. Texas A&M University
ECEN 449 Microprocessor System Design Hardware-Software Communication 1 Objectives of this Lecture Unit Learn basics of Hardware-Software communication Memory Mapped I/O Polling/Interrupts 2 Motivation
More informationInput Output (IO) Management
Input Output (IO) Management Prof. P.C.P. Bhatt P.C.P Bhatt OS/M5/V1/2004 1 Introduction Humans interact with machines by providing information through IO devices. Manyon-line services are availed through
More informationChapters 2, 3: bits and pieces. Chapters 2 & 3. Chapters 2, 3: bits and pieces. Chapters 2, 3: bits and pieces. Using C. A last word about hardware
Chapters 2 & 3 Chapters 2, 3: bits and pieces A review of hardware essentials Most of you have seen this material in other classes Still worth a careful read: may give you new insight We ll touch briefly
More informationHow to use the PSoC based 16C450 Replacement
How to use the PSoC based 16C450 Replacement Matthew Burns Eric Ponce August 2017 (Updated April 2018) 1 Overview The PSoC based 16C450 Replacement is intended to replace the 16C450 serial communication
More informationCSE 120. Fall Lecture 6: Semaphores. Keith Marzullo
CSE 120 Principles of Operating Systems Fall 2007 Lecture 6: Semaphores Keith Marzullo Announcements Homework #2 out Homework #1 almost graded... Discussion session on Wednesday will entertain questions
More informationEmbedded System Curriculum
Embedded System Curriculum ADVANCED C PROGRAMMING AND DATA STRUCTURE (Duration: 25 hrs) Introduction to 'C' Objectives of C, Applications of C, Relational and logical operators, Bit wise operators, The
More informationInterrupts and timers
Applied mechatronics, Lab project Interrupts and timers Sven Gestegård Robertz Department of Computer Science, Lund University 2018 Outline 1 Interrupts Interrupt types Execution of an interrupt Maskable
More informationProcess Synchronization and Communication
Process Synchronization and Communication How to we protect a critical section without disabling interrupts? CSE 466 Fall 2000 - Introduction - 1 Process Synchronization critical section need a HW interlock
More informationMaxim > Design Support > Technical Documents > Application Notes > Microcontrollers > APP 4465
Maxim > Design Support > Technical Documents > Application Notes > Microcontrollers > APP 4465 Keywords: MAXQ, MAXQ610, UART, USART, serial, serial port APPLICATION NOTE 4465 Using the Serial Port on the
More informationRecap from last class
Recap from last class Taxonomy of microprocessor architecture Von Neumann Memory for both data and instructions, single bus Easier to write Harvard Separate memories for data and instructions, two buses
More informationMicroprocessors B (17.384) Spring Lecture Outline
Microprocessors B (17.384) Spring 2013 Lecture Outline Class # 04 February 12, 2013 Dohn Bowden 1 Today s Lecture Administrative Microcontroller Hardware and/or Interface Programming/Software Lab Homework
More informationEmbedded Software TI2725-C. 8. Debugging techniques. Koen Langendoen. Embedded Software Group
Embedded Software 8. Debugging techniques TI2725-C Koen Langendoen Embedded Software Group Grace Hopper 1947 2 Overview Debugging techniques Debugging a distributed system Lab information Preparation for
More informationMICROPROCESSORS & MICRO CONTROLLER COLLEGE OF ENGINEERING DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING QUESTION BANK
KINGS COLLEGE OF ENGINEERING DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING QUESTION BANK SUBJECT CODE: EC1257 SUBJECT NAME: MICROPROCESSOR AND MICROCONTROLLER YEAR : II IT SEM : IV UNIT I THE 8085 MICROPROCESSOR
More information