MC13853 Tri-Band Low Noise Amplifiers with Bypass Switches Device

Transcription

1 Freescale Semiconductor Technical Data Document Number: MC18 Rev. 1.8, 8/2008 MC18 MC18 Tri-Band Low Noise Amplifiers with Switches Device Package Information Plastic Package (QFN) Ordering Information Device Marking or Operating Temperature Range Package MC18 8 QFN- 1 Introduction The MC18 is a SPI controlled, tri-band, high gain LNA with extremely low noise figure, designed for cellular band applications. Integrated bypass switches are included to preserve input intercept performance. The input and output match are external to allow maximum design flexibility. The MC18 is fabricated using Freescale's advanced RF BiCMOS process using the SiGe:C option and is packaged in the QFN- leadless package. Contents 1 Introduction Electrical Specifications Application Information Packaging Product Documentation Features RF input frequency: 800 MHz to 2.4 GHz Gain: 1. (typical) at 1960 MHz, 1 (typical) at 2140 MHz, and 1. (typical) at 880 MHz Input rd order intercept point (IIP): m (typical) at 880 MHz, -4.0 m (typical) at 1960 MHz, and.0 m (typical) at 2140 MHz Noise figure (NF): 1. (typical) at 880 MHz, 1. (typical) at 1960 MHz, and 1.6 (typical) at 2140 MHz This document contains information on a product under development. Freescale reserves the right to change or discontinue this product without notice. Freescale Semiconductor, Inc., All rights reserved.

2 Introduction Current Settings are SPI controllable Freescale s IP boost circuitry mode included for improved intercept point performance Total supply current: LB 9.7 ma in current setting 6 HB1 9.2 ma in current setting 6 HB2 6. ma in current setting 2 µa (typical) in bypass mode Bias stabilized for device and temperature variations QFN- leadless package with low parasitics SiGe technology ensures lowest possible noise figure SPI controlled At POR, all bands default to bypass mode. In deep sleep mode, all bands are set to disable mode. QFN pin x x 0.8 mm Package LB Emit 800/900, 1800/1900 and 20 MHz LNAs LB LNA OUT GPO1 GPO LB 800/900 LNA IN 1 Triband LNA Die 12 Vcc HB1 Emit 2 11 HB1 LNA OUT HB1 1800/1900 LNA IN HB2 LNA OUT HB2 20 LNA IN 4 SPI 9 VDDauxSPI HB2 Emit SPI Data SPI Clk SPI Frm Figure 1. Simplified Block Diagram 2 Freescale Semiconductor

3 Electrical Specifications 2 Electrical Specifications Table 1. Maximum Ratings Ratings Symbol Value Unit Supply Voltage V CC. V Storage Temperature Range T stg -6 to C Operating Ambient Temperature Range T A 0 to 8 C RF Input Power P rf m Power Dissipation P dis 0 mw Thermal Resistance, Junction to Case R θjc 24 C/W Thermal Resistance, Junction to Ambient, 4 Layer Board R θja 90 C/W ESD Rating HBM RF Pins 0 V ESD Rating HBM non-rf Pins 0 V NOTES: 1. Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the limits in the Recommended Operating Conditions and Electrical Characteristics tables. Table 2. Recommended Operating Conditions Characteristic Symbol Minimum Typical Maximum Unit RF Frequency Range f RF MHz Supply Voltage V CC VDDauxSPI V Logic Voltage Input High Voltage Input Low Voltage V CC 0.8 V NOTES: 1.Supply voltage Vcc must be on before VDDauxSPI. 880 MHz (Refer to Figure 4) Table. Electrical Characteristics in Frequency Specific Tuned Circuits (V CC = 2.77 V, 2 C) Characteristic Symbol Minimum Typical Maximum Unit Frequency f MHz Active Gain Band V Band VI Active Noise Figure NF Active Input Third Order Intercept Point IIP -2. m Active Input 1 Compression Point P m Active 2.7 V in current setting 6 I CC ma G Freescale Semiconductor

4 Electrical Specifications Table. Electrical Characteristics in Frequency Specific Tuned Circuits (continued) (V CC = 2.77 V, 2 C) Gain G Input Third Order Intercept Point IIP 22 m Current 20 µa 90 MHz (Refer to Figure ) Frequency f MHz Active Gain G Active Noise Figure NF Active Input Third Order Intercept Point IIP -2. m Active Input 1 Compression Point P m Active 2.7 V in current setting 6 I CC ma Gain G Input Third Order Intercept Point IIP 22 m Current 20 µa 180 MHz (Refer to Figure 6) Frequency f MHz Active Gain G Active Noise Figure NF Active Input Third Order Intercept Point IIP -2. m Active Input 1 Compression Point P m Active 2.7 V in current setting 6 I CC ma Gain G Input Third Order Intercept Point IIP 22 m Current 20 µa 1960 MHz (Refer to Figure 7) Characteristic Symbol Minimum Typical Maximum Unit Frequency f MHz Active Gain G Active Noise Figure NF Active Input Third Order Intercept Point IIP -2. m Active Input 1 Compression Point P m Active 2.7 V in current setting 6 I CC ma Gain G Input Third Order Intercept Point IIP m Current 20 µa 4 Freescale Semiconductor

5 Electrical Specifications Table. Electrical Characteristics in Frequency Specific Tuned Circuits (continued) (V CC = 2.77 V, 2 C) 2140 MHz (Refer to Figure 8) Characteristic Symbol Minimum Typical Maximum Unit Frequency f MHz Active Gain G 14 1 Active Noise Figure NF Active Input Third Order Intercept Point IIP -2. m Active Input 1 Compression Point P m Active 2.7 V in current setting 2 I CC ma Gain G Input Third Order Intercept Point IIP m Current 20 µa Table 4. Electrical Characteristics Over Temperature (0 C to 8 C) Characteristic Symbol Minimum Maximum Unit Mode Current Icc ma LNA1 HB2 8. LNA2 HB1 11. LNA LB.2 Mode Current Icc 0 µa Active Gain Variation Across Temperature G 8 C relative to 2 C C relative to 2 C G 8 C relative to 2 C C relative to 2 C Noise Figure relative to 2 C NF +0.4 Active Input Third Order Intercept relative to 2 C IIP -2.0 m Freescale Semiconductor

6 Electrical Specifications Table. Truth Table for SPI Operation Mode Gain Bit Enable Bit Active 1 1 Gain 0 0 Disable 1 0 Not Used 0 1 Note: At power on reset (POR), the mode is set to bypass gain on all LNAs. Table 6. SPI Programmable Current Draw (2 C) SPI bit Typical Current (ma) Current 2 Current 1 Current 0 LNA 1 HB2 LNA 2 HB1 LNA LB Current Setting Default current setting shown in gray for each band Table 7. Maximum Current 2 C 0 C to 8 C Unit Deep Sleep Mode - Vcc on and VDDauxSPI off 1 µa VDDauxSPI during a read operation µa 6 Freescale Semiconductor

7 Electrical Specifications SPI bit word Clock Address structure Data Structure Bit # Not Variable Variable Write / Read Bit Device Type is LNA Device Type is LNA Device Type is LNA Device is Iota Device is Iota Device is Iota Device is Iota Device is Iota LNA Selector PA4 LNA Selector PA SPI Data Write 0 Read 1 LNA Selector LNA1 HB LNA2 HB LNA LB GPO (Ext LNA) Mode Selector Active Disable 0 1 Not Used 1 0 Current Selector LNA1 HB (default) LNA2 HB LNA LB LNA Selector PA2 LNA Selector PA1 LNA Selector PA0 Current 2 Current 1 Current 0 Enable Gain Mode Selector Active 1 1 for GPO 1 0 (External LNA) Disable 0 0 Disable 0 1 GPO2 GPO1 Read Mode Address structure Data Structure Bit # Not Variable Variable SPI Data Read 1 LNA Selector For Hardware Read one extra clock cycle in read mode HID 8 HID 7 HID 6 HID HID 4 HID HID 2 HID 1 HID 0 Figure 2. SPI Bit Word Freescale Semiconductor 7

8 Electrical Specifications Table 8. SPI Used for Dual-, Tri-, and Quad-Band Configurations SPI Inputs LNA Selector Enable Gain Outputs PATH # Bit 22 Bit 21 PA2 PA1 PA0 D2 D1 GPO1 GPO2 Mode Dual- or Tri-band Config Tri-band LNA # No Connect No Connect LNA1 Active LNAs 1, 2, and No Connect No Connect LNA1 or LNAs No Connect No Connect LNA1 Off 1 and No Connect No Connect LNA2 Active No Connect No Connect LNA No Connect No Connect LNA2 Off No Connect No Connect LNA Active No Connect No Connect LNA No Connect No Connect LNA Off Note: This is an SPI-controlled, tri-band MC18 LNA. Quadband Config Tri-band LNA #1 Single LNA To Ext LNA To Ext LNA LNA1 Active LNAs 1, To Ext LNA To Ext LNA LNA1 2,, and To Ext LNA To Ext LNA LNA1 Off To Ext LNA To Ext LNA LNA2 Active To Ext LNA To Ext LNA LNA To Ext LNA To Ext LNA LNA2 Off To Ext LNA To Ext LNA LNA Active To Ext LNA To Ext LNA LNA To Ext LNA To Ext LNA LNA Off NA NA LNA4 Active NA NA LNA NA NA LNA4 Off Note: This is one SPI-controlled, tri-band MC18 LNA and one external LNA (not a MC18) controlled by GPO from the MC18 LNA. The different banding LNA combinations are: Dual band (using one MC18) Tri-band (using one MC18) Quad-band (using one MC18 and one single-band GPO-controlled external LNA (not a MC18)) 8 Freescale Semiconductor

9 Application Information Application Information The MC18 SiGe:C LNA is designed for applications in the 800 MHz to 2.1 GHz range. It has three different modes:, Low Gain () and Disabled. The IC mode is programmable through the Gain and Enable bits. The current setting is also SPI programmable. The logic truth table is given in Table. In these application examples a balance is made between the competing RF performance characteristics of I CC, NF, gain, IP and return losses with unconditional stability. Conjugate matching is not used for the input or output. Instead, matching which achieves a trade-off in RF performance qualities is utilized. For a particular application or spec requirement, the matching can be changed to achieve enhanced performance of one parameter at the expense of other parameters. Application information for 880, 90, 1800, 1960, and 2140 MHz are shown. Measurements are made at a bias of V CC = 2.77 V. Freq. spacing for IP measurements is 800 khz for 2G and MHz for GPP. The board loss corrections for these boards are: Input 0., Output 0.2. NF results incorporate these corrections in order to better reflect the actual performance of the device. Two MC18 devices can also be used with common SPI control lines for a quad-band application, as shown in Figure. In this application, LB and HB1 are used on LNA1 and HB2 is used on LNA2. In active mode, both LNAs are active, but only one is connected in the circuit. Depending on which band is selected in the connected LNA, the corresponding un-connected LNA which would also become active when the SPI command is sent to the connected LNA will draw <1 ma for LB, <1.2 ma for HB1 and <1mA for HB2 in active mode over temperature. Freescale Semiconductor 9

10 Application Information LB Emit Remit O ohm LB LNA OUT NC NC LNA LB LNA IN 1 2 Triband LNA Die Vcc HB1 LNA OUT HB1 LNA IN NC NC 4 SPI 9 VDDauxSPI SPI Data SPI Clk SPI Frm Remit O ohm LB Emit NC NC NC LNA SPI Data NC 1 Triband LNA Die 12 Vcc SPI Clk SPI Frm 2 11 NC NC HB2 LNA OUT HB2 LNA IN 4 SPI 9 VDDauxSPI SPI Data SPI Clk SPI Frm Figure. Application Circuit with Two MC18s Controlled by Common SPI Lines Freescale Semiconductor

11 MHz Application Application Information This application circuit was designed to provide NF 1., typical S21 gain of 1., IIP of m. Typical performance that can be expected from this circuit at 2.77 V V CC is listed in Table 9. The component values can be changed to enhance the performance of a particular parameter, but usually at the expense of another. QFN pin xx0.8 mm Package LB Emit Remit O ohm L 18 nh C pf R4 62 Rs 82 LB LNA OUT Vcc C11 pf C12.01uf LB LNA IN L1 nh C1.6 pf C1 0. pf Triband LNA Die SPI 9 VDDauxSPI SPI Data SPI Clk SPI Frm Figure MHz LNA Application Schematic Table 9. Typical 880 MHz LNA Demo Board Performance (2 C) Characteristic Symbol Min Typ Max Unit Frequency f MHz Power Gain Band V Band VI G Input Third Order Intercept Point IIP m In Ref P1 P 1in m Noise Figure NF Freescale Semiconductor 11

12 Application Information Table 9. Typical 880 MHz LNA Demo Board Performance (continued)(2 C) Characteristic Symbol Min Typ Max Unit Current Drain in current setting 6 I CC ma µa Input Return Loss S Gain S Reverse Isolation S Output Return Loss S F INT = RX/2 at -40 m IM m F INT1 = TX at -27 m F INT2 = TX +RX at -49 m m F INT1 = TX at -27 m F INT2 = RX -TX at -4 m - -4 m Switching Time from 20% top 90% of VIH TRISE TFALL µs 12 Freescale Semiconductor

13 .2 90 MHz Application Application Information This application circuit was designed to provide NF < 1., S21 gain of 12, IIP of m. Typical performance that can be expected from this circuit at 2.77 V V CC is listed in Table. The component values can be changed to enhance the performance of a particular parameter, but usually at the expense of another. QFN pin xx0.8 mm Package LB Emit Remit O ohm L 18 nh C pf R4 62 Rs 82 LB LNA OUT Vcc C11 pf C12.01uf LB LNA IN L1 nh C1.6 pf C1 0. pf Triband LNA Die SPI 9 VDDauxSPI SPI Data SPI Clk SPI Frm Figure. 90 MHz LNA Application Schematic Table. Typical 90 MHz LNA Demo Board Performance (2 C) Characteristic Symbol Min Typ Max Unit Frequency f MHz Power Gain G Input Third Order Intercept Point IIP m In Ref P1 P 1in m Noise Figure NF Freescale Semiconductor 1

14 Application Information Table. Typical 90 MHz LNA Demo Board Performance (2 C) (continued) Characteristic Symbol Min Typ Max Unit Current Drain in current setting6 I CC ma µa Input Return Loss S Gain S Reverse Isolation S Output Return Loss S F INT = RX/2 at -40 m IM m F INT1 = TX at -27 m F INT2 = TX +RX at -49 m m F INT1 = TX at -27 m F INT2 = RX -TX at -4 m - -6 m Switching Time From 20% top 90% of VIH From 20% top 90% of VIL TRISE TFALL µs 14 Freescale Semiconductor

15 . 180 MHz Application Application Information This application circuit is designed to demonstrate performance at 180 MHz. Typical performance that can be expected from this circuit at 2.77 V V CC is listed in Table 11. The match consists of a highpass match on the output and a simple inductor-capacitor network on the LNA input. QFN pin xx0.8 mm Package Vcc C pf C6.01uf 1 Triband LNA Die 12 L6 4.7 nh HB1 LNA OUT HB1 LNA IN HB1 Emit L2.9 nh 2 11 R 0 C8 pf R2 7 C2 pf 4 SPI 9 VDDauxSPI SPI Data SPI Clk SPI Frm Figure MHz LNA Application Schematic Table 11. Typical 180 MHz LNA Demo Board Performance (2 C) Characteristic Symbol Min Typ Max Unit Frequency f MHz Power Gain G Input Third Order Intercept Point IIP m In Ref P1 P 1in m Noise Figure NF Freescale Semiconductor 1

16 Application Information Table 11. Typical 180 MHz LNA Demo Board Performance (2 C) Characteristic Symbol Min Typ Max Unit Current Drain in current setting 6 I CC ma µa Input Return Loss S Gain Disabled S Reverse Isolation S Output Return Loss S P INT = -40 m IM m F INT1 = TX at -27 m F INT2 = TX +RX at -49 m m F INT1 = TX at -27 m F INT2 = RX -TX at -4 m - -6 m Switching Time From 20% top 90% of VIH From 20% top 90% of VIL TRISE TFALL µs Freescale Semiconductor

17 MHz Application Application Information This application circuit is designed to demonstrate performance at 1960 MHz. Typical performance that can be expected from this circuit at 2.77 V V CC is listed in Table 12. The match consists of a highpass match on the output and a simple inductor-capacitor network on the LNA input. QFN pin x x 0.8 mm Package Vcc C pf C6.01uf 1 Triband LNA Die 12 L6 4.7 nh HB1 LNA OUT HB1 LNA IN HB1 Emit L2.9 nh 2 11 R 0 C8 pf R2 7 C2 pf 4 SPI 9 VDDauxSPI SPI Data SPI Clk SPI Frm Figure MHz LNA Application Schematic Table 12. Typical 1960 MHz LNA Demo Board Performance (2 C) Characteristic Symbol Min Typ Max Unit Frequency f MHz Power Gain G Input Third Order Intercept Point IIP m In Ref P1 P 1in m Noise Figure NF Freescale Semiconductor 17

18 Application Information Table 12. Typical 1960 MHz LNA Demo Board Performance (2 C) (continued) Characteristic Symbol Min Typ Max Unit Current Drain in current setting 6 I CC ma µa Input Return Loss S Gain Disabled S Reverse Isolation S Output Return Loss S P INT = -40 m IM m F INT1 = TX at -27 m F INT2 = TX +RX at -49 m m F INT1 = TX at -27 m F INT2 = RX -TX at -4 m - -6 m Switching Time From 20% top 90% of VIH From 20% top 90% of VIL TRISE TFALL µs 18 Freescale Semiconductor

19 MHz Application Application Information These application circuits demonstrate performance at 2140 MHz. Typical performance that can be expected from this circuit at 2.77 V V CC is listed in Table 1. QFN pin x x 0.8 mm Package Vcc C1 pf C.01uf 1 12 L HB2.0 nh LNA IN 4 C pf 2 SPI 11 9 L7 2.4 nh R6 VDDauxSPI C7 1. pf HB2 LNA OUT R HB2 Emit SPI Data SPI Clk SPI Frm Figure MHz LNA Application Schematic Table 1. Typical 2140 MHz LNA Demo Board Performance (2 C) Characteristic Symbol Min Typ Max Unit Frequency f MHz Power Gain G Input Third Order Intercept Point IIP m In Ref P1 P 1in m Noise Figure NF Current Drain in current setting 2 I CC ma µa Freescale Semiconductor 19

20 Application Information Table 1. Typical 2140 MHz LNA Demo Board Performance (2 C) (continued) Characteristic Symbol Min Typ Max Unit Input Return Loss S Gain S Reverse Isolation S Output Return Loss S P INT = -40 m IM m F INT1 = TX at -27 m F INT2 = TX +RX at -49 m m F INT1 = TX at -27 m F INT2 = RX -TX at -4 m - -6 m Switching Time From 20% top 90% of VIH From 20% top 90% of VIL TRISE TFALL µs Table 14. Bill of Materials Component Value Case Manufacturer Comments 880 MHz C1.6 pf 402 Murata Input match C19 0. pf 402 Murata Input match C pf 402 Taiyo Yuden Output match C11 pf 402 Murata RF bypass C12.01 µf 402 Murata Low freq bypass L1 nh 402 TOKO Input match L 18 nh 402 TOKO DC feed/output match R4 62 Ω 402 KOA Stability/reduce gain RS 82 Ω 402 KOA Stability Remit 0Ω 402 KOA Stability Q1 MC18 QFN- Freescale 20 Freescale Semiconductor

21 Application Information Table 14. Bill of Materials (continued) Component Value Case Manufacturer Comments 90 MHz C1.6 pf 402 Murata Input match C19 0. pf 402 Murata Input match C pf 402 Taiyo Yuden Output match C11 pf 402 Murata RF bypass C12.01 µf 402 Murata Low freq bypass L1 nh 402 TOKO Input match L 18 nh 402 TOKO DC feed/output match R4 62 Ω 402 KOA Stability/reduce gain RS 82 Ω 402 KOA Stability Remit 0Ω 402 KOA Stability Q1 MC18 QFN- Freescale 1800 MHz C2 pf 402 Murata Input match C pf 402 Murata RF bypass C6.01 µf 402 Murata Low freq bypass C8 pf 402 Murata Output match L2.9 nh 402 TOKO Input match L6 4.7 nh 402 TOKO Output match/dc feed R2 7 Ω 402 KOA Stability R 0 Ω 402 KOA Stability Q1 MC18 QFN- Freescale Freescale Semiconductor 21

22 Application Information Table 14. Bill of Materials (continued) Component Value Case Manufacturer Comments 1960 MHz C2 pf 402 Murata Input match C pf 402 Murata RF bypass C6.01 µf 402 Murata Low freq bypass C8 pf 402 Murata Output match L2.9 nh 402 TOKO Input match L6 4.7 nh 402 TOKO Output match/dc feed R2 7 Ω 402 KOA Stability R 0 Ω 402 KOA Stability Q1 MC18 QFN- Freescale 2140 MHz C pf 402 Murata Input match C1 pf 402 Murata RF bypass C.01 µf 402 Murata Low freq bypass C7 pf 402 Murata Output match L.0 nh 402 TOKO Input match L7 2.4 nh 402 TOKO Output match/dc feed R Ω 402 KOA Stability R6 Ω 402 KOA Stability Q1 MC18 QFN- Freescale 22 Freescale Semiconductor

23 Packaging 4 Packaging in 0.0 mm 0.0mm 0.02 in pad pitch.0080 in 0.20 mm.0669 in 1.70 mm gnd flag under part.0829 in 2. mm.01 in dia 0.8 mm via thru holes.026 in 0.67 mm Figure 9. Board Layout Dimensions 0.14 in.68 mm visual pkg alignment line for x mm pkg Freescale Semiconductor 2

24 Packaging Figure. Outline Dimensions for QFN- 24 Freescale Semiconductor

25 Product Documentation Product Documentation This data sheet is labeled as a particular type: Product Preview, Advance Information, or Technical Data. Definitions of these types are available at: Table 1 summarizes revisions to this document since the previous release (Rev. 1.7). Table 1. Revision History Location Revision Figure 2 - SPI Bit Word Table 8 - SPI Used for Dual-, Tri-, and Quad-Band Configurations Revised diagram to remove penta-band info. Removed penta-band data, other revisions to table data. Section, Application Information Added new paragraph 4, revised paragraph. Figure - Application Circuit with Two MC18s Controlled by Common SPI Lines Figure 90 MHz LNA Application Schematic Figure MHz LNA Application Schematic Table 14 Bill of Materials New figure. Replaced drawing. Replaced drawing. Revised entries for the 90 MHz and 1800 MHz sections. Freescale Semiconductor 2

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