F²MC-16LX/FRLITE FAMILY COMPARISON OF MB90340 AND MB91270 SERIES MCU

Transcription

1 Fujitsu Microelectronics Europe Application Note MCU-AN E-12 F²MC-16LX/FRLITE FAMILY 16/32-BIT MICROCONTROLLER MB90340 / MB91270 SERIES COMPARISON OF MB90340 AND MB91270 SERIES MCU APPLICATION NOTE

2 Revision History Revision History Date Issue V1.0, PHu: 1 st release V1.1, PHu: Include information about Timebase Timer clock source V1.2, PHu: Error corrections This document contains 14 pages. MCU-AN E Fujitsu Microelectronics Europe GmbH

3 Warranty and Disclaimer Warranty and Disclaimer To the maximum extent permitted by applicable law, Fujitsu Microelectronics Europe GmbH restricts its warranties and its liability for all products delivered free of charge (e.g. software include or header files, application examples, target boards, evaluation boards, engineering samples of IC s etc.), its performance and any consequential damages, on the use of the Product in accordance with (i) the terms of the License Agreement and the Sale and Purchase Agreement under which agreements the Product has been delivered, (ii) the technical descriptions and (iii) all accompanying written materials. In addition, to the maximum extent permitted by applicable law, Fujitsu Microelectronics Europe GmbH disclaims all warranties and liabilities for the performance of the Product and any consequential damages in cases of unauthorised decompiling and/or reverse engineering and/or disassembling. Note, all these products are intended and must only be used in an evaluation laboratory environment. 1. Fujitsu Microelectronics Europe GmbH warrants that the Product will perform substantially in accordance with the accompanying written materials for a period of 90 days form the date of receipt by the customer. Concerning the hardware components of the Product, Fujitsu Microelectronics Europe GmbH warrants that the Product will be free from defects in material and workmanship under use and service as specified in the accompanying written materials for a duration of 1 year from the date of receipt by the customer. 2. Should a Product turn out to be defect, Fujitsu Microelectronics Europe GmbH s entire liability and the customer s exclusive remedy shall be, at Fujitsu Microelectronics Europe GmbH s sole discretion, either return of the purchase price and the license fee, or replacement of the Product or parts thereof, if the Product is returned to Fujitsu Microelectronics Europe GmbH in original packing and without further defects resulting from the customer s use or the transport. However, this warranty is excluded if the defect has resulted from an accident not attributable to Fujitsu Microelectronics Europe GmbH, or abuse or misapplication attributable to the customer or any other third party not relating to Fujitsu Microelectronics Europe GmbH. 3. To the maximum extent permitted by applicable law Fujitsu Microelectronics Europe GmbH disclaims all other warranties, whether expressed or implied, in particular, but not limited to, warranties of merchantability and fitness for a particular purpose for which the Product is not designated. 4. To the maximum extent permitted by applicable law, Fujitsu Microelectronics Europe GmbH s and its suppliers liability is restricted to intention and gross negligence. NO LIABILITY FOR CONSEQUENTIAL DAMAGES To the maximum extent permitted by applicable law, in no event shall Fujitsu Microelectronics Europe GmbH and its suppliers be liable for any damages whatsoever (including but without limitation, consequential and/or indirect damages for personal injury, assets of substantial value, loss of profits, interruption of business operation, loss of information, or any other monetary or pecuniary loss) arising from the use of the Product. Should one of the above stipulations be or become invalid and/or unenforceable, the remaining stipulations shall stay in full effect Fujitsu Microelectronics Europe GmbH MCU-AN E-12

4 Contents Contents REVISION HISTORY... 2 WARRANTY AND DISCLAIMER... 3 CONTENTS INTRODUCTION OVERVIEW Features HARDWARE Serial Programming Interface Mode Setting Pin Overview PERIPHERALS Timebase Timer DMA / EI 2 OS Watchdog AD Converter LIN-USART EXTERNAL BUS Chip Select Address Latch Enable Bus Operation Frequency Hold Function Endianess MCU-AN E Fujitsu Microelectronics Europe GmbH

5 Chapter 1 Introduction 1 Introduction This application note compares the MB90340 Series MCUs and the MB91270 Series MCUs. The MB90340 Series is a member of the F 2 MC-16LX family and is available in the M05 and the M06 package. The MB91270 Series is a member of the FRLite family and is available in the M05 package. When looking at the M05 package of both Series, the pin-out of the power pins and the general purpose IO pins is identical. This offers the possibility of designing a target application that can be equipped with either Series. This application note compares both Series so that the application can be designed in such a way as to allow deploying either Series. The emulation chip of the MB91270 Series is the MB91V280. The emulation chip of the MB90340 Series is the MB90V340. Fujitsu Microelectronics Europe GmbH MCU-AN E-12

6 Chapter 2 Overview 2 Overview The principle differences between the two series of MCUs are highlighted in this chapter. Detailed descriptions and support is given in the respective chapter. 2.1 Features The features of the MB90340 Series and the MB91270 Series are compared in the following table. ROM memory Part numbers with F have Flash ROM MB90V340 MB90(F)34X MB91V280 MB91(F)27X external MB90(F)346: 64 Kbyte MB90341, MB90348: 128 Kbyte MB90(F)347: 128 Kbyte MB90(F)342, MB90(F)349: 256 Kbyte MB90F343: 384 Kbyte MB90F345: 512 Kbyte RAM 30 Kbyte MB90(F)346: 2 Kbyte MB90(F)347: 6 Kbyte MB90341, MB90(F)342, MB90348, MB90(F)349: 16 Kbyte MB90F343, MB90F345: 20 Kbyte Flash Security No MB90341, MB90(F)342, MB90343, MB90F345, MB90(F)347, MB90348, MB90(F)349: Yes MB90(F)346: No external MB91F272: 256 Kbyte 48 Kbyte MB91F272: 10 Kbyte BIROMPLL Yes Yes No No No MB91F272: Yes System clock Max. 16 MHz Max. 16 MHz Max. 32 MHz Max. 32 MHz Subclock -101, -103: No -102, -104: Yes MB90(F)34X_S: No MB90(F)34X_: Yes Yes MB91F272S: No MB91F272W: Yes Clock monitor Yes Yes Yes Yes VCC Range 5.0 V +/-10% V V V Temperature range V when using ADC, Flash programming V when using external bus V when using ADC V when using ADC Not specified C Not specified C in single chip mode C in External bus mode Package PGA-299 QFP-100 / M06 / PF LQFP-100 / M05 / PFV PGA-401 LQFP-100 / M05 / PFV Interrupt levels Pin Input Levels Port selectable Port selectable Pin selectable Pin selectable Port pin pull-up function Port pin pulldown function DMA EI 2 OS / NDMA (16 ch) ADC (10 bit) Port 0 3 Port 0 3 All port pins except P44-P47, P56, P57, P76, P77 No No All port pins except P44-P47, P56, P57, P76, P77 24 ch, min. 1.9 Ns conversion time EI 2 OS / NDMA (16 ch) 5 ch 5 ch 24 ch, min. 1.9 Ns conversion time 32 ch, min Ns conversion time DAC 2 ch 0 2 ch 0 All port pins except P44-P47, P56, P57, P76, P77 All port pins except P44-P47, P56, P57, P76, P77 24 ch, min Ns conversion time MCU-AN E Fujitsu Microelectronics Europe GmbH

7 Chapter 2 Overview MB90V340 MB90(F)34X MB91V280 MB91(F)27X PPG 8 ch x 16 bit 16 ch x 8 bit 8 ch x 16 bit 16 ch x 8 bit 8 ch x 16 bit 16 ch x 8 bit 8 ch x 16 bit 16 ch x 8 bit LIN-USART 5 ch 4 ch 7 ch 7 ch CAN 3 ch F-CAN (16 msg) MB90341, MB90(F)342, MB90F343, MB90F345: 2 ch F-CAN (16 msg) MB90(F)346, MB90(F)347, MB90348, MB90(F)349: 1 ch F-CAN (16 msg) 3 C-CAN (128 msg) I 2 C 2 ch 2 ch 3 ch 3 ch OCU (16 bit) 8 ch 8 ch 8 ch 8 ch ICU (16 bit) 8 ch 8 ch 8 ch 8 ch I/O timer (16 bit) 2 ch 2 ch 4 ch 4 ch 1 C-CAN (32 msg) Reload timer 4 ch (16 bit) 4 ch (16 bit) 3 ch (16 bit) 3 ch (16 bit) Timebase timer Watchdog Watch Timer / RTC External bus, shared with IO pins 1 (main / sub clock driven) -101, -102: No -103, -104: Yes 16 bit data, 24 bit address 1 (main / sub clock driven) 1 1 MB90(F)34X_S: No MB90(F)34X_: Yes Yes (incl. registers for seconds, minutes, and hours) 16 bit data, 24 bit address, multiplexed 16 bit data, 24 bit address Yes (incl. registers for seconds, minutes, and hours) 16 bit data, 24 bit address, multiplexed External IRQ 16 ch 16 ch 16 ch 16 ch IO max 80 (82 for devices without subclock) (82 for devices without subclock) Chip select Up/Down counter ch x 16 bit 4 ch x 8 bit 2 ch x 16 bit 4 ch x 8 bit Fujitsu Microelectronics Europe GmbH MCU-AN E-12

8 Chapter 3 Hardware 3 Hardware 3.1 Serial Programming Interface The following table shows the differences that have to be considered for an application design. MB90340 Series MB91270 Series Burn-in UART UART0 UART1 Mode selection port pins P00, P01 P10, P Mode Setting The external bus mode is set in a two step process. First, the pins MD[2:0] determine, where the mode settings are located. Second, the mode register has to be set correctly. This is done in the start.asm file for the MB90340 Series and in the vectors.c file for the MB91270 Series. Mode MB90340 Series MB91270 Series Single Chip MD[2..0]= 011 MD[2..0]= 000 Internal ROM, External Bus, 8 bit access MD[2..0]= 011 MD[2..0]= 000 Internal ROM, External Bus, 16 bit access External ROM, External Bus, 8 bit access External ROM, External Bus, 16 bit access MD[2..0]= 011 MD[2..0]= 000 MD[2..0]= 001 MD[2..0]= 000 MD[2..0]= 001 MD[2..0]= 001 Note: The device MB91F272 supports only the Single Chip and the Internal ROM modes. The mode register MODR of the MB91270 Series, located at address 0xFFFF8, has to be set in the vectors.c file as shown in the following table. Mode Single Chip Internal ROM, External Bus, 8 bit access Internal ROM, External Bus, 16 bit access External ROM, External Bus, 8 bit access External ROM, External Bus, 16 bit access MB91(F)27X MODR 0x07 0x04 0x05 0x00 0x01 Note: The device MB91F272 supports only the Single Chip and the Internal ROM modes. MCU-AN E Fujitsu Microelectronics Europe GmbH

9 Chapter 3 Hardware 3.3 Pin Overview The following table compares the pin-out of the MB90340 Series to the MB91270 Series. Differences are highlighted. Pin number MB90340 MB91270 Pin Number MB90340 MB P26/A22/IN2 P26/A22/IN2 26 P54/AN12/TOT3 P54/AN12/AIN1 2 P27/A23/IN3 P27/A23/IN3 27 P55/AN13 P55/AN13/ZIN1 3 P30/ALE/IN4 P30/ASX/IN4 28 P56/AN14 P56/AN14/DAO0 4 P31/RDX/IN5 P31/RDX/IN5 29 P57/AN15 P57/AN15/DAO1 5 P32/WRLX/WRX/INT10R P32/WR0X/RX2/INT10R 30 AVcc AVcc 6 P33/WRHX P33/WR1X/TX2 31 AVRH AVRH 7 P34/HRQ/OUT4 P34/BRQ/OUT4 32 AVRL AVRL 8 P35/HAKX/OUT5 P35/BGRNTX/OUT5 33 AVss AVss 9 P36/RDY/OUT6 P36/RDY/OUT6 34 P60/AN0/PPG0 P60/AN0/PPG0 10 P37/CLK/OUT7 P37/SYSCLK/OUT7 35 P61/AN1/PPG2 P61/AN1/PPG2 11 P40/X0A P40/X1A 36 P62/AN2/PPG4 P62/AN2/PPG4 12 P41/X1A P41/X0A 37 P63/AN3/PPG6 P63/AN3/PPG6 13 Vcc Vcc 38 P64/AN4/PPG8 P64/AN4/PPG8 14 Vss Vss 39 P65/AN5/PPGA P65/AN5/PPGA 15 C C 40 P66/AN6/PPGC P66/AN6/PPGC 16 P42/IN6/RX1/INT9R P42/IN6/RX1/INT9R 41 P67/AN7/PPGE P67/AN7/PPGE 17 P43/IN7/TX1 P43/IN7/TX1 42 Vss Vss 18 P44/SDA0/FRCK0 P44/SDA0/FRCK0 43 P70/AN16/INT0 P70/AN16/INT0 19 P45/SCL0/FRCK1 P45/SCL0/FRCK1/AIN2 44 P71/AN17/INT1 P71/AN17/INT1 20 P46/SDA1 P46/SDA1/BIN2 45 P72/AN18/INT2 P72/AN18/INT2 21 P47/SCL1 P47/SCL1/ZIN2 46 P73/AN19/INT3 P73/AN19/INT3 22 P50/AN8/SIN2 P50/AN8/SIN2 47 P74/AN20/INT4 P74/AN20/INT4 23 P51/AN9/SOT2 P51/AN9/SOT2 48 P75/AN21/INT5 P75/AN21/INT5 24 P52/AN10/SCK2 P52/AN10/SCK2 49 MD2 MD2 25 P53/AN11/TIN3 P53/AN11/BIN1 50 MD1 MD1 Fujitsu Microelectronics Europe GmbH MCU-AN E-12

10 Chapter 3 Hardware Pin number MB90340 MB91270 Pin number MB90340 MB MD0 MD0 76 P01/AD01/INT9 P01/AD01/INT9/SOT5 52 RSTX INITX 77 P02/AD02/INT10 P02/AD02/INT10/SCK5 53 P76/AN22/INT6 P76/AN22/INT6/SDA2 78 P03/AD03/INT11 P03/AD03/INT11/SIN6 54 P77/AN23/INT7 P77/AN23/INT7/SCL2 79 P04/AD04/INT12 P04/AD04/INT12/SOT6 55 P80/TIN0/ADTG/INT12R P80/TIN0/ADTG/INT12R 80 P05/AD05/INT13 P05/AD05/INT13/SCK6 56 P81/TOT0/CKOT/INT13R P81/TOT0/CKOT/INT13R 81 P06/AD06/INT14 P06/AD06/INT14 57 P82/SIN0/TIN2/INT14R P82/SIN0/TIN2/INT14R 82 P07/AD07/INT15 P07/AD07/INT15 58 P83/SOT0/TOT2 P83/SOT0/TOT2 83 P10/AD08/TIN1 P10/AD08/TIN1 59 P84/SCK0/INT15R P84/SCK0/INT15R 84 P11/AD09/TOT1 P11/AD09/TOT1 60 P85/SIN1 P85/SIN1 85 P12/AD10/SIN3/INT11R P12/AD10/SIN3/INT11R 61 P86/SOT1 P86/SOT1 86 P13/AD11/SOT3 P13/AD11/SOT3 62 P87/SCK1 P87/SCK1 87 P14/AD12/SCK3 P14/AD12/SCK3 63 Vcc Vcc 88 Vcc Vcc 64 Vss Vss 89 Vss Vss 65 P90/PPG1 P90/CS0X/PPG1 90 X1 X1 66 P91/PPG3 P91/CS1X/PPG3/AIN3 91 X0 X0 67 P92/PPG5 P92/CS2X/PPG5/BIN3 92 P15/AD13/SIN4 P15/AD13/SIN4 68 P93/PPG7 P93/CS3X/PPG7/ZIN3 93 P16/AD14/SOT4 P16/AD14/SOT4 69 P94/OUT0 P94/OUT0/AIN0 94 P17/AD15/SCK4 P17/AD15/SCK4 70 P95/OUT1 P95/OUT1/BIN0 95 P20/A16/PPG9 P20/A16/PPG9 71 P96/OUT2 P96/OUT2/ZIN0 96 P21/A17/PPGB P21/A17/PPGB 72 P97/OUT3 P97/OUT3 97 P22/A18/PPGD P22/A18/PPGD 73 PA0/RX0/INT8R PA0/RX0/INT8R 98 P23/A19/PPGF P23/A19/PPGF 74 PA1/TX0 PA1/TX0 99 P24/A20/IN0 P24/A20/IN0 75 P00/AD00/INT8 P00/AD00/INT8/SIN5 100 P25/A21/IN1 P25/A21/IN1 MCU-AN E Fujitsu Microelectronics Europe GmbH

11 Chapter 4 Peripherals 4 Peripherals This chapter describes the differences of the on-chip peripherals. Note: The register settings of any used peripheral should be checked when porting software of either Series to the other Series. 4.1 Timebase Timer MB90340 Series MB91270 Series Set initial value No Yes Counter width 18 bit 26 bit Interval times 4 8 Clock Sources Main Clock (oscillation clock / 2) Main Clock (oscillation clock / 2) PLL Subclock 4.2 DMA / EI 2 OS Automatic data transfer function MB90340 Series EI 2 OS NDMA Number of channels 16 5 Channel assignment to resource Use all resources with interrupt that share an ICR Trigger EI 2 OS: Free NDMA: Fixed EI 2 OS: No NDMA: Yes EI 2 OS: All interrupts NDMA: Reload timer [0:2] External interrupt [0:15] ADC ICU [0:5] OCU [0:7] UART [0:4] I 2 C 1 MB91270 Series DMA Free Yes UART[0:2] External interrupt 0, 1 Reload timer [0:2] ADC 4.3 Watchdog MB90340 Series MB91270 Series Interval Main Clock (4 MHz): 3.58 ms ms Typ. 655 ms Subclock (8.192 khz): s s Default Disabled Enabled Fujitsu Microelectronics Europe GmbH MCU-AN E-12

12 Chapter 4 Peripherals 4.4 AD Converter Analog input port default function MB90340 Series MB91270 Series Analog input General purpose IO / peripheral function Min. conversion time 1.9 Ns 2.75 Ns ADC triggered by Reload Timer 1 External pin (falling edge) Software Reload Timer 2 External pin (falling edge) Software Note: The conversion time depends on the supply voltage, the machine clock, and the driving impedance. 4.5 LIN-USART For the LIN function of the LIN-USART, the LIN break detection is connected to a fixed ICU. The following table shows the assignments. Differences between the MB90340 Series and the MB91270 Series are highlighted. MB90V340 MB90(F)34X MB91V280 MB91(F)27X USART0 ICU0 ICU0 ICU0 ICU0 USART1 ICU1 ICU1 ICU1 ICU1 USART2 ICU6 ICU6 ICU2 ICU2 USART3 ICU7 ICU7 ICU3 ICU3 USART4 ICU6 n/a ICU4 ICU4 USART5 n/a n/a ICU5 ICU5 USART6 n/a n/a ICU6 (PFR43=1) ICU7 (PFR42=1) ICU6 (PFR43=1) ICU7 (PFR42=1) MCU-AN E Fujitsu Microelectronics Europe GmbH

13 Chapter 5 External Bus 5 External Bus This chapter describes the differences between the MB90340 Series and the MB91270 Series with respect to the usage of the external bus. 5.1 Chip Select The chip select signals CSX[3:0] are assigned to the pins P9[3:0] respectively. If these pins are used as general purpose IO by your application, make sure to disable the chip select feature. The chip select feature is disabled by setting the Chip Select Enable Register CSER=0x Address Latch Enable MB90340 Series MB91270 Series Name Address Latch Enable (ALE) Address Strobe (ASX) Assertion duration (min.) t CP /2 10 ns t CP Logic Positive Negative 5.3 Bus Operation Frequency The external bus of the MB91270 Series devices is specified for an operation frequency of up to 16 MHz. Before selecting a PLL setting that results in an internal base clock that exceeds 16 MHz, make sure that the external bus frequency is set to a lower frequency. The clock divider for the external clock is set by Base Clock Division Setting Register 1 (DIVR1) according to the following table. The register bits T[3:0] are located at bits DIVR1[7:4] respectively. Clock frequency: if the source oscillation is 4MHz T3 T2 T1 T0 Clock divide-by rate and the PLL is multiplied by R 32.0 MHz (initial value) R / MHz R / MHz R / MHz R / MHz R / MHz R / MHz R / MHz R / MHz R: Interval of the system base clock 5.4 Hold Function The MB90340 Series supports a Hold Function. In the MB91270 Series, only the evaluation chip MB91V280 supports it at this time. The signal names differ. Please see the table below for the corresponding signal names. Fujitsu Microelectronics Europe GmbH MCU-AN E-12

14 Chapter 5 External Bus MB90340 Series MB91V280 MB91F272 Hold request HRQ BRQ No Hold acknowledge HAKX BGRNTX No 5.5 Endianess While the MB90340 Series uses Little Endian mode, the MB91270 Series uses Big Endian mode. MCU-AN E Fujitsu Microelectronics Europe GmbH