F²MC-16LX FAMILY MB90XXX RELOCATED INTERRUPT VECTOR TABLE 16-BIT MICROCONTROLLER APPLICATION NOTE. Fujitsu Microelectronics Europe Application Note

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1 Fujitsu Microelectronics Europe Application Note AN-FMEMCU F²MC-16LX FAMILY 16-BIT MICROCONTROLLER MB90XXX RELOCATED INTERRUPT VECTOR TABLE APPLICATION NOTE

2 Revision History Revision History Date M Willam; 1 st version Issue This document contains 10 pages Fujitsu Microelectronics Europe GmbH

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4 Contents Contents REVISION HISTORY 2 WARRANTY AND DISCLAIMER3 CONTENTS4 0 INTRODUCTION 5 1 THE INTERRUPT TABLE6 11 Location6 12 Normal Reference7 2 SECOND TABLE - WORKAROUND8 21 Relocated Reference 8 22 Interrupt Flow9 23 Code Flow Fujitsu Microelectronics Europe GmbH

5 Introduction 0 Introduction This document describes how to use a customized Interrupt Vector Jump Table Fujitsu Microelectronics Europe GmbH

6 Chapter 1 The Interrupt Table 1 The Interrupt Table DESCRIPTION OF THE INTERRUPT VECTOR TABLE 11 Location The interrupt vector table is located fix in the Bank FF H There is no way for the user to move it to another memory location Below is a list of the interrupt vector address locations: Interrupt Vector Hardware Interrupt Interrupt Vector Control Reg Address L Address M Address H INT0 None - FFFFFC H FFFFFD H FFFFFE H INT7 None - FFFFE0 H FFFFE1 H FFFFE2 H INT8 Reset - FFFFDC H FFFFDD H FFFFDE H INT9 INT9 Instruction - FFFFD8 H FFFFD9 H FFFFDA H INT10 Exception - FFFFD4 H FFFFD5 H FFFFD6 H INT11 (device specific) FFFFD0 H FFFFD2 H FFFFD3 H ICR00 INT12 (device specific) FFFFCC H FFFCD H FFFFCE H INT254 (device specific) FFFC04 H FFFC05 H FFFC06 H ICR122 INT255 (device specific) FFFC00 H FFFC01 H FFFC02 H Note, that a device can have theoretical 255 interrupts, but in the most devices the number of interrupts is less than Fujitsu Microelectronics Europe GmbH

7 Chapter 1 The Interrupt Table 12 Normal Reference An example of he usual interrupt vector reference without relocation is shown below This has to be done in the file vectorsc /* Prototypes */ interrupt void IRQ_Handler1(void); interrupt void IRQ_Handler2(void); interrupt void IRQ_Handler3(void); /* Vector definition */ #pragma intvect IRQ_Handler1 9 #pragma intvect IRQ_Handler2 10 #pragma intvect IRQ_Handler3 11 usual vectorsc The following illustration shows the corresponding Interrupt handler routines In this example they can be found in the main program mainc } /* End of void main(void) */ interrupt void IRQ_Handler1(void) { /* Code here */ } interrupt void IRQ_Handler2(void) { /* Code here */ } interrupt void IRQ_Handler3(void) { /* Code here */ } mainc Fujitsu Microelectronics Europe GmbH

8 Chapter 2 Second Table - Workaround 2 Second Table - Workaround USING A SECOND TABLE 21 Relocated Reference It is possible to use a second so-called Jump-Table, which is then independent from the hard-wired table This table then has to be like in the following example in a separate assembly file: PROGRAM NEWVECT TITLE "ALTERNATIVE IRQ VECTOR TABLE" SECTION NEWINTVECT, CONST, LOCATE=H'FF8000 ; depends on MCU type IMPORT _IRQ_Handler1 IMPORT _IRQ_Handler2 IMPORT _IRQ_Handler3 EXPORT _Vector1 EXPORT _Vector2 EXPORT _Vector3 _Vector1: JMPP _IRQ_Handler1 _Vector2: JMPP _IRQ_Handler2 _Vector3: JMPP _IRQ_Handler3 END newvectasm _IRQ_Handlern is the basic interrupt handler function (ISR), which is normally referenced in vectorsc without relocation Depending on the Code segment in which this table and the interrupt service routine are located, you have to be careful using the JMP (16-Bit-Addressing) or the JMPP (24-Bit- Addressing) instruction Note, that JMPP will always work The next step is to reference to these Jump-Locations in the vectorsc file: Fujitsu Microelectronics Europe GmbH

9 Chapter 2 Second Table - Workaround /* Prototypes */ interrupt void Vector1(void); interrupt void Vector2(void); interrupt void Vector3(void); /* Vector definition */ #pragma intvect Vector1 9 #pragma intvect Vector2 10 #pragma intvect Vector3 11 vectorsc The file in which the Interrupt routines are coded ( Mainc ) remains unaffected 22 Interrupt Flow Now the instruction flow is like in the following illustration Interrupt occurs Save Registers IRQ 11? no Check if RESET, EI 2 OS, INT9, yes Fetch address of corresponding vector Vector Table FFxxxx H Workaround 1 st jump PC: Corresponding instruction of Interrupt Vector Jump Table New Vector Jump Table 2 nd jump Jump to Interrupt Handler Function (ISR) Interrupt Service Routine Fujitsu Microelectronics Europe GmbH

10 Chapter 2 Second Table - Workaround 23 Code Flow The following graphic illustrates the program code flow for the Jump Table Workaround: Mainc Vectorsc Instruction n Vectoraddress m-2 Instruction n+1 Instruction n+2 Instruction n+3 IRQ m CPU Tasks get Addr Vectoraddress m-1 Vectoraddress m Vectoraddress m+1 Instruction n+4 Vectoraddress m+2 Instruction n+5 Jump to Vectoraddr Newvectasm Return from Interrupt Vectoraddr m-2 JMP ISR m-2 Vectoraddr m-1 JMP ISR m-1 Vectoraddr m JMP ISR m Vectoraddr m+1 JMP ISR m+1 Vectoraddr m+2 JMP ISR m+2 Jump to ISR Interrupt Handler Routine ISR m -Instruction 1 ISR m -Instruction 2 ISR m -Instruction 3 ISR m -Instruction i RETI Fujitsu Microelectronics Europe GmbH