Alternate definition: Instruction Set Architecture (ISA) What is Computer Architecture? Computer Organization. Computer structure: Von Neumann model

Similar documents
IT 252 Computer Organization and Architecture. Introduction. Chia-Chi Teng

Lecture Topics. Announcements. Today: The MIPS ISA (P&H ) Next: continued. Milestone #1 (due 1/26) Milestone #2 (due 2/2)

Computer System architectures

What is Computer Architecture?

Review of instruction set architectures

INTEL Architectures GOPALAKRISHNAN IYER FALL 2009 ELEC : Computer Architecture and Design

Figure 1-1. A multilevel machine.

Evolution of ISAs. Instruction set architectures have changed over computer generations with changes in the

Processing Unit CS206T

ECE232: Hardware Organization and Design

Chapter 2: Instructions How we talk to the computer

ECE232: Hardware Organization and Design

Chapter 2. OS Overview

Computer Architecture Computer Architecture. Computer Architecture. What is Computer Architecture? Grading

Computer & Microprocessor Architecture HCA103

Computer Architecture

Computer Systems Architecture

Evolution of the Computer

CS Computer Architecture

EE382 Processor Design. Class Objectives

Microelectronics. Moore s Law. Initially, only a few gates or memory cells could be reliably manufactured and packaged together.

Reader's Guide Outline of the Book A Roadmap For Readers and Instructors Why Study Computer Organization and Architecture Internet and Web Resources

Instruction Set Principles and Examples. Appendix B

Typical Processor Execution Cycle

Evolution of Computers & Microprocessors. Dr. Cahit Karakuş

Real instruction set architectures. Part 2: a representative sample

Computer Evolution. Computer Generation. The Zero Generation (3) Charles Babbage. First Generation- Time Line

7/28/ Prentice-Hall, Inc Prentice-Hall, Inc Prentice-Hall, Inc Prentice-Hall, Inc Prentice-Hall, Inc.

Computer Architecture. Fall Dongkun Shin, SKKU

Fundamentals of Computer Design

Chapter 13 Reduced Instruction Set Computers

Hardware Level Organization

MIPS History. ISA MIPS Registers

Introduction. Summary. Why computer architecture? Technology trends Cost issues

William Stallings Computer Organization and Architecture 8th Edition. Cache Memory

CSE 141 Computer Architecture Spring Lecture 3 Instruction Set Architecute. Course Schedule. Announcements

Computer Evolution. Budditha Hettige. Department of Computer Science

Computer Organization

URL: Offered by: Should already know: Will learn: 01 1 EE 4720 Computer Architecture

1.3 Data processing; data storage; data movement; and control.

CMSC 611: Advanced Computer Architecture

ECE 468 Computer Architecture and Organization Lecture 1

Chapter 1. Computer Abstractions and Technology

Computer Architecture

Instruction Set Architecture

General Purpose Processors

The von Neumann Architecture. IT 3123 Hardware and Software Concepts. The Instruction Cycle. Registers. LMC Executes a Store.

Computer Systems. Binary Representation. Binary Representation. Logical Computation: Boolean Algebra

URL: Offered by: Should already know: Will learn: 01 1 EE 4720 Computer Architecture

Math 230 Assembly Programming (AKA Computer Organization) Spring 2008

Computer Architecture

55:132/22C:160, HPCA Spring 2011

1DT157 Digitalteknik och datorarkitekt. Digital technology and computer architecture, 5p

Unit 2. Chapter 4 Cache Memory

New Advances in Micro-Processors and computer architectures

MIPS Instruction Set Architecture (1)

COMPUTER ORGANIZATION AND DESI

SYSTEM BUS AND MOCROPROCESSORS HISTORY

Computer Organization CS 206T

CSEE 3827: Fundamentals of Computer Systems

Overview of Computer Organization. Chapter 1 S. Dandamudi

Computer Architecture!

Instruction Set Architectures. Part 1

Reduced Instruction Set Computer

Microprocessors I MICROCOMPUTERS AND MICROPROCESSORS

CSE Introduction to Computer Architecture. Jeff Brown

CISC 360. Computer Architecture. Seth Morecraft Course Web Site:

Introduction. Computer System Organization. Languages, Levels, Virtual Machines. A multilevel machine. Sarjana Magister Program

Outline. What Makes a Good ISA? Programmability. Implementability. Programmability Easy to express programs efficiently?

Overview of Computer Organization. Outline

COS 140: Foundations of Computer Science

Outline Marquette University

Chapter 9: A Closer Look at System Hardware

Chapter 2: Computer-System Structures. Hmm this looks like a Computer System?

Uniprocessor Computer Architecture Example: Cray T3E

Outline. What Makes a Good ISA? Programmability. Implementability

Computer Organization. 8 th Edition. Chapter 2 p Computer Evolution and Performance

Virtual Machines and Dynamic Translation: Implementing ISAs in Software

Chapter 9: A Closer Look at System Hardware 4

Computer Architecture. Introduction. Lynn Choi Korea University

Instruction Set Principles. (Appendix B)

IA-32 Architecture COE 205. Computer Organization and Assembly Language. Computer Engineering Department

ENIAC - background. ENIAC - details. Structure of von Nuemann machine. von Neumann/Turing Computer Architecture

Advanced Parallel Architecture Lesson 3. Annalisa Massini /2015

Instruction Set Architecture

ECE 471 Embedded Systems Lecture 2

Computer Organization and Architecture William Stallings 8th Edition. Chapter 2 Computer Evolution and Performance

Advanced Processor Architecture. Jin-Soo Kim Computer Systems Laboratory Sungkyunkwan University

Microprocessors. Microprocessors and rpeanut. Memory. Eric McCreath

Microprocessors and rpeanut. Eric McCreath

3.1 Description of Microprocessor. 3.2 History of Microprocessor

CC312: Computer Organization

This Unit: Putting It All Together. CIS 371 Computer Organization and Design. Sources. What is Computer Architecture?

Math 230 Assembly Programming (AKA Computer Organization) Spring MIPS Intro

Instruction Set Architecture (ISA)

Chapter 08: The Memory System. Lesson 01: Basic Concepts

CHAPTER 5 A Closer Look at Instruction Set Architectures

UNIT 8 1. Explain in detail the hardware support for preserving exception behavior during Speculation.

Computer Architecture

Computer Architecture and Organization (CS-507)

Transcription:

What is Computer Architecture? Structure: static arrangement of the parts Organization: dynamic interaction of the parts and their control Implementation: design of specific building blocks Performance: behavioral study of the system or of some of its components Alternate definition: Instruction Set Architecture (ISA) Architecture is an interface between layers ISA is the interface between hardware and software ISA is what is visible to the programmer (and ISA might be different for O.S. and applications) ISA consists of: instructions (operations and how they are encoded) information units (size, how they are addressed etc.) registers (or more generally processor state) input-output control 3/29/2004 CSE378 Gen. Intro 1 3/29/2004 CSE378 Gen. Intro 2 Computer structure: Von Neumann model Memory hierarchy Memory bus CPU control Registers Data path + Control ALU PC state I/O bus I/O Computer Organization Organization and architecture often used as synonyms Organization (in this course) refers to: what are the basic blocks of a computer system, more specifically basic blocks of the CPU basic blocks of the memory hierarchy how are the basic blocks designed, controlled, connected? Organization used to be transparent to the ISA. Today more and more of the ISA is exposed to the user/compiler. 3/29/2004 CSE378 Gen. Intro 3 3/29/2004 CSE378 Gen. Intro 4 1

Advances in technology Evolution of Intel Microprocessor Speeds Processor Vacuum technology tubes Memory Vacuum technology tubes Processor structure TransistorsIntegrated circuits Ferrite core Single Main processor frames VLSI Semiconductor Semiconductor Micros and minis PC s 64-bit arch Superscalar Multithreaded Speed (MHz) 4000 3500 3000 2500 2000 1500 1000 500 0 1971 1974 1979 1982 1985 1989 1993 1997 1998 1999 2000 2001 2002 2003 Year 3/29/2004 CSE378 Gen. Intro 5 3/29/2004 CSE378 Gen. Intro 6 Illustration of Moore s Law Power Dissipation 3/29/2004 CSE378 Gen. Intro 7 3/29/2004 CSE378 Gen. Intro 8 2

Some Computer families More computer families Computers that have the same (or very similar) ISA Compatibility of software between various implementations IBM 704, 709, 70xx etc.. From 1955 till 1965 360, 370, 43xx, 33xx From 1965 to the present Power PC DEC PDP-11, VAX From 1970 till 1985 Alpha (now Compaq, now HP) in 1990 s Intel Early micros 40xx in early 70 s x86 (086,,486, Pentium, Pentium Pro, Pentium 3, Pentium 4) from 1980 on IA-64 (Itanium) in 2001 SUN Sparc, Ultra Sparc 1985 0n MIPS-SGI Mips 2000, 3000, 4400, 10000 from 1985 on 3/29/2004 CSE378 Gen. Intro 9 3/29/2004 CSE378 Gen. Intro 10 MIPS is a RISC Registers RISC = Reduced Instruction Set Computer R could also stand for regular All arithmetic-logical instructions are of the form R R a b op R c MIPS (as all RISC s) is a Load-Store architecture ALU operates only on operands that are in registers The only instructions accessing memory are load and store Registers are the bricks of the CPU Registers are an essential part of the ISA Visible to the hardware and to the programmer Registers are Used for high speed storage for operands. For example, if a,b,c are in registers 8,9,10 respectively add $8,$9,$10 # a = b + c Easy to name (most computers have 32 registers visible to the programmer and their names are 0, 1, 2,,31) Used for addressing memory 3/29/2004 CSE378 Gen. Intro 11 3/29/2004 CSE378 Gen. Intro 12 3

Registers (ct d) Memory system Not all registers are equal Some are special-purpose (e.g., register 0 in MIPS is wired to the value 0) Some are used for integer and some for floating-point (e.g., 32 of each in MIPS) Some have restricted use by convention (cf. App. A pp A-22-23) Why no more than 32 or 64 registers Well, sometimes there is (SPARC, Itanium, Cray, Tera) Smaller is faster Instruction encoding (names have to be short) There can be more registers but they are invisible to the ISA this is called register renaming (see CSE 471) Memory is a hierarchy of devices with faster and more expensive ones closer to CPU Registers Caches (hierarchy: on-chip, off-chip) Main memory (DRAM) Secondary memory (disks) 3/29/2004 CSE378 Gen. Intro 13 3/29/2004 CSE378 Gen. Intro 14 Information units Memory addressing Basic unit is the bit (has value 0 or 1) Bits are grouped together in information units: Byte = 8 bits Word = 4 bytes Double word = 2 words etc. Memory is an array of information units Each unit has the same size Each unit has its own address Address of an unit and contents of the unit at that address are different 0 1 2-123 17 0 contents address 3/29/2004 CSE378 Gen. Intro 15 3/29/2004 CSE378 Gen. Intro 16 4

Addressing Addressing words In most of today s computers, the basic I-unit that can be addressed is a byte MIPS is byte addressable The address space is the set of all I-units that a program can reference The address space is tied to the length of the registers MIPS has 32-bit registers. Hence its address space is 4G bytes Older micros (minis) had 16-bit registers, hence 64 KB address space (too small) Some current (Alpha, Itanium, Sparc, Altheon) machines have 64- bit registers, hence an enormous address space Although machines are byte-addressable, words are the most commonly used I-units Every word starts at an address divisible by 4 Word at address 0 Word at address 4 Word at address 8 3/29/2004 CSE378 Gen. Intro 17 3/29/2004 CSE378 Gen. Intro 18 Big-endian vs. little endian The CPU - Instruction Execution Cycle Byte order within a word: 3 2 1 0 0 1 2 3 Little-endian (we ll use this) Big-endian The CPU executes a program by repeatedly following this cycle 1. Fetch the next instruction, say instruction i 2. Execute instruction i 3. Compute address of the next instruction, say j 4. Go back to step 1 Of course we ll optimize this but it s the basic concept 3/29/2004 CSE378 Gen. Intro 19 3/29/2004 CSE378 Gen. Intro 20 5

What s in an instruction? An instruction tells the CPU the operation to be performed via the OPCODE where to find the operands (source and destination) For a given instruction, the ISA specifies what the OPCODE means (semantics) how many operands are required and their types, sizes etc.(syntax) Operand is either register (integer, floating-point, PC) a memory address a constant 3/29/2004 CSE378 Gen. Intro 21 6