CHETTINAD COLLEGE OF ENGINEERING AND TECHNOLOGY COMPUTER ARCHITECURE- III YEAR EEE-6 TH SEMESTER 16 MARKS QUESTION BANK UNIT-1 Data representation: (CHAPTER-3) 1. Discuss in brief about Data types, (8marks) see problems Number system, octal and hexadecimal numbers, decimal & alphanumeric representation. 2. Explain Complements & its types, (8 marks) see problems. r-1,r scomplements,subtraction of unsigned numbers. 3. Write a note on Fixed point representation, (16 marks) - see problems Integer representation, Arithmetic addition, arithmetic subtraction, overflow, decimal fixed point representation 4. Write a note on Floating-point representation, (8 marks) - see problems Mantissa exponent, fraction, normalization, byte format. 5. Explain binary codes and error detection codes. (8 marks) Gray code, other decimal codes and parity bit, parity generator, checker, odd function. Register transfer and micro operations: (CHAPTER-4) 1. Discuss in brief about Register transfer language, (4 marks) Micro operation, register transfer, language. 2. Discuss in brief about Register transfer, (8 marks) Registers, register transfer, control function. 3. Discuss the ways for constructing bus system- (16 marks) (98-102) Common bus, bus selection 4. Explain Bus and memory transfers, (16 marks) Common bus, bus selection, three state bus buffer,memory transfer. 5. Explain Three state bus buffer (8 marks)
Three state gate,high impedance,buffer,bus system. 6. Explain Arithmetic micro-operations, (16 marks) Add microoperation, binary adder,binary adder-subtractor,binary incrementer,arithmetic circuit. 7. Explain 4 bit binary adder. Binary adder, full adder, adder-subtractor,diagram. 8. Explain 4 bit adder-subtractor (104-105), 4 bit adder-subtractor diagram. 9. Explain Binary incrementer(105-106),4 bit Binary incrementer diagram. 10. Explain 4 bit arithmetic circuit (106-108),4 bit arithmetic circuit diagram. 11. Explain Logic micro-operations and its applications(109-113) (16 marks), list of logic micro operations, hardware implementation, some applications. 12. Explain Shift micro operations, (16 marks), hardware implementation, 4 bit combinational circuit shifter. 13. Explain Arithmetic logic shift unit. (8 marks), diagram Basic computer organization and design: (CHAPTER-5) 1. Explain Instruction codes (125-129) Introduction, the basic computer, instructions, instruction format, addressing modes, processor registers. 2. Explain Computer registers (129-134) 16 marks Introduction, Basic computer registers, common bus system and its diagram 3. Explain Computer instructions and its types- (134-137) 8 marks Memory-reference instructions (op-code = 000 ~ 110), register-reference instructions (op-code = 111, i = 0), input-output instructions (op-code =111, i = 1), Basic computer instructions, instruction set completeness, control unit. 4. Explain Timing and control (8 marks), timing signals diagram.
5. Write note on Instruction cycle (16 marks) (141-146) Fetch and decode & its diagram,determine the type of instruction, instruction cycle flowchart, register reference instructions,memory reference instructions,flowchart for memory reference instructions 6. Explain Memory reference instructions (16 marks) Memory reference instructions explanation, flowchart for memory reference instructions 7. Explain Input output and interrupt (16 marks), diagram, flowchart for interrupt cycle. 8. Explain Complete computer description 9. Explain the Design of basic computer (16marks) (159-166) Hardware components of bc, control logic gates, address register; ar, ien: interrupt enable flag, control of common bus diagram, 10. Explain the Design of accumulator logic (8 marks), block diagram. UNIT-2 Micro programmed control: (CHAPTER-7) 1. Explain Control memory (8 marks) Introduction 2 types of control units Control word Control word Microinstruction Control Memory (Control Storage: CS) Control Address Register Sequencer 2. Explain Address sequencing (8 marks) Address sequence capability required in control memory are: Incrementing CAR
Unconditional-Conditional branching depending on status bits Mapping from bits of instruction to address in control memory Subroutine call-return facility Conditional Branching with diagram Instruction Mapping Mapping of instruction 3. Explain Micro-program example (16 marks) Microprogram Example Instruction format 4. Explain Microinstruction format (10 marks) (224-227) Microinstruction Format Microinstruction Field F1-F2-F3 Condition Field CD Branch Field BR 5. Explain Symbolic microinstructions Address field ORG Fetch and decode 6. Explain Symbolic micro program. Example Table Execution of instructions 7. Explain Binary microprgram. Table 8. Explain the Design of control unit. (8 marks) (233-237)
Microprogram sequencer with diagram 9. Chapter exercise problem: 7.2, 7.1, 7.3, 7.11 Central processing unit: (CHAPTER-8) 1. Explain General register organization (8 marks) (244-249) Bus system Control word Table Examples of microoperations 2. Explain Stack organization (16 marks) (249-257) LIFO Stack pointer Register stack Memory stack Reverse polish notation Evaluation of arithmetic expressions 3. Explain Instruction formats (16 marks)- (257-262) Register address Single accumulator organization General register organization Stack organization Three address instruction Two address instruction One address instruction Zero address instruction RISC instruction
4. Explain Addressing modes (16 marks) (262-268) Program counter Mode field Mode types Numerical example 5. Explain Data transfer and manipulation (16 marks) (268-274) Data transfer instruction Data manipulation instruction Program control instructions 6. Explain Program control (16 marks) (275-284) Table Status bit conditions Conditional branch instructions Table Subroutine call and return Program interrupt Types of interrupts 7. Explain Types of interrupt (8 marks) (283-284) External interrupt Internal interrupt Software interrupt 8. Explain Reduced instruction set computer. (RISC) (16 marks) (284-293) CISC characteristics RISC characteristics Overlapped register windows Berkeley RISC I Table.
9. Compare the characteristics of RISC & CISC (285-287) 8 marks 10. Explain Overlapped register windows (287-290) 11. Explain Berkeley RISC I (290-293) Berkeley instruction format Table UNIT-3 Computer arithmetic: (CHAPTER-10) 1. Explain Addition and subtraction, (16 marks) Addition and subtraction with signed magnitude data Hardware implementations Hardware algorithm Flowchart Addition and subtraction with signed -2 s complement magnitude data 2. Explain Multiplication algorithms, (16 marks) Example Hardware implementation for signed magnitude data Hardware algorithm Booth Multiplication algorithm with flowchart Array multiplier 3. Explain Booth Multiplication algorithms (16 marks) (345-350) with flowchart. 4. Explain Division algorithms, (16 marks) Hardware implementation for signed magnitude data Divide overflow Hardware algorithm with flowchart
Other algorithms 5. Explain Floating-point arithmetic operations, (16 marks) Basic considerations Register configuration Addition and subtraction with flowchart Multiplication with flowchart Division 6. Explain Decimal arithmetic unit, (16 marks) Flowchart BCD adder Block diagram BCD subtraction 7. Explain Decimal arithmetic operations. (16 marks) Block diagram Addition and subtraction Multiplication with diagram, flowchart Division Floating point operations. Pipeline and vector processing: (CHAPTER-9) 1. Write note on Parallel processing, (16 marks) SISD SIMD MISD MIMD Applications 2. Explain Pipelining, (8 marks) with example General considerations 3. Explain Arithmetic pipeline, (16 marks)
s Four steps 4. Explain Instruction pipeline, (16 marks) Six steps Example Flowchart Data dependency Handling of branch instructions. 5. Explain RISC pipeline, (16 marks) with example Delay load Delayed branch 6. Explain Vector processing (16 marks) with example Applications Vector operations Matrix multiplications Memory interleaving Super scalar processors Super computers. 7. Explain Superscalar and super computer (8 marks) 8. Explain Array processors and its types. (16 marks) Attached array processor SIMD array processor
UNIT-4 Input-output organization: (CHAPTER-11) 1. Explain various Peripheral devices,(4 marks) Input Devices Keyboard Optical input devices-card Reader-Paper Tape Reader-Bar code reader-digitizer- Optical Mark Reader Magnetic Input Devices-Magnetic Stripe Reader Screen Input Devices-Touch Screen-Light Pen-Mouse Analog Input Devices Output Devices Card Puncher, Paper Tape Puncher CRT Printer (Impact, Ink Jet, Laser, Dot Matrix) Plotter Analog Voice 2. Explain Input-output interface, (16 marks) I/O Bus and Interface Modules I/O versus Memory Bus Isolated versus Memory-Mapped I/O & example 3. Explain Asynchronous data transfer, (16 marks) Synchronous and asynchronous operations Asynchronous data transfer Two asynchronous data transfer methods o strobe pulse & handshaking with block diagram Strobe methods Asynchronous serial transfer Asynchronous communication interface First-in-first-out(fifo) buffer 4. Write note on Handshaking (395-398)
with block diagram 5. Explain the Modes of transfer, (16 marks) Programmed I/O with flowchart Interrupt-initiated I/O Direct memory access (DMA) 6. Explain Programmed I/O (405-408) Programmed I/O explanation with flowchart 7. Explain Priority interrupt, (16 marks) Parallel priority interrupt Interrupt priority encoder Interrupt cycle Interrupt service routine Initial and final operations 8. Explain Direct memory access, (16 marks) CPU bus signals for DMA transfer Block diagram of DMA controller DMA I/O OPERATION CYCLE STEALING DMA TRANSFER 9. Explain Input-output processor, (16 marks) IOP Command CPU -IOP Communication IBM 370 I/O Channel Intel 8089 IOP 10. Explain Serial communication (16 marks) Difference between I/O Processorand Data Communication Processor Modem Block transfer Error Check
3 Transmission System Data Link Data Link protocol Character-Oriented Protocol Data Transparency DLE Bit-Oriented Protocol Zero Insertion Control field format Control Fields UNIT-5 Memory organization: (CHAPTER-12) 1. Discuss in brief about Memory hierarchy Cache memory auxillary memory diagram multiprogramming. 2. Explain Main memory (16 marks) RAM ROM bootstrap loader computer startup RAM&ROM chips diagram memory address map table memory connection to CPU & diagram. 3. Write note on Auxiliary memory.
magnetic disks & diagram magnetic tape. 4. Write note on Associative memory (16 MARKS) CAM hardware organization block diagram match logic and diagram write operation. 5. Write note on Associative mapping. diagram with example 6. Explain Direct mapping diagram with example 7. Explain Set associative mapping diagram with example 8. Explain Cache memory (16 MARKS) Associative mapping Direct mapping Set associative mapping writing into cache cache initialization diagram with example 9. Explain Virtual memory (16 marks) Address Space (Logical) and Memory Space (Physical) Address Mapping Using Pages, Associative Memory Page Table Page Replacement: (page fault, FIFO, OPT (Optimal Replacement) algorithm, LRU algorithm)
10. Explain Page replacement example (hint : FIFO, LRU) (477-478) Page fault FIFO OPT (Optimal Replacement) algorithm LRU algorithm. 11. Explain Memory management hardware (16 marks) Segment logical address Segmented-Page mapping diagram numerical example memory protection. 12. CHAPTER-12 EXRECISE PROBLEM NUMBER - 12.21,12.20,12.19,12.15