Arithmetic Circuits. Design of Digital Circuits 2014 Srdjan Capkun Frank K. Gürkaynak.

Similar documents
Arithmetic Logic Unit. Digital Computer Design

Chapter 5. Digital Design and Computer Architecture, 2 nd Edition. David Money Harris and Sarah L. Harris. Chapter 5 <1>

Digital Logic & Computer Design CS Professor Dan Moldovan Spring 2010

Lecture Topics. Announcements. Today: Integer Arithmetic (P&H ) Next: continued. Consulting hours. Introduction to Sim. Milestone #1 (due 1/26)

Computer Architecture and Organization: L04: Micro-operations

EECS150 - Digital Design Lecture 13 - Combinational Logic & Arithmetic Circuits Part 3

Digital Circuit Design and Language. Datapath Design. Chang, Ik Joon Kyunghee University

Design of Digital Circuits 2017 Srdjan Capkun Onur Mutlu (Guest starring: Frank K. Gürkaynak and Aanjhan Ranganathan)

ENGR 303 Introduction to Logic Design Lecture 7. Dr. Chuck Brown Engineering and Computer Information Science Folsom Lake College

REGISTER TRANSFER LANGUAGE

Chapter 3: part 3 Binary Subtraction

Tailoring the 32-Bit ALU to MIPS

Let s put together a Manual Processor

Week 6: Processor Components

COMP 303 Computer Architecture Lecture 6

Timing for Ripple Carry Adder

Review: MIPS Organization

Arithmetic-logic units

Number Systems and Computer Arithmetic

Lecture 8: Addition, Multiplication & Division

UNIT-III REGISTER TRANSFER LANGUAGE AND DESIGN OF CONTROL UNIT

EXPERIMENT #8: BINARY ARITHMETIC OPERATIONS

Two-Level CLA for 4-bit Adder. Two-Level CLA for 4-bit Adder. Two-Level CLA for 16-bit Adder. A Closer Look at CLA Delay

CPE300: Digital System Architecture and Design

CS/COE0447: Computer Organization

EE260: Logic Design, Spring n Integer multiplication. n Booth s algorithm. n Integer division. n Restoring, non-restoring

CS/COE0447: Computer Organization

CSC 220: Computer Organization Unit 10 Arithmetic-logic units

Register Transfer and Micro-operations

Jan Rabaey Homework # 7 Solutions EECS141

Week 7: Assignment Solutions

ECE 341 Midterm Exam

Introduction to Digital Logic Missouri S&T University CPE 2210 Multipliers/Dividers

Arithmetic Logic Unit (ALU)

Binary Adders: Half Adders and Full Adders

MIPS Integer ALU Requirements

Lecture Topics. Announcements. Today: Integer Arithmetic (P&H ) Next: The MIPS ISA (P&H ) Consulting hours. Milestone #1 (due 1/26)

Chapter 3 Arithmetic for Computers

COMPUTER ARCHITECTURE AND ORGANIZATION Register Transfer and Micro-operations 1. Introduction A digital system is an interconnection of digital

Addition and multiplication

NUMBER OPERATIONS. Mahdi Nazm Bojnordi. CS/ECE 3810: Computer Organization. Assistant Professor School of Computing University of Utah

Arithmetic Circuits. Nurul Hazlina Adder 2. Multiplier 3. Arithmetic Logic Unit (ALU) 4. HDL for Arithmetic Circuit

carry in carry 1101 carry carry

Chapter 4 Design of Function Specific Arithmetic Circuits

361 div.1. Computer Architecture EECS 361 Lecture 7: ALU Design : Division

Real Digital Problem Set #6

e-pg Pathshala Subject : Computer Science Paper: Embedded System Module: Introduction to Computing Module No: CS/ES/1 Quadrant 1 e-text

For Example: P: LOAD 5 R0. The command given here is used to load a data 5 to the register R0.

Introduction to Boole algebra. Binary algebra

Register Transfer Language and Microoperations (Part 2)

Chapter 4. Combinational Logic

BINARY SYSTEM. Binary system is used in digital systems because it is:

Microcomputers. Outline. Number Systems and Digital Logic Review

DIGITAL TECHNICS. Dr. Bálint Pődör. Óbuda University, Microelectronics and Technology Institute

CO Computer Architecture and Programming Languages CAPL. Lecture 9

CS/COE 0447 Example Problems for Exam 2 Spring 2011

CS101 Lecture 25: The Machinery of Computation: Computer Architecture. John Magee 29 July 2013 Some material copyright Jones and Bartlett

Arithmetic Logic Unit

Chapter 4 Arithmetic

Chapter 4 Arithmetic Functions

Experiment 7 Arithmetic Circuits Design and Implementation

Combinational Circuits

Binary Adders. Ripple-Carry Adder

6. Combinational Circuits. Building Blocks. Digital Circuits. Wires. Q. What is a digital system? A. Digital: signals are 0 or 1.

ECE 2030B 1:00pm Computer Engineering Spring problems, 5 pages Exam Two 10 March 2010

Digital Design with FPGAs. By Neeraj Kulkarni

Chapter 4. The Processor

Advanced Computer Architecture-CS501

Combinational Logic Circuits

ELCT 501: Digital System Design

Binary Arithmetic. Daniel Sanchez Computer Science & Artificial Intelligence Lab M.I.T.

EE878 Special Topics in VLSI. Computer Arithmetic for Digital Signal Processing

COMPUTER ORGANIZATION AND DESIGN. 5 th Edition. The Hardware/Software Interface. Chapter 3. Arithmetic for Computers Implementation

VTU NOTES QUESTION PAPERS NEWS RESULTS FORUMS Arithmetic (a) The four possible cases Carry (b) Truth table x y

Ripple Counters. Lecture 30 1

Systems Architecture

FPGA Design Challenge :Techkriti 14 Digital Design using Verilog Part 1

Chapter 3 Arithmetic for Computers. ELEC 5200/ From P-H slides

ECE 30 Introduction to Computer Engineering

Arithmetic and Logical Operations

DC57 COMPUTER ORGANIZATION JUNE 2013

Module 2: Computer Arithmetic

CS140 Lecture 03: The Machinery of Computation: Combinational Logic

An instruction set processor consist of two important units: Data Processing Unit (DataPath) Program Control Unit

Parallel logic circuits

Software and Hardware

Learning Outcomes. Spiral 2-2. Digital System Design DATAPATH COMPONENTS

END-TERM EXAMINATION

Computer Organisation CS303

Computer Arithmetic Multiplication & Shift Chapter 3.4 EEC170 FQ 2005

Computer Architecture Set Four. Arithmetic

CHAPTER 6 ARITHMETIC, LOGIC INSTRUCTIONS, AND PROGRAMS

CS 5803 Introduction to High Performance Computer Architecture: Arithmetic Logic Unit. A.R. Hurson 323 CS Building, Missouri S&T

Chapter 4. The Processor

CS222: Processor Design

The ALU consists of combinational logic. Processes all data in the CPU. ALL von Neuman machines have an ALU loop.

Arithmetic Operations

Basic Arithmetic and the ALU. Basic Arithmetic and the ALU. Background. Background. Integer multiplication, division

ECE331: Hardware Organization and Design

Outline. EEL-4713 Computer Architecture Multipliers and shifters. Deriving requirements of ALU. MIPS arithmetic instructions

Transcription:

Arithmetic Circuits Design of Digital Circuits 2014 Srdjan Capkun Frank K. Gürkaynak http://www.syssec.ethz.ch/education/digitaltechnik_14 Adapted from Digital Design and Computer Architecture, David Money Harris & Sarah L. Harris 2007 Elsevier 1

In This Lecture Why are arithmetic circuits so important Adders Adding two binary numbers Adding more than two binary numbers Circuits Based on Adders Multipliers Functions that do not use adders Arithmetic Logic Units 2

Motivation: Arithmetic Circuits Core of every digital circuit Everything else is side-dish, arithmetic circuits are the heart of the digital system Determines the performance of the system Dictates clock rate, speed, area If arithmetic circuits are optimized performance will improve Opportunities for improvement ovel algorithms require novel combinations of arithmetic circuits, there is always room for improvement 3

Example: ARM Microcontroller Most popular embedded micro controller. Contains: Multiplier Accumulator ALU/Adder Shifter Incrementer 4

Example: ARM Instructions 5

Arithmetic Based Instructions of ARM 6

Types of Arithmetic Circuits In order of complexity: Shift / Rotate Compare Increment / Decrement egation Addition / Subtraction Multiplication Division Square Root Exponentation Logarithmic / Trigonometric Functions 7

Relation Between Arithmetic Operators 8

Addition Addition is the most important operation in computer arithmetic. Our topics will be: Adding 1-bit numbers : Counting bits Adding two numbers : Basics of addition Circuits based on adders : Subtractors, Comparators Adding multiple numbers : Chains of Adders Later we will also talk about fast adder architectures 9

Half-Adder (2,2) Counter The Half Adder (HA) is the simplest arithmetic block It can add two 1-bit numbers, result is a 2-bit number Can be realized easily 10

Full-Adder (3,2) Counter The Full Adder (FA) is the essential arithmetic block It can add three 1-bit numbers, result is a 2-bit number There are many realizations both at gate and transistor level. Since it is used in building many arithmetic operations, the performance of one FA influences the overall performance greatly. 11

Adding Multiple 1-bit umbers 12

Adding Multiple Digits Similar to decimal addition Starting from the right, each digit is added The carry from one digit is added to the digit to the left 13

Adding Multiple Digits Similar to decimal addition Starting from the right, each digit is added The carry from one digit is added to the digit to the left 14

Ripple Carry Adder (RCA) 15

Curse of the Carry The most significant outputs of the adder depends on the least significant inputs 16

Adding Multiple umbers Multiple fast adders not a good idea If more than 2 numbers are to be added, multiple fast adders are not really efficient Use an array of ripple carry adders Popular and efficient solution Use carry save adder trees Instead of using carry propagate adders (the adders we have seen so far), carry save adders are used to reduce multiple inputs to two, and then a single carry propagate adder is used to sum up. 17

Array of Ripple Carry Adders 18

Carry Save Principle Reduces three numbers to two with a single gate delay C + S = E + F + G 19

Carry Save Principle Z = D + E + F + G + H An array of carry save adders reduce the inputs to two A final (fast) carry propagate adder (CPA) merges the two numbers Performance mostly dictated by CPA 20

Multipliers Largest common arithmetic block Requires a lot of calculation Has three parts Partial Product Generation Carry Save Tree to reduce partial products Carry Propagate Adder to finalize the addition Adder performance (once again) is important Many optimization alternatives 21

Decimal Multiplication 22

Binary Multiplication 23

For n-bit Multiplier m-bit Multiplicand Generate Partial Products For each bit of the multiplier the partial product is either when 0 : all zeroes when 1 : the multiplicand achieved easily by AD gates Reduce Partial Products This is the job of a carry save adder Generate the Result (n + m bits) This is a large, fast Carry Propagate Adder 24

Parallel Multiplier 25

Parallel Multiplier 26

Operations Based on Adders Several well-known arithmetic operation are based on adders: egator Incrementer Subtracter Adder Subtracter Comparator 27

egating Two s Complement umbers To negate a two s complement number -A = A + 1 All bits are inverted One is added to the result Can be realized easily by an adder. B input is optimized away 28

Incrementer B input is zero Carry In (C in ) of the adder can be used as the Increment (Inc) input Decrementer similar in principle 29

Subtracter B input is inverted C in of the adder is used to complement B 30

Subtracter B input is inverted C in of the adder is used to complement B It can be made programmable so that both additions and subtractions can be performed at the same time 31

Comparator Based on a Subtractor (A = B) = EQ (A!= B) = EQ (A > B) = GE EQ (A >= B) = GE (A < B) = GE (A <= B) = GE + EQ 32

Functions Realized Without Adders ot all arithmetic functions are realized by using adders Shift / Rotate Units Binary Logic functions are also used by processors AD OR XOR OT These are implemented very easily 33

Shifters Logical shifter: shifts value to left or right and fills empty spaces with 0 s Ex: 11001 >> 2 =?? Ex: 11001 << 2 =?? Arithmetic shifter: same as logical shifter, but on right shift, fills empty spaces with the old most significant bit (msb). Ex: 11001 >>> 2 =?? Ex: 11001 <<< 2 =?? Rotator: rotates bits in a circle, such that bits shifted off one end are shifted into the other end Ex: 11001 ROR 2 =?? Ex: 11001 ROL 2 =?? 34

Shifters Logical shifter: shifts value to left or right and fills empty spaces with 0 s Ex: 11001 >> 2 = 00110 Ex: 11001 << 2 = 00100 Arithmetic shifter: same as logical shifter, but on right shift, fills empty spaces with the old most significant bit (msb). Ex: 11001 >>> 2 = 11110 Ex: 11001 <<< 2 = 00100 Rotator: rotates bits in a circle, such that bits shifted off one end are shifted into the other end Ex: 11001 ROR 2 = 01110 Ex: 11001 ROL 2 = 00111 35

Shifter Design A 3 A 2 A 1 A 0 shamt 1:0 2 00 S 1:0 01 10 Y 3 11 shamt 1:0 A 3:0 >> Y 3:0 2 4 4 00 01 10 11 00 01 S 1:0 S 1:0 Y 2 10 Y 1 11 00 01 S 1:0 10 Y 0 11 36

Shifters as Multipliers and Dividers A left shift by bits multiplies a number by 2 Ex: 00001 << 2 = 00100 (1 2 2 = 4) Ex: 11101 << 2 = 10100 (-3 2 2 = -12) The arithmetic right shift by divides a number by 2 Ex: 01000 >>> 2 = 00010 (8 2 2 = 2) Ex: 10000 >>> 2 = 11100 (-16 2 2 = -4) 37

Other Functions We have covered 90% of the arithmetic functions commonly used in a CPU Division Dedicated architectures not very common Mostly implemented by existing hardware (multipliers, subtractors comparators) iteratively Exponential, Logarithmic, Trigonometric Functions Dedicated hardware (less common) umerical approximations: exp(x) = 1 + x 2 /2! + x 3 /3! + Look-up tables (more common) 38

Arithmetic Logic Unit The reason why we study digital circuits: the part of the CPU that does something (other than copying data) Defines the basic operations that the CPU can perform directly Other functions can be realized using the existing ones iteratively. (i.e. multiplication can be realized by shifting and adding) Mostly, a collection of resources that work in parallel. Depending on the operation one of the outputs is selected 39

Example: Arithmetic Logic Unit (ALU), pg243 F 2:0 Function A ALU B 3 F 000 A & B 001 A B 010 A + B 011 not used 100 A & ~B Y 101 A ~B 110 A - B 111 SLT 40

3 Zero Extend 2 1 0 1 0 Carnegie Mellon Example: ALU Design F 2:0 Function A B 000 A & B 001 A B 010 A + B F 2 011 not used C out + [-1] S 100 A & ~B 2 F 1:0 101 A ~B Y 110 A - B 111 SLT 41

3 Zero Extend 2 1 0 1 0 Carnegie Mellon Set Less Than (SLT) Example A B F 2 Configure a 32-bit ALU for the set if less than (SLT) operation. Suppose A = 25 and B = 32. A is less than B, so we expect Y to be the 32-bit representation of 1 (0x00000001). C out + [-1] S 2 F 1:0 Y 42

3 Zero Extend 2 1 0 1 0 Carnegie Mellon Set Less Than (SLT) Example C out A + Y B [-1] S 2 F 2 F 1:0 Configure a 32-bit ALU for the set if less than (SLT) operation. Suppose A = 25 and B = 32. A is less than B, so we expect Y to be the 32-bit representation of 1 (0x00000001). For SLT, F 2:0 = 111. F2 = 1 configures the adder unit as a subtracter. So 25-32 = -7. The two s complement representation of -7 has a 1 in the most significant bit, so S 31 = 1. With F 1:0 = 11, the final multiplexer selects Y = S 31 (zero extended) = 0x00000001 43

What Did We Learn? How can we add, subtract, multiply binary numbers What other circuits depend on adders Subtracter Incrementer Comparator Important part of Multiplier Other functions (shifting) How is an Arithmetic Logic Unit constructed 44