Lecture 6: I/O and Control I/O operations Control unit Microprogramming Zebo Peng, IDA, LiTH 1 Input/Output Devices Input/output devices provide a means for us to make use of a computer system. Computer System Input device Computer Output device Secondary memory There are two major types of I/O devices: Interactive devices, e.g., a multi-touch screen (ipad). Indirect devices, e.g., a laser printer. Secondary memories can also be considered as I/O devices. Ex. a magnetic tape. Zebo Peng, IDA, LiTH 2 1
Characteristics of I/O I/O devices run at much lower speed than the CPU, due to physical limitations and low human speed. Therefore, special technical must be used to control them to avoid that the CPU has to wait for them all the time. Many I/O devices function as an interface between a computer system and other physical systems. Temperature sensor Such interface usually consists of A/D and D/A converters. A/D Computer System Computer D/A Heater switch Secondary memory Zebo Peng, IDA, LiTH 3 Typical I/O Data Rates Zebo Peng, IDA, LiTH 4 2
An I/O Module Responsible for the control of one or several devices, and the exchange of data between the devices and the main memory and/or CPU registers. CPU MM Zebo Peng, IDA, LiTH 5 Functions of an I/O Module Control and timing Data buffering CPU communication Device communication Error detection and correction CPU MM Zebo Peng, IDA, LiTH 6 3
Programmed I/O Control of I/O Devices (1) The operations are controlled by I/O instructions, for example, READ and WRITE. The instructions specify: the particular I/O operation to perform; and the given device by giving its address (its ID number). The CPU will wait for the I/O operation to finish before it executes the next instruction. Since the I/O devices are very slow, the CPU has to wait all the time instead of doing useful work. It is a very simple but not efficient method. can be used in an embedded system. Zebo Peng, IDA, LiTH 7 Programmed I/O Example Execution flow of a WRITE instruction, for example WRITE Hello, O1: Start Select I/O device The CPU does polling, or busy waiting. The I/O device sets appropriate bits in the I/O status register. no Send data to the device interface Check device status Ready? yes Next instruction Zebo Peng, IDA, LiTH 8 4
Control of I/O Devices (2) Interrupt-driven I/O After the CPU sends an initialization signal to an I/O device, it continues with the execution of programs. When the I/O device is ready, or wants to get the attention of the CPU, it sends an interrupt signal to the CPU. When the CPU receives an interrupt signal, it will first finish the execution of the current instruction and then execute the interrupt service routine (ISR). This mechanism is used to free the CPU from having to check periodically (polling) the I/O devices to see it they are in need of any attention. Zebo Peng, IDA, LiTH 9 Interrupt Service Routine (ISR) Save all status information which is needed to resume execution of the current sequence of instructions. Put the saved PC value in a safe place! Deal with the interrupt, for example, by reading data from the input device. Restore the saved status information and then resume execution of the interrupted program. interrupt routine current sequence original sequence resumed interrupt Zebo Peng, IDA, LiTH 10 5
Instruction Cycle w. Interrupts Start Fetch next instruction Fetch cycle Stop Interrupts disabled Execute instruction Interrupts enabled Execute cycle HW: Save the current PC value & set PC as the 1 st address of ISR Check for interrupt Interrupt cycle Zebo Peng, IDA, LiTH 11 Multiple Interrupts A new interrupt may occur while the current interrupt is being processed (execution of the ISR instructions). Disabled interrupt approach: CPU ignores new interrupt signals while processing an interrupt. Priority-based approach: An interrupt of higher priority will interrupt the processing of a lower-priority interrupt. interrupt routine current sequence interrupt original sequence resumed Zebo Peng, IDA, LiTH 12 6
Multiple Interrupts A new interrupt may occur while the current interrupt is being processed (execution of the ISR instructions). Disabled interrupt approach: CPU ignores new interrupt signals while processing an interrupt. Priority-based approach: An interrupt of higher priority will interrupt the processing of a lower-priority interrupt. ISR Higher-priority interrupt ISR Lower-priority interrupt current sequence interrupt original sequence resumed Zebo Peng, IDA, LiTH 13 Control of I/O Devices (3) Direct Memory Access (DMA): Allow the transfer of a whole block of data from an I/O device directly to the memory without going through the CPU. CPU Main Memory I/O device control info stop finish A N DMA A DMA mechanism has essentially the same function as the data transfer capabilities of the CPU. Zebo Peng, IDA, LiTH 14 7
The CPU is executing a program X. A DMA Example X generates a page fault -> Interrupt -> ISR execution. ISR analyzes the interrupt and calls the OS. OS: it is a page fault -> Initiate DMA with parameters (MM address, Disk sector address, Size) -> Start DMA. OS: start execute program Y (by putting the 1 st Inst Add in PC). DMA signals finish -> Interrupt -> ISR execution. ISR analyzes the interrupt and calls the OS. OS: it is a page fill completed for X -> Recover the data for X -> put the saved PC value to PC. X continues execution. Zebo Peng, IDA, LiTH 15 I/O Operation Summary Data exchanges of a computer system with the outside world are provided by the I/O devices. Secondary memories can also be considered as I/O devices. Since computers deal with many different types of users and interface also with many different physical systems, there is a large variety of I/O devices. We need therefore also different techniques to control the I/O devices. The I/O function is usually the most unreliable part of a computer system, and we need techniques for error detection and recovery. Zebo Peng, IDA, LiTH 16 8
Lecture 6: I/O and Control I/O operations Control unit Microprogramming Zebo Peng, IDA, LiTH 17 Control Unit in CPU The main function of the control unit (CU) is to control the execution of instructions. The execution of an instruction is decomposed into smaller steps. Each such step is usually called a micro-operation. Program execution Instruction cycle Instruction cycle Instruction cycle Fetch Decode Execute Interrupt OP OP OP OP OP Zebo Peng, IDA, LiTH 18 9
Control Unit Operation To perform a micro-operation, CU must send a set of control signals to the datapath, i.e., the collection of registers, buses, and functional units that perform data-processing operations: Switch on/off a datapath component. Set a flag signal. Bus/multiplexer selection. IR OP A Clock signal Control Unit Flag signals from the status register Control signals to the datapath Ex. 0 1 1 0 1 1 1 0 1 0 0 0 1 0 0 1 Zebo Peng, IDA, LiTH 19 Control Signal Example Pipeline The penalty due to data hazards can be reduced by a technique called forwarding (bypassing): C 6 C 7 C 8 C 7 C 8 : Op 0 0 : Add 0 1 : Sub 1 0 : Not 11 : And 0 1 MUX ALU 0 1 MUX Bypassing Path Memory System Registers, cache and main memory Zebo Peng, IDA, LiTH 20 10
C 12 Data-Path and Control Signals M BR C 11 C 1 C 10 Main Memory C 5 C 0 +1 C 14 PC M AR C 2 C 3 IR C 6 C 4 C 13 C 7 AR ALU C 9 Selection Signals C 8 C R C W Control Clock Unit PC: Program Counter IR: Instruction Register AR: Accumulator Register MAR: Memory Address Reg. MBR: Memory Buffer Reg.... Status Flags Zebo Peng, IDA, LiTH 21 Micro-Operation Examples Inst. exec. steps Micro-operations Active control signals T1: MAR (PC) C 2 Fetch Instruction T2: MBR Memory Content PC (PC) + 1 C 0, C R, C 5, C 14 T3: IR (MBR) C 4 Load Operand T1: MAR (IR: Address_part) C 8 T2: MBR Memory Content C 0, C R, C 5 T3: AC (MBR) C 10 Zebo Peng, IDA, LiTH 22 11
Hardwired Controller Instruction Register Clock Flags Sequencing Logic Decoder Hardwired Control Add. Reg. Controller +1 Read Control Memory Control Control Unit Unit Control Buf. Reg. Decoder C 0 C 1 C n Zebo Peng, IDA, LiTH 23 Microprogrammed Controller Instruction Register Clock Flags Sequencing Logic Decoder Control Add. Reg. +1 µpc Read Control Memory Control Unit Control Buf. Reg. Decoder C 0 C 1 C n Zebo Peng, IDA, LiTH 24 12
Lecture 6: I/O and Control I/O operations Control unit Microprogramming Zebo Peng, IDA, LiTH 25 Microprogrammed Control Microprogramming is a technique used to implement the control unit. The basic idea is to implement the control unit as a microprogram execution machine (a computer inside a computer). The set of micro-operations occurring at one micro-clock cycle defines a micro-instruction. A sequence of micro-instructions defines a microprogram. The execution of a machine instruction becomes the execution of a sequence of micro-instructions. This is similar to that a Java statement is implemented by a sequence of machine instructions. Zebo Peng, IDA, LiTH 26 13
A Microprogrammed Computer C 12 C R Main Memory C W C 5 C 0 M BR C 11 +1 C 14 PC C 1 M AR C 2 The controller design is becoming the problem of micro-programing! C 3 C 8 C 17 IR +1 C 18 ALU Control Unit Zebo Peng, IDA, LiTH 27 C 6 Decoder PC C 4 C 13 =0 C 19 C 10 C 7 AC Microprogram memory C 0 C 1... C 19 C R C W + - C 9 C 15 C 16 FI DI Load Fetch Instruction (FI): T1: MAR (PC) T2: MBR Memory Content PC (PC) + 1 T3: IR (MBR) Decode Instruction (DI): T1: IR op Controller (Decoder) 0 1 2 3 4 5 6 Microprogram Examples Execution of LOAD Operation: T1: MAR (IR a ) T2: MBR Memory Content T3: AC (MBR) PC 0 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 R W 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 Zebo Peng, IDA, LiTH 28 14
Microcode Storage Microcodes are stored in a µ-memory which is much faster than a cache. Since the micro-memory stores only µ- instructions, a ROM is often used. Microprograms are, therefore, sometimes called firmware. Software that provides control, monitoring and data manipulation. Most firmware can be updated. Changing of firmware may rarely or never be done during its lifetime. Zebo Peng, IDA, LiTH 29 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 1 2 19 R W FI DI Load Store Add Sub... Application of Microprogramming Implementation of the control functions. Operating-system support. High-level language support: Ex. to provide complex instructions to match the HLL statements. Control of special-purpose devices. Emulation of other computers. User tailoring. Zebo Peng, IDA, LiTH 30 15
Summary The control unit plays an important role in the operation of a computer. It can be implemented by a hardwired controller or with the help of microprogramming. The microprogramming technique is used to: simplify the control circuits; increase flexibility (e.g., introducing a new instruction for division); make it efficient to use the same computer for different purposes. Zebo Peng, IDA, LiTH 31 16