Freescale Semiconductor Data Sheet: Technical Data High Temperature Accuracy Integrated Silicon Pressure Sensor for Measuring Absolute Pressure, On-Chip Signal Conditioned, Temperature Compensated and Calibrated The Freescale series sensor integrates on-chip, bipolar op amp circuitry and thin film resistor networks to provide a high output signal and temperature compensation. The small form factor and high reliability of on-chip integration make the Freescale pressure sensor a logical and economical choice for the system designer. The series piezoresistive transducer is a state-of-the-art, monolithic, signal conditioned, silicon pressure sensor. This sensor combines advanced micromachining techniques, thin film metallization, and bipolar semiconductor processing to provide an accurate, high level analog output signal that is proportional to applied pressure. Features Improved Accuracy at High Temperature Available in Super Small Outline Packages 1.5% Maximum Error over 0 to 85 C Ideally suited for Microprocessor or Microcontroller-Based Systems Temperature Compensated from 40 to +125 C Durable Thermoplastic (PPS) Surface Mount Package Pressure Document Number: Rev 5.1, 05/2012 Series 20 to 304 kpa (3.0 to 42 psi) 0.3 to 4.9 V Output Application Examples Industrial Controls Engine Control/Manifold Absolute Pressure (MAP) ORDERING INFORMATION Package Case # of Ports Pressure Type Device Name Device Marking Options No. None Single Dual Gauge Differential Absolute Super Small Outline Package ( Series) 6U Rail 1317 6T1 Tape & Reel 1317 C6U Rail 1317A C6T1 Tape & Reel 1317A SUPER SMALL OUTLINE PACKAGES 6U/6T1 CASE 1317 C6U/6T1 CASE 1317A 2007, 2010, 2012 Freescale Semiconductor, Inc. All rights reserved.
Operating Characteristics Table 1. Operating Characteristics (V S = 5.1 Vdc, T A = 25 C unless otherwise noted, P1 > P2. Characteristic Symbol Min Typ Max Unit Pressure Range P OP 20 304 kpa Supply Voltage (1) V S 4.74 5.1 5.46 Vdc Supply Current I o 6.0 10 madc Minimum Pressure Offset @ V S = 5.1 Volts (2) Full Scale Output @ V S = 5.1 Volts (3) Full Scale Span @ V S = 5.1 Volts (4) Accuracy (5) (0 to 85 C) (0 to 85 C) (0 to 85 C) (0 to 85 C) V off 0.241 0.306 0.371 Vdc V FSO 4.847 4.912 4.977 Vdc V FSS 4.476 4.606 4.736 Vdc ±1.5 %V FSS Sensitivity V/P 16.2 mv/kpa Response Time (6) Warm-Up Time (7) Offset Stability (8) t R 1.0 ms 20 ms ±0.25 %V FSS 1. Device is ratiometric within this specified excitation range. 2. Offset (V off ) is defined as the output voltage at the minimum rated pressure. 3. Full Scale Output (V FSO ) is defined as the output voltage at the maximum or full rated pressure. 4. Full Scale Span (V FSS ) is defined as the algebraic difference between the output voltage at full rated pressure and the output voltage at the minimum rated pressure. 5. Accuracy is the deviation in actual output from nominal output over the entire pressure range and temperature range as a percent of span at 25 C due to all sources of error including the following: Linearity: Temperature Hysteresis: Pressure Hysteresis: TcSpan: TcOffset: Variation from Nominal: Output deviation from a straight line relationship with pressure over the specified pressure range. Output deviation at any temperature within the operating temperature range, after the temperature is cycled to and from the minimum or maximum operating temperature points, with zero differential pressure applied. Output deviation at any pressure within the specified range, when this pressure is cycled to and from the minimum or maximum rated pressure, at 25 C. Output deviation over the temperature range of 0 to 85 C, relative to 25 C. Output deviation with minimum rated pressure applied, over the temperature range of 0 to 85 C, relative to 25 C. The variation from nominal values, for Offset or Full Scale Span, as a percent of V FSS, at 25 C. 6. Response Time is defined as the time for the incremental change in the output to go from 10% to 90% of its final value when subjected to a specified step change in pressure. 7. Warm-up Time is defined as the time required for the product to meet the specified output voltage after the Pressure has been stabilized. 8. Offset Stability is the product's output deviation when subjected to 1000 hours of Pulsed Pressure, Temperature Cycling with Bias Test. 2 Freescale Semiconductor, Inc.
Maximum Ratings Pressure Table 2. Maximum Ratings (1) Rating Symbol Value Units Maximum Pressure (P1 > P2) P max 1200 kpa Storage Temperature T stg -40 to +125 C Operating Temperature T A -40 to +125 C Output Source Current @ Full Scale Output (2) I o + 0.5 madc Output Sink Current @ Minimum Pressure Offset (2) I o - -0.5 madc 1. Exposure beyond the specified limits may cause permanent damage or degradation to the device. 2. Maximum Output Current is controlled by effective impedance from V OUT to Gnd or V OUT to V S in the application circuit. Figure 1 shows a block diagram of the internal circuitry integrated on a pressure sensor chip. V S 2 Sensing Element Thin Film Temperature Compensation and Gain Stage #1 Gain Stage #2 and Ground Reference Shift Circuitry 4 V OUT 3 GND Pins 1, 5, 6, 7, and 8 are NO CONNECTS Figure 1. Fully Integrated Pressure Sensor Schematic Freescale Semiconductor, Inc. 3
On-chip Temperature Compensation and Calibration Figure 2 illustrates the absolute sensing chip in the basic Super Small Outline chip carrier (Case 1317). Figure 3 illustrates a typical application circuit (output source current operation). Figure 4 shows the sensor output signal relative to pressure input. Typical minimum and maximum output curves are shown for operation over 0 to 85 C temperature range. The output will saturate outside of the rated pressure range. A fluorosilicone gel isolates the die surface and wire bonds from the environment, while allowing the pressure signal to be transmitted to the silicon diaphragm. The series pressure sensor operating characteristics, internal reliability and qualification tests are based on use of dry air as the pressure media. Media other than dry air may have adverse effects on sensor performance and long-term reliability. Contact the factory for information regarding media compatibility in your application. Fluoro Silicone Gel Die Coat Wire Bond Lead Frame P1 Die Stainless Steel Cap Thermoplastic Case 100 nf +5.1 V V S Pin 2 V out Pin 4 to ADC GND Pin 3 47 pf 51 K Absolute Element Die Bond Sealed Vacuum Reference Figure 2. Cross Sectional Diagram SSOP (not to scale) Figure 3. Typical Application Circuit (Output Source Current Operation) Output (Volts) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 Transfer Function: V out = V s *(.00318*P-.00353) ± Error V S = 5.1 Vdc Temperature = 0 to 85 C MAX MIN TYP 20 35 50 65 80 95 110 125 140 155 170 185 200 215 230 245 260 275 290 304 Pressure (Reference to Sealed Vacuum) in kpa Figure 4. Output vs. Absolute Pressure 4 Freescale Semiconductor, Inc.
Transfer Function () Nominal Transfer Value: V out = V S x (0.00318 x P - 0.00353) ± (Pressure Error x Temp Factor x 0.00318 x V S ) V S = 5.1 ± 0.36 Vdc Temperature Error Band Series Temperature Error Factor 4.0 3.0 2.0 1.0 Break Points Temp Multiplier -40 3 0 to 85 1 125 3 0.0-40 -20 0 20 40 60 80 100 120 140 Temperature in C NOTE: The Temperature Multiplier is a linear response from 0 C to -40 C and from 85 C to 125 C. Pressure Error Band 4.0 Error Limits for Pressure 3.0 Pressure Error (kpa) 2.0 1.0 0.0-1.0-2.0-3.0-4.0 20 60 100 140 180 220 260 300 Pressure (in kpa) Pressure Error (Max) 20 to 304 (kpa) ±4.0 (kpa) Freescale Semiconductor, Inc. 5
MINIMUM RECOMMENDED FOOTPRINT FOR SUPER SMALL PACKAGES Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor package must be the correct size to ensure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self-align when subjected to a solder reflow process. It is always recommended to fabricate boards with a solder mask layer to avoid bridging and/or shorting between solder pads, especially on tight tolerances and/or tight layouts. 0.050 1.27 TYP 0.387 9.83 0.150 3.81 0.027 TYP 8X 0.69 0.053 TYP 8X 1.35 inch mm Figure 5. SSOP Footprint (Case 1317 and 1317A) 6 Freescale Semiconductor, Inc.
PACKAGE DIMENSIONS Pressure PAGE 1 OF 3 CASE 1317-04 ISSUE H SUPER SMALL OUTLINE PACKAGE Freescale Semiconductor, Inc. 7
PACKAGE DIMENSIONS PAGE 2 OF 3 CASE 1317-04 ISSUE H SUPER SMALL OUTLINE PACKAGE 8 Freescale Semiconductor, Inc.
PACKAGE DIMENSIONS Pressure CASE 1317-04 ISSUE H SUPER SMALL OUTLINE PACKAGE PAGE 3 OF 3 Freescale Semiconductor, Inc. 9
PACKAGE DIMENSIONS CASE 1317A-04 ISSUE D SUPER SMALL OUTLINE PACKAGE 10 Freescale Semiconductor, Inc.
PACKAGE DIMENSIONS Pressure CASE 1317A-04 ISSUE D SUPER SMALL OUTLINE PACKAGE Freescale Semiconductor, Inc. 11
Table 3. Revision History Revision number Revision date Description of changes 5.1 05/2012 Updated Package Drawing 98ARH99066A was Rev. F, updated to Rev. H. 12 Freescale Semiconductor, Inc.
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