Technology, Manufacturing and Markets of Magnetoresistive Random Access Memory (MRAM) Brad Engel, VP- Product Development & Quality

Technology, Manufacturing and Markets of Magnetoresistive Random Access Memory (MRAM) Brad Engel, VP- Product Development & Quality

Everspin Electron Spin is Forever Industry-first and leading MRAM supplier Technology leader in Toggle MRAM and ST-MRAM Shipped over 2.5M units with over 300 active customers to date Over 15 years of design and production experience with MRAM Embedded Technology Standalone Products Break through non-volatile memory products and IP 70 Products in 3 Memory Families 600 Active Patents and Applications WW Asynchronous x8, x16 and Serial SPI 176 Issued / 47 Pending US Patents Backed by leading VC Investors (Spin-out from Freescale in June, 2008) Global Footprint Headquarters: Chandler, AZ, USA Sales Offices: USA, Europe, China, Japan Manufacturing: USA, Singapore, Thailand, China Design Center: Austin, TX, USA

What is MRAM Technology? MTJ Transistor Cross-sectional view Simple 1 transistor + 1 MTJ memory cell Magnetic polarization stores data Resistance levels represent bit values compared to electron charge levels Highly reliable non-volatile memory Unlimited cycling endurance Low latency enabling instant on/off magnetic layer 1 free layer tunnel barrier magnetic layer 2 fixed layer Circuit low resistance high resistance

MRAM - Technology Comparison Toggle Write Spin-Torque Write Write accomplished by magnetic fields from current passing through bit and word lines. In volume production Write accomplished by spin polarized current passing through the MTJ. In development

Everspin MRAM Advantages Parameter Non-volatile capability Performance Endurance CMOS integration Temperature range High Temp Storage Soft error immunity Environmentally friendly Capability Data retention of the bit cell > 20 years Symmetric read/write 35ns / 40MHz Serial Unlimited cycling endurance Easily integrates into back-end process Compatible with embedded designs No effect on CMOS Allows for flexible manufacturing -40ºC < T < 150ºC operation demonstrated Intrinsic reliability > 20 years lifetime at 125ºC Alpha radiation soft error rate too low to measure (<0.1 FIT per Mb) Everspin partners offer radiation hardened MRAM No battery/caps, RoHS/REACH compliant, instant-on

How is MRAM made? Leverage CMOS semiconductor ecosystem Everspin MRAM layer added to standard CMOS Standard packages with protective internal shield Common standard package types Drop in replacement fits footprints for existing printed circuit board designs Pin for Pin functionally equivalent BBSRAM, SPI NVM, nvsram and FeRAM Shield Die

Memory Performance

ST-MRAM Memory Performance

Current Toggle MRAM Products 16-bit I/O Part Number Density Configuration Temp MR4A16B 16Mb 1M x 16 C,I,A MR2A16A 4Mb 256K x 16 C,I,E,A MR0A16A 1Mb 64K x 16 C,I,E,A 8-bit I/O Part Number Density Configuration Temp MR4A08B 16Mb 2M x 8 C,I,A MR2A08A 4Mb 512K x 8 C,I MR0A08B 1Mb 128K x 8 C,I MR256A08B 256Kb 32K x 8 C,I MR0D08B 1Mb 128K x 8, 1.8v I/O C MR256D08 256Kb 32K x 8, 1.8v I/O C SPI I/O Part Number Density Configuration Temp MR25H40 4Mb 512K x 8 I, A MR25H10 1Mb 128K x 8 I, A MR25H256 256Kb 32K x 8 I, A 48-BGA x8 Asynchronous parallel I/O x16 Asynchronous parallel I/O x8 Asynchronous parallel 1.8V I/O 44-TSOPII, 54-TSOP x8 Asynchronous parallel I/O x16 Asynchronous parallel I/O 8-DFN SPI-compatible serial I/O 40 MHz; No write delay 32-SOIC x8 Asynchronous parallel I/O Temperatures Commercial 0 to +70 ºC Industrial -40 to +85 ºC Extended -40 to +105 ºC Automotive -40 to +125 ºC

MRAM Markets & Applications Storage Systems & Servers Industrial Automation & Robotics Automotive & Transportation Energy Management Telecom & Datacom Consumer, POS, Gaming Logos, trademarks, images and copyright references are the property of the respective companies noted.

Toggle MRAM Used by Top Companies Automation Technology Siemens Recognizes Everspin Technologies for Perfect MRAM Quality - May, 2009 After two years of high volume production and more than 100K systems in the field, we are very happy with the perfect quality and reliability of Everspin s products in our industrial automation systems http://www.semiconductor.net/article/ca6658902.html Everspin's automotive-temperature MRAM meets harsh environment demands in BMW S1000 RR racing bike Everspin introduces AEC-Q100 MRAM products to serve broad automotive applications; 4Mb MRAM stores critical calibration data for BMW Motorsport Super Bike Everspin Technologies MRAM Selected by Emerson Network Power to Deliver Critical Storage for Industrial Computing Boards Non-volatile MRAM technology provides a robust, reliable memory solution for VME and Compact PCI boards. Everspin Technologies to provide Airbus with MRAM products for advance wide body aircraft Flight Control Computer on A350 XQB aircraft uses MRAM for critical program and data storage in extreme environment applications. Logos, trademarks, images and copyright references are the property of the respective companies noted. 11

MRAM Writes and Reads Write Current Flows Down Write Line 1 & 2 Magnetic Tunnel Junction (MTJ) At Cross-Point Is Polarized Polarization State Is Read By Selecting Pass Transistor to Sense Resistance of Specific MTJ 12

MRAM Integration Metal 5 Metal 4 Via 3 Cu Cu MRAM module Metal 5 Metal 3 Via 2 Metal 2 Via 1 Al Al Metal 4 MTJ MTJ Metal 4 Metal 1 Al Contact Bit cell 13

MTJ Bit Materials Free Synthetic Antiferromagnet (SAF) Tunnel barrier Pinned Synthetic Antiferromagnet (SAF) Top electrode Free M2 Ru Free M1 AlOx Fixed Ru Pinned AF pinning layer Seed Base electrode Ta Eg, NiFe, CoFe, CoFeB Eg, NiFe, CoFe, CoFeB Eg, PtMn, IrMn Ta/TaN 14

MTJ Vertical Profile Ultra-thin layers require precision control for manufacturing 15

Toggle MRAM: Write Mechanism Toggle MRAM is a unique approach that provides both robust switching performance and manufacturability Response of synthetic antiferromagnetic free layer is the key. Conventional MRAM Single Layer H=0 H 0 Toggle MRAM Synthetic Antiferromagnet H=0 H 0 pinned pinned pinned pinned Aligns with applied field Rotates perpendicular to applied field 16

Toggle Write Operation Low-R State H 1 H 1 + H 2 H 2 High-R State pinned I 2 I 2 pinned I 1 I 1 MTJ I 1 I 2 Advantages: Eliminates disturb - Large operating window 17

Robust bit disturb margin All bits along ½-selected current lines have increased energy barrier during programming Robust Toggle-Bit Selection

Current I 1 No switching Toggle Switching Characteristics Switching Region No switching Current I 2 19

Toggle-bit Array Characteristics H 2 4Mb, March6N Toggle Map No disturb No disturb toggling toggling IV III I II toggling No disturb No disturb i bit Operating region 0% switching region (no disturbs) 0 0 7 14 21 28 35 42 49 56 63 70 77 84 91 98 105 112 119 126 133 140 181 172 163 154 145 136 127 118 109 100 91 82 73 63 54 45 36 27 18 9 99%-10 98%-99 97%-98 96%-97 95%-96 94%-95 93%-94 92%-93 91%-92 90%-91 89%-90 88%-89 87%-88 86%-87 85%-86 i digit 20

(Oe) Digit Line Current Write Operating Region at 125 C Large write window at Automotive temperatures 300 250 H sat 200 150 100 Operating Region T = 125 ºC 50 0 H sw 0 50 100 150 Temp ( C) Non-Switching Region Bit Line Current H sat, H sw decrease linearly w/temp, reducing window 21

Capacitance at node Integrates Current Difference Vcgref I Ref m16 n3 Read Sense Amplifier V DD m17 m18 I Ref I Ref n4 m13 m14 m15 n0 n1 n5 I BIT R B it R H igh R Low Word Line m1 m2 m3 I Ref = (I High + I Low )/2 Local references created from two MTJ: one high and one low resistance state

Magnetoresistance and Distributions MR = DR/R low, DR=R high R low Array: R cell Histogram Signal = R cell R ref ½ of DR available for sensing Circuit works at finite bias MR is reduced by bias dependence of MR Must sense all bits in the array Circuit must work with bits in tails of the R distribution Resistance distribution reduces useable MR. For six-sigma yield in the array, need: DR/2 > 6s 23

#bits Read Distribution within an Array 2500 2000 1500 DR/s = 30 typical Low State High State Critical Factors: 1. Tunnel barrier quality 2. Pattern fidelity Optimized for MRAM 1000 s~0.8% 500 0 14 15 16 17 18 19 Bit Resistance [k ] 10 nm V 1/2 ~+0.7/-0.55 V 24

MTJ Deposition on 200mm Wafers Measured uniformity 200 mm MR=45%, s=2% 43.9 44.5 44.6 44.8 44.5 43.1 44.4 45.0 45.2 46.0 45.8 46.0 44.6 43.1 44.1 45.4 42.9 45.6 45.6 45.8 44.5 44.5 46.1 44.3 45.1 45.5 45.8 46.0 45.0 44.5 45.8 43.4 45.4 45.9 45.7 45.9 44.7 44.2 45.3 45.7 45.5 43.9 45.8 45.4 44.0 44.1 45.3 45.9 45.6 45.0 44.7 43.4 44.0 44.8 44.1 RA=10.4 k -mm 2, s=6% 11.3 11.0 10.5 10.5 10.9 12.3 11.7 10.3 9.74 9.88 9.65 9.80 10.2 11.5 10.3 9.54 10.9 10.6 10.3 9.74 10.5 10.1 9.68 10.4 10.8 10.8 10.7 9.85 10.7 9.80 10.9 10.5 10.8 10.5 9.86 10.2 10.3 9.45 10.1 10.4 10.6 9.87 9.62 10.9 10.2 9.52 9.43 9.56 9.59 10.2 11.2 10.2 10.4 11.0 Manufacturable wafer level uniformity and wafer-to-wafer repeatability optimization of deposition tool, process, and material stack 25

Lifetime (h) Toggle MRAM High Reliability Predicted lifetime from accelerated testing Robust reliability at Automotive temperatures 1.E+12 1.E+11 1.E+10 1.E+09 Magnetic Layers Write Line EM MTJ R Drift MTJ TDDB 10 20 year life 1.E+08 1.E+07 1.E+06 1.E+05 1.E+04 55 65 75 85 95 105 115 125 Average Junction Temperature (C) 26

Summary MRAM is a highly reliable, high-performance, nonvolatile memory IC, with unlimited endurance Has the unique characteristics of a working memory while providing non-volatility Current MRAM products are used in a wide variety of applications Data Storage, Industrial Control, Medical Systems, Transportation, Metering and Gaming Everspin Continues MRAM leadership: Expanding MRAM into new markets and applications On track to deliver the industry s first ST-MRAM 27