CSE 237A. Prof. Tajana Simunic Rosing HW #1. Due: January 20th, 2011

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CSE 237A Prof. Tajana Simunic Rosing HW #1 Due: January 20th, 2011 All problems should be completed individually except for problem 8, which may be completed with one other student. The student you complete problem 8 with does not have to be the student you complete the rest of the project with. Clearly state at the beginning of your assignment the name of the student you worked with on problem 8. Upload your solutions in PDF format onto WebCT. One team member from each team must also upload the compiled binary file for problem 8. Individual problems: Problem 1. Here is a specification for a brand new OfficePhone2000: A. Draw the StateChart representation of this design. B. If you were to draw this as an FSM, how many states would you need?

Problem 2 What does the following SDL diagram do? (<true> signals can be ignored) Draw the FSM representing it. Hint: When two states have the same label, a transition may lead to either state.

Problem 3 Consider the Petri net defined by: P = { p1, p2, p3, p4, p5 } T = { t1, t2, t3 } A = { (p1 t1) (p2 t2) (p2 t3) (p3 t3) (t1 p3) (t2 p4) (t3 p5) } A. Draw the Petri net graph B. Let M0 = [1 1 0 0 0]. Draw all possible transitions for this Petri net. Is it possible that t3 never fires? Problem 4 An SDF is shown below, with edge labels in dark grey: 6 2 A 2 4 3 1 3 6 B 1 3 C A. What is the incidence matrix of the above graph? B. System constraints specify that Task C has to execute before Task B which has to execute before Task A. Is there a PASS schedule? If not, change the SDF so that there is a PASS. Derive the PASS schedule. C. Derive the initial conditions for the schedule defined above in Part C. D. Derive the buffer sizes for the schedule defined above in Part C.

Problem 5 Draw a minimum size FSM representing the following StateChart:

Problem 6 Draw the FSM that accurately represents functionality of the following Esterel code: Problem 7 Module test; Input a,b,r; Output o; await a; await b; Loop [ await a await b ]; Emit o Each r End module What does the following VHDL code do? Show each step of your evaluation. entity mycomp is port ( end mycomp; i1,i2,i3,i4,i5: in_out BIT; clk: in std_logic; ) architecture arch1 of mycomp is begin process(clk) begin if (clk'event) and (clk='1') then i5 <= i4; i4 <= i3; i3 <= i2; i2 <= i1 xor i5; i1 <= i5; end if; end process; end arch1;

Team problem: Problem 8 With one other student, go through the set up procedure described in setup_guide.pdf (found on the course website) to set up your Linux environment, install the required tools, and to cross compile a program ('test.c') to run on an ARM processor. Following the guide, you will: Install/update the following packages: git-core gnupg flex bison gperf libsdldev libesd0-dev libwxgtk2.6-dev squashfs-tools build-essential zip curl libncurses5-dev zlib1g-dev sun-java6-jdk pngcrush Install the Android Debug Bridge Download the source code required for the project By the completing the above steps, you will be prepared to start work on the project. After you have finished following the steps in the guide, a collection of cross-compilers will be installed at ~/android/system/prebuilt/linux-x86/toolchain/arm-eabi-4.4.0/bin/. In that directory you will find arm-eabi-gcc, which is a gcc compiler that generates binaries for ARM processors. Before you will be able to compile your test file, do the following: cd ~/android/htc-kernel-msm7227/ make menuconfig o It will load a menu. Simply exit out of the menu without making changes. make modules Download 'test.c' and 'Makefile' from WebCT and place them in a directory on your machine. Simply enter in the directory where those two files are located: make and the Android build environment will be used to cross compile your file for ARM and output as 'test.o'. To test if the file was compiled correctly, you can run file test.o The output should look something like (we are primarily interested that it says ARM): ELF 32-bit LSB relocatable, ARM, version 1 (SYSV), not stripped Clearly state the name of the student you worked with at the beginning of your HW1 solutions. One team member must upload the compiled binary along with their HW1 solution on WebCT.