An Efficient Approach to Energy Saving in Microcontrollers

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1 An Efficient Approach to Energy Saving in Microcontrollers Wenhong Zhao 1 and Feng Xia 2 1 Precision Engineering Laboratory, Zhejiang University of Technology, Hangzhou , China wenhongzhao@gmail.com 2 National Laboratory of Industrial Control Technology, Zhejiang University, Hangzhou , China xia@iipc.zju.edu.cn Abstract. Although energy saving has increasing importance for energy-limited microcontrollers, low power and high control performance are at odds with each other. This paper presents a simple yet efficient dynamic voltage scaling (DVS) scheme that targets reducing CPU energy consumption while meeting control requirements. With focus on two typical kinds of sources of workload variability, it explores a combination of time-triggered and event-triggered mechanisms. Simulations are carried out to highlight the merits of the proposed approach. It is argued that in comparion with traditional DVS scheme, it saves considerably more energy while providing comparable control performance. Keywords: Energy saving, dynamic voltage scaling, microcontroller, control performance, workload variability. 1 Introduction In recent years, there has been a growing use of embedded computing platforms in real-time control applications, e.g., mobile robots and automotive electronic systems, etc. An evident trend in today s embedded applications is that an increasing number of devices are battery-powered. Battery life thereby becomes a critical factor that determines the usability of the system, and must be taken into account during system design. However, the goals of achieving high performance and prolonging battery life are at odds with each other in a way that improving performance often demands higher energy consumption [1]. In the context of embedded control, the limited computing capacity further causes the problem of energy management to be much more vital for microcontrollers running on batteries. They must have low energy consumption in order to prolong battery life while providing required control performance [2-4]. One promising method to achieve tradeoffs between low power and high performance in CMOS-based embedded systems is dynamic voltage scaling (DVS) [1, 5]. The majority of existing microprocessors such as Intel s Xscale and StrongARM, AMD s K6-2+, and Transmeta s Crusoe, etc. have all supported this technique. DVS exploits the hardware characteristics of these processors to reduce C. Jesshope and C. Egan (Eds.): ACSAC 2006, LNCS 4186, pp , Springer-Verlag Berlin Heidelberg 2006

2 596 W. Zhao and F. Xia energy consumption through dynamically changing the supply voltage and operating frequency at the same time. It has been demonstrated to be highly effective in saving energy for different types of applications, both real-time and non real-time. In traditional microcontrollers, concurrent control tasks are usually scheduled according to their worst-case execution times (WCET). Because the actual execution time of a task is less then its WCET in most cases, budgeting for the WCET may result in excessive energy consumption even if the DVS technique is adopted [6]. Moreover, the workload of a multitasking microcontroller may vary significantly during run time. Typical reasons include, e.g., changes in either task execution times or the number of tasks. This fluctuating feature of workload makes it not so easy to develop an efficient DVS scheme for microcontrollers. In the literature, only a few researchers have applied DVS to real-time control tasks. Lee and Kim [7] consider tradeoffs between control performance and energy consumption for the first time, and propose both static and dynamic solutions. Xia et al. [2] suggest the DVS-FS scheme by integrating DVS with feedback control realtime scheduling. Wang et al. [8] propose a static energy-aware optimization solution using evolution strategy for codesign of control and real-time scheduling. Jin et al. [9] has dealt with the problem of energy-aware scheduling design of control tasks. Xia and Sun [3] present the methodology of EDVS based on direct feedback scheduling. Following this methodology, we develop a cost-effective DVS approach that uses an asynchronous period adjustment mechanism in our previous work [4]. In this paper, we attack the problem of saving energy in multitasking microcontroller where the workload changes significantly over time. A DVS scheme that essentially operates in an interval-based fashion is presented. In order to properly scale the voltage of the processor, the near-future workload is predicted using a simple yet effective algorithm. Besides the time-triggered feature of our approach, we also introduce an event-triggered mechanism to cope with the workload variability due to adding or removing control loops/tasks, which may be needed during system reconfiguration. Simulation experiments are carried out to evaluate the performance of the proposed approach. The structure of this paper is as follows. In Section 2, we describe the problem considered. Our approach is presented in Section 3. Its performance is evaluated in Section 4 by simulation experiments. Section 5 concludes this paper. 2 Problem Description Consider a DVS-enabled microcontroller where N independent controller tasks {τ i } run concurrently. Each controller task is responsible for controlling a plant. It is natural for controller tasks that they are periodic, with the deadline equal to the period. Each control task τ i is characterized by the following parameters: c i : the execution time. For various reasons, e.g., the size of sampled data to be processed by the control algorithm changes with the state of the plant, this parameter may vary during run time and is not known until the completion of task execution. w i : the worst-case execution time assumed to be known.

3 An Efficient Approach to Energy Saving in Microcontrollers 597 h i : the period that corresponds to the sampling period of the relevant control loop. Once designed offline, the periods of all tasks will remain fixed. For sake of simple description, we define c i and w i for the case where the processor operates at its full speed. Note that when the voltage is adjusted, the actual execution time and worst-case execution time of each task will change accordingly. 2.1 Tradeoff Between Energy and Delay For processors built on CMOS circuits, the dominant source of energy consumption is the dynamic power dissipation. It has been found that the amount of energy consumption, E i, for task τ i typically increases quadratically with the supply voltage [10,11]. Therefore we have (1) E E ( C R V ) V 2 2 total i i i dd dd where C i is a constant indicating the average switched capacitance per clock cycle, R i is the total number of cycles required for the execution of the task, and V dd is the supply voltage. Employing an interval-based DVS approach, we will assign the same voltage level for all tasks within every time interval. According to (1), reducing voltage saves energy. However, the voltage reduction increases circuit delay, D, and their relationship approximates that D V V V 2 dd /( dd t ) (2) where V t is the threshold voltage. For control loops, a natural result of increase in circuit delay is longer control delay, which degrades control performance from the control perspective. This will be much more serious if the task schedulability is violated due to prolonged task execution times. Obviously, there is a fundamental tradeoff between saving energy and improving control performance when dynamically scaling the voltage of the microcontroller. 2.2 Workload Variability With DVS, the degree to which the energy consumption could be reduced is highly dependent on the system workload [11]. As a consequence, workload variability affects the effectiveness of DVS, especially when the timeliness and schedulability of all tasks must be guaranteed in order to achieve required control performance. In this paper, we consider two typical kinds of sources of workload variations: 1) Varying task execution times. The execution time (parameter c i ) of each task may change over time, regardless of the voltage scaling. 2) Dynamic task activation and termination. New tasks/loops may be added, and existing tasks/loops may be removed at runtime. In the next section, we will present an efficient DVS scheme to manage workload variability, with the primary goal of saving energy while maintaining satisfactory control performance.

4 598 W. Zhao and F. Xia 3 The Proposed Approach Assume that all CPU voltages are normalized with respect to the maximum value, and the normalized voltage, α, can be changed continuously in the range of [α min, 1], where α min is the minimum (normalized) voltage. When the voltage is set to α, the actual (worst-case) execution time of τ i will be c i /α (w i /α). The switching overheads between voltage levels are neglected. Control tasks are scheduled according to the EDF algorithm. Throughout this paper, we define workload as the product of CPU utilization and normalized voltage. The architecture of our approach is given in Fig. 1. Basically, the proposed DVS scheme operates in a time-triggered fashion. That is, it performs the workload prediction and voltage scaling operations at regular intervals during run time. We choose such a system-level method rather than a task-level approach mainly because of its simplicity and effectiveness. A second reason is that task-level solutions often require modification of the application program as well as support from the compiler, which cannot always be guaranteed in the context of embedded control. Task Activation or Termination event timer Workload Prediction Voltage Scaling CPU DVS Monitor 3.1 Workload Prediction Fig. 1. Architecture of our approach Let s consider first the workload variability caused by varying execution times only. During every invocation interval, the proposed DVS approach monitors current CPU utilization, u k, which is the ratio of busy CPU time to the interval, T. Then the workload of current interval is calculated as k = u k α k. To predict the near-future workload, several algorithms have been presented in the realm of DVS [5]. We here use a simple algorithm that has been successfully applied to job execution-time estimation for real-time control tasks [12]. The predicted workload will be: ˆ = ˆ (1 ) k+ 1 λ + k λ k (3) where λ is a forgetting factor. Based on the predicted workload, the DVS module will adjust the voltage such that the CPU cycles will be fully utilized in the next interval. Similar to our previous work

5 An Efficient Approach to Energy Saving in Microcontrollers 599 [4], we here set the voltage level that maximizes the CPU utilization while meeting the task schedulability constraint, i.e., uˆ ˆ k+ 1 = k+ 1/ α k Therefore we have α αmin ˆ < αmin = ˆ α ˆ 1 1 ˆ > 1 k+ 1 k+ 1 min k+ 1 (4) 3.2 Event-Triggered Mechanism To cope with abrupt and large workload variations induced by dynamic task activation and termination, we integrate an even-triggered mechanism into the originally time-triggered DVS architecture. Each time a new control task/loop is added or an existing task/loop is removed, the DVS scheme will be triggered immediately, causing the CPU voltage to be re-assigned as follows. In case a new control loop j is added during the time interval [ Tk, T ), we will first update the value of ˆ by ˆ = ˆ + w / h. (5) k+ 1 k+ 1 j j If several tasks are added at the same time, the above operation will be performed iteratively for every task. And then a new voltage will be determined using (4). In case of task termination, the event-triggered mechanism operates similarly. The only difference relies on the algorithm used to update ˆ. When τ j is removed, it becomes ˆ = ˆ c / h (6) k+ 1 k+ 1 j j where c j is the recorded execution time of the latest job of task j. Note that each time a new value of ˆ is calculated, it will be memorized temporarily for further use and the old one could be discarded. 4 Evaluation We next conduct simulation experiments to evaluate the performance of our approach. Consider the case where four simple control loops share one variablevoltage microcontroller. The controlled plants have the same transfer function G(s)=1000/(s 2 +s), and each control task executes a well-designed PID control algorithm. The timing parameters (w i, h i ) of each task are (3, 10), (2, 9), (2, 10), (2, 9) respectively, in time unit of ms. The parameter c i of each task vary uniformly in the range [ β wi, wi], 0 < β 1. This distribution function of task execution times has been used in [13]. Other parameters are set as follows: α min =0.36, λ=0.6, T=50ms. Simulations run in the following pattern. At the start, task τ 1 and τ 2 are switched on. Task τ 3 and τ 4 remain off until t = 1s. At time t = 2s, task τ 4 is removed. The whole

6 600 W. Zhao and F. Xia simulation lasts 3s. Each plant experiences an input step change every 1s when active. Three methods are examined: 1) NON: the CPU always operates at full speed, 2) TRA: traditional DVS based on WCET, 3) OUR: the approach presented in Section 3. Each value reported below takes the average of 10 runs. Fig. 2. Energy consumption ratio Fig. 3. Control cost ratio Energy Consumption Ratio (ECR). We define ECR as the ratio of energy consumption of TRA or OUR to that of NON. Accordingly, K ECR = α K, where K is the total number of invocation. Fig. 2 shows the ECR of TRA and OUR as a function of β. It is clear that DVS is effective in energy saving, and our approach is able to save up to 40% more energy compared with traditional DVS scheme. OUR and TRA become nearly identical when β=1. Control Cost Ratio (CCR). In simulations we record the IAE (integral Absolute Error) of each loop to assess the control performance. The CCR is defined as the ratio of the sum of all loops IAE of TRA or OUR to that of NON. Note that the larger the control cost the worse the control performance. The simulation results are shown in Fig. 3. As we can see, the examined three schemes deliver comparable control performance, because all CCR values are quite close to one. k = 1 2 k 5 Conclusions This paper deals with the problem of reducing energy consumption in multitasking microcontrollers. An efficient DVS scheme that features the combination of timetriggered and event-triggered mechanisms is presented. It is devoted to managing the workload variability of real-time control tasks. Simulation results show that compared with traditional DVS method, our approach is more effective in reducing energy consumption while guaranteeing comparable control performance. Acknowledgments. This work is partially supported by Zhejiang Provincial Natural Science Foundation of China under Grant No. M

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