UML-Based Analysis of Power Consumption for Real-Time Embedded Systems

Transcription

1 2011 International Joint Conference of IEEE TrustCom-11/IEEE ICESS-11/FCST-11 UML-Based Analysis of Power Consumption for Real-Time Embedded Systems Matthias Hagner, Adina Aniculaesei, and Ursula Goltz Institute for Programming and Reactive Systems, TU Braunschweig Braunschweig, Germany (hagner, Abstract The complexity of embedded systems has risen significantly in the last years. The model based development approach helped to keep an overview over the development and over the fulfillment of non-functional properties, as it is possible to capture and analyze the scheduling using UML development models. Other aspects, e.g. the power consumption, are not considered in development models, modelling languages, and analysis support based on development models. The common approach is to measure the consumption at the end of the development, but there is no tool support for earlier phases analysis. We present a UML profile for power/energy consumption and a simple algorithm to analyze the power consumption based on an UML model extended with our profile. As more power awareness could result in losing real-time constraints, we consider both aspects, real-time scheduling and power awareness, and present a method to bring both non-functional properties and their analyses in context. Additionally, we present an approach to find a task configuration for a dynamic voltage scaling system that satisfies all real-time requirements, but is most power efficient. Keywords-power aware; real-time; model based; UML; Dynamic Voltage Scaling; scheduling I. Introduction To handle the complexity and fulfill the sometimes safety critical requirements, the model based development approach has been widely appreciated. The UML [1] has been established as one of the most popular modeling languages. Using extensions, e.g. SysML [2] or the UML profile MARTE (Modeling and Analysis of Real-Time and Embedded Systems) [3], the UML can be adapted to the needs of embedded systems. Especially MARTE contains a large number of possibilities to add timing and scheduling aspects to a UML model. Special views on certain non-functional aspects, as parts of the UML development models, help to keep track of the requirements and to concentrate on these aspects. For scheduling analysis, the UML Scheduling Analysis View (SAV) ([4], [5]) was created. The SAV is based on MARTE profile elements and adds guidelines how certain scheduling aspects have to be described. Additionally, the SAV can be used as an input for scheduling analysis tools. In [6] an implementation is presented, where the developer does not need to see the scheduling analysis tool SymTA/S [7] to perform an analysis based on the SAV. There is no according modeling or tool support for energy or power consumption. MARTE has a dedicated package called HWPower, which enables the modeling of advanced power analysis and autonomy optimization but is not sufficient to add all necessary parameters to the UML development model. [8] gave an extension for modelling a system-wide dynamic power management in embedded systems using state machines to define the component power characteristics. [9] extended MARTE to model energy harvesting for wireless sensor networks. A SysML extension of UML for systems modeling and engineering is presented in [10]. Still, these extensions are not sufficient for our approach as they deal with different aspect (e.g. wireless communication). Power is one of the important metrics for optimization in the design and operation of embedded systems. One way to reduce power consumption in embedded computing systems is processor slowdown using frequency or voltage. Scaling the frequency and voltage of a processor leads to an increase in the execution time of a task. In real-time systems, we want to minimize energy while adhering to the deadlines of the tasks. Dynamic voltage scaling (DVS) techniques exploit the idle time of the processor to reduce the energy consumption of a system. Depending on the granularity of the voltage scaling, there are intra-task DVS ([11], [12]) and inter-task DVS [13]. The intra-task DVS algorithms adjust the voltage within an individual task boundary, whereas the intertask DVS algorithms determine the supply voltage on a task-by-task basis, at each scheduling point. Additionally, there are online and offline DVS scheduling algorithms. Offline DVS scheduling algorithms, know beforehand the task parameters, such as arrival time, deadline, worst case execution time ([14], [15]). Online DVS scheduling algorithms do not have this information during execution, but receive it on a task-by-task basis, once the task arrived in the system and is ready to run ([16]). In this paper, we consider offline inter-task DVS. We defined the Power Consumption Analysis View /11 $ IEEE DOI /TrustCom

2 (PCAV), according to the Scheduling Analysis View, to give the developer the possibility to add energy and power consumption relevant parameters to the UML model (Section III). Therefore, we created the PCAV profile as an extension of the MARTE profile and an automatic analysis algorithm for a system described with the PCAV profile (Section IV). Additionally, we implemented an algorithm to find a most power aware, but still real-time schedulable system configuration for a DVS system (Section V). II. Concept One problem concerning real-time and power aware systems is that both aspects are orthogonal. A solution to solve a real-time problem is to use faster hardware. The drawback of this approach is that more energy is necessary. The same happens with DVS systems. Using a higher frequency results in higher power consumption. To lower the power consumption of a system is possible by using more energy saving hardware. Most times, this hardware operates slower and consequently it is possible, that real-time requirements are not met. The aim must be to find a good compromise between realtime and power consumption. In other words, a system that satisfies all real-time requirements, but is most power efficient. Additionally, these aspects are also very important at an early development stage. A wrong design decision at an early stage could result in high costs. Since at this point no implementation is available, it is difficult to find the necessary parameters for a proper analysis. In later phases, measurement etc. are possible. There are some approaches using budgets or estimated values. Therefore, with our approach, it is possible to do these analyses based on UML development models using estimated values (e.g. for the worst case execution cycles). We created a Power Consumption Analysis View (PCAV) based on the MARTE profile and oriented on the Scheduling Analysis View (SAV). The PCAV is used as a UML description of the analysis context, as a basis for a power consumption analysis, and consequently as a bridge between a UML design model and an embedded analysis for power consumption. It is a first approach for integration of power consumption analysis in an UML based development process. For a successful application, both views (the PCAV and the SAV) have to be used in parallel. The PCAV is needed to find execution times of tasks based on the required execution cycles of the task and the CPU speed. This has to be done for all tasks. After transferring the execution times to the SAV, a scheduling analysis can be done. If the analysis result is positive (all deadlines are met), the developer can step back to the PCAV, choose a slower, but more energy-saving CPU, calculate the execution times again and find out if it is still schedulable using the SAV. We assume, that a task is always running in the same configuration. But it is possible that different tasks can run in different configurations. One configuration is set for all tasks before execution. We do not consider the changing of the power configuration during runtime (offline inter-dvs). III. Power Consumption Analysis View Profile The UML Power Consumption Analysis View (PCAV) profile is aimed at modeling real-time and embedded systems on which a fixed set of tasks is executed. The goal of the PCAV profile is to provide the necessary modeling elements to analyse the power consumption of a system. PCAV is based on the Scheduling Analysis View (SAV), defined in [5]. The SAV is based on MARTE UML profile. However, MARTE does not provide the necessary elements to model real-time embedded systems which are subject to a power analysis process. The new profile is based on MARTE Fondations package which defines the elements needed for computing the energy consumption for one complete execution of a real-time task, as well as the power consumption of the entire system. These elements are organized in four subprofiles, which define UML stereotypes corresponding to each component considered in a real-time system model: PCAVResources: elements for modeling processing resources and their hardware configurations. PCAVWorkload: the parameters of a real-time task, executed in an embedded real-time system. PCAVConsumers: peripheral devices, such as displays or flash drives. PCAVPower: the power supply subsystem of the real-time embedded system under consideration. The PCAVResources Profile models execution hosts and their corresponding power configurations. The profile defines the «pcaexechost» stereotype for the representation of system processors, and the corresponding hardware parameters: switchcap is the average switching capacitance of the execution host per clock cycle. powerconsumption specifies the power consumed by the processor while executing a given set of tasks. configuration represents a list of power configurations specific for each hardware platform. A power configuration is a pair containing a supply voltage and the corresponding operating frequency. leakagepowerconsumption the minimum processor power consumption independently if tasks are running on it or not. Every real-time DVS processor supports a set of power configurations, which allow the CPU to modify dynamically its supply voltage and consequently its operating 1197

3 frequency. This can be done either in a continuous manner or using discrete values. In the first situation, there is an interval defined [V dd,min,v dd,max ], in which the supply voltage may constantly vary. Other processors however, such as the one used in this paper, support discrete levels of supply voltage and, thus, of operating frequencies. The stereotype «pcaexechostconfig» models CPU power configurations, in which to each discrete supply voltage corresponds a unique clock speed. This CPU frequency is the maximum operating frequency in that supply voltage. The parameters voltage and frequency are specified in the «pcafreqvoltagefunction» to illustrate the one-to-one relation between the two attributes. Every power configuration contains a frequency-voltage pair through the stereotype property freqvoltagetuple and a corresponding energy consumption per clock cycle, expressed by the attribute energylevel. The PCAVWorkload profile provides the elements needed to describe hard real-time tasks running on an embedded real-time system, using the stereotype «pcaexecstep». The task model adopted in this paper assumes that the tasks are preemptable and periodic with equal or different task periods. The specific parameters for a real-time task modeled with PCAV are the following: period :thetaskperiod. wcec : the worst case execution cycles needed by the execution host to run the current task. wcet : the worst case execution time of the task. energyperexec : the processor energy consumption during the complete execution of this task. The energy consumption of a task during its complete execution is the energy consumed along the number of processor cycles needed to run the task. The number of worst case execution cycles for a task is also used in computing the worst case execution time for the task. In addition to this, the worst case execution time depends on the operating processor frequency, and since this is variable, the task execution time varies accordingly. The PCAVConsumers profile is used for modeling peripheral components in real-time embedded systems, i.e. LCD display, network card, or flash drive. Such components have a certain amount of power consumption, but the method used to compute is not considered here. Therefore, for peripheral components, power consumption is specified as the simple tag definition powerconsumption in the stereotype «pcapowerconsumer». The PCAVPower profile is used to model the power supply sub-system of a real-time embedded system. The power supply may be available through a simple battery for mobile devices, or through a complex system of battery cells used in failure-tolerant systems. The specific parameters for a battery are: capacity, which accounts for the amount of energy, which the power supply component can hold. voltage, represents voltage provided by this power supply component during system run time. duration, specifies the time interval, in which the system is expected to run without compromising quality of service, under current workload and with the current power configurations. The stereotype classes and the tag definitions defined in PCAV are summarized in Table I. Additionally to the PCAV elements, the table contains the stereotypes «schedulableresource» and «allocated». The first one depicts processes or threads in real-time embedded systems which in turn execute one or several tasks each. The latter is applied for associations which are used to allocate resources, i.e. threads, onto processing hosts, i.e. processors. Both are imported from the MARTE profile. Stereotype used on Tagged Values «pcaexechost» Classes switchcap, configuration, power- Consumption, leakagepower- Consumption «pcaexechostconfig» Classes energylevel, freq- VoltageTuple «pcafreqvoltagefunction» Classes frequency, voltage «pcapowerconsumer» Classes powerconsumption «pcapowersupply» Classes capacity, voltage, duration «schedulableresource» Classes «pcaexecstep» Methods period, wcec, wcet, energyperexec «allocated» Associations Table I Elements of the Power Consumption Analysis View. Further, Figure 1 displays an example of the PCAV based on two processors (CPU and CPU2 ), a mobile power supply (Battery), and a simple display (Display). The CPU model has a leakage power of P l =1.2W and runs with an average switching capacitance of C switch = 0.28nF. The processors allocate six tasks (three on CPU and three on CPU2 ), which are executed with the current operating frequency of 60MHz at a supply voltage of 6V, given by the processor configuration Conf, and its corresponding frequency-voltage pair, FVTuple. To keep it simple, we only show the parameters of one task, which has a period of T 1 =13ms and the number of execution cycles is wcec 1 = The power consumption of the display is set at P other =1W, while the battery capacity and the battery voltage are C battery =8Ah and respectively V battery =5V. Figure 1 also illustrates how the tag definitions are modeled graphically and how, once the respective vari- 1198

4 period=[13,ms] wcet=[$r4,ms] wcec=[976*10^2,cycles] energyperexec=[$r11,nj] switchcap=[0.28,nf] con guration="conf" powerconsumption=[$r2,w] leakagepowerconsumption=[1.2,w] <<schedulableresource>> SchedResource <<pcaexecstep>> task1() <<pcaexecstep>> task2() <<pcaexecstep>> task3() <<pcaexechost>> CPU <<pcapowerconsumer>> Display <<pcapowersupply>> Battery powerconsumption=[1,w] capacity=[8,ah] voltage=[5,v] duration=[$r5,h] <<schedulableresource>> SchedResource2 <<pcaexecstep>> task4() <<pcaexecstep>> task5() <<pcaexecstep>> task6() <<pcaexechost>> CPU2 frequencyvoltagetuple="fvtuple" energylevel=[10.08,nj] <<pcaexechostcon g>> Conf frequency=[60,mhz] voltage=[6,v] <<pcafreqvoltagefunction>> FVTuple Figure 1. An example of a Power Consumption Analysis View ables are computed, these definitions become tagged values. The tagged values of the modeled system elements are expressed as tuples, tag =[value, unit] andthose values which are computed during the analysis process itself are marked as variables, tag =[$r i,unit]. IV. The Power Consumption Analysis We have implemented a simple analysis algorithm for calculating the power consumption of an embedded system. The analysis is based on the PCAV and the algorithm uses the view, modeled in the UML case tool Papyrus for UML ( directly as an input for the analysis. After the analysis, the results are published back to the the PCAV in Papyrus using e.g. the duration or powerconsumption tagged values. For the power consumption analysis of a system the power consumption of each task is calculated to find out the power consumption of a CPU. Furthermore, the system under consideration contains also other resources than processors which also contribute to the overall system power consumption. For these components we assume a fixed value, represented by P other. One goal of the analysis, besides finding the power consumption, is to determine how long the system can run under the current workload and using the same battery. More details can be found in [17]. The processor has two predefined hardware parameters: average switching capacitance C switch and leakage power consumption P l and supports several power configurations. To each of these configurations corresponds a pair of discrete supply voltages and CPU frequencies. The one-to-one relation between CPU speed and its supply voltage can be modeled with PCAV through the «pcafreqvoltagefunction» stereotype. The stereotype defines a pair of the two attributes voltage and frequency, in which, given one parameter, the other can be calculated. The first computation performed in the power consumption analysis is the energy consumption correspondent to each processor power configuration. The calculation of the energy consumption levels is done using [18]: E = n C switch Vdd 2 (1) where n denotes the number of clock cycles, C switch represents the average switching capacitance, and V dd is the supply voltage. The energy consumption corresponding to a processor configuration is computed using the average switching capacitance of the CPU, C switch, given per clock cycle, and the processor supply voltage, V dd. These parameters are modeled in the tagged values switchcap of the stereotype «pcaexechost» and respectively voltage from «pcafreqvoltagefunction». The equation for the configuration energy consumption can be derived from Equation 1 by division by the number of execution cycles n: E Confi = C switch Vdd 2 (2) The task execution energy consumption E τi for task τ i is computed throughout the number of clock cycles wcec i needed to execute the corrsponding task. The number of task execution cycles is modeled through the wcec tag defined in the stereotype «pcaexecstep». E τi = wcec i E Confj (3) The processor power consumption is computed for the execution of the entire task set. It is sufficient to sum up the power consumption of all tasks in relation to their period to calculate the execution power consumption of the CPU: m E τi P exec = T i=1 i (4) with T i being the period of τ i and m being the number of running tasks on the system processor. The leakage power P l represents the minimum processor power consumption independently if tasks are running on it or not. The leakage power of the processor are introduced in PCAV through their respective tagged value leakagepowerconsumption in stereotype «pcaexechost». To find out the power consumption of a CPU, the following equation is used: P cpu = P exec + P l (5) 1199

5 The overall power consumption for a given system (P system ) is computed using the following equation: P system = P other + cpu P cpu (6) where P other is the power consumption of all other peripheral devices and the power consumption of all CPUs is added. The result of this computation is used to compute battery duration of the modeled system. Besides finding the power consumption, it is also significant for systems engineers to know how long a mobile embedded system is able to run under the given workload without renewing or recharging the power supply. The answer to this question is found by computing the battery duration for the system subject to the power analysis process. Battery duration is computed using the battery capacity C battery and the battery voltage V battery as parameters for the Equation 7: t duration battery = C battery V battery (7) P system These parameters are specified in the stereotype «pcapowersupply» through the tagged values: capacity and voltage. The result of the computation is stored in this stereotype, using the tagged value duration. The worst case execution time of a given real-time task τ i is computed using Equation 8: c i = wcec i (8) f j where j {1,,k}, withk the number of supported operating frequencies, and i {1,,m}, withm the number of real-time tasks running on the processor. The parameters wcec i and f j are modeled through the tagged values wcec of the «pcaexecstep» stereotype and frequency from the «pcaexechost» stereotype. The result is stored in the wcet tagged value defined in the «pcaexecstep» stereotype and can later be used for a scheduling analysis. V. Finding an Energy Efficient and Real-Time TaskConfiguration for a DVS System We are demonstrating the realization of our approach on a DVS system by finding a configuration that is power aware but still real-time (i.e. energy efficient and considers task and task chain deadlines.). As we have implemented this workflow, it is done completely automatic and the algorithm will find the optimal configuration, if it exists. A task configuration describes the usual task parameters, like deadline, priority, worst case execution cycles etc., and, additionally, the frequency with which the task will be executed. That means, that under every situation the task will be executed with the defined frequency. We assume a dynamic system. Consequently, we cannot define a complete static schedule, as we only know a certain period when a task might be executed (including jitter). Therefore, we are using the SAV and a scheduling analysis tool, SymTA/S, to examine if the system can be scheduled and deadlines are met. We consider the following system description: We use two CPUs with the following modes: {(10 MHz, 1 V),(40 MHz, 4 V)(60 MHz, 6 V)}. We consider the following tasks running on the CPUs ( τ i =(deadline D i in ms, priority p i, worst case execution cycles wcec i,period T i in ms)). There are no dependencies between these tasks. The task with the lowest number as a period is preferred: τ 1 =(13, 3, , 15) scheduled on CPU τ 2 =(9, 4, , 10) scheduled on CPU τ 3 =(26, 1, , 30) scheduled on CPU τ 4 =(16, 3, , 20) scheduled on CPU2 τ 5 =(6, 2, , 8) scheduled on CPU2 τ 6 =(3, 1, , 5) scheduled on CPU2 The PCAV (depicted in Figure 1) and the corresponding SAV are annotated with the necessary values. That means all the necessary parameters are specified which are used for the analysis. This includes a description of the tasks and the resource, but also the mapping between these components (see Section III). The only parameters left in the SAV are the execution times, as they depend on the CPU mode, in which the task will be executed. After creating a PCAV and a corresponding SAV, a first configuration is created. We assume, that the worst case response cycles are examined for each task. This is done by choosing one mode the «allocated» CPU offers. Consequently, every task has its mode. To find a power aware solution, the algorithm starts using the most power aware, the slowest, mode for all tasks. As before that point it was not defined with which frequency the CPU would run the tasks, there are no execution times given for the tasks. After defining the frequency, the worst case execution times for tasks can be calculated based on the worst case execution cycles and the frequencies. These calculated times are set to the wcet tagged value of the «pcaexecstep» stereotype. The values are c 1 = 9.76ms, c 2 = 5.82ms, c 3 = 29.82ms, c 3 =9.7ms, c 5 =14.7ms, and c 6 =4.7ms. Besides this, the energy consumption per task execution is calculated. In our example, using the slowest frequency mode, τ 1 has a energy consumption E 1 =0.027mJ, accordingly E 2 =0.016mJ, E 3 =0.083mJ,... After calculating the worst case execution times, the execution time values are transferred to the SAV. All necessary parameters are set and we can use the transformation described in [6] to put the system in the format of SymTA/S, analyze it, and get the results again into the SAV. If the result of the scheduling analysis is that no deadline is missed, this is a valid configuration (in terms of scheduling) and can be further progressed 1200

6 with determining the energy consumption. If only one deadline is missed, this configuration can be dismissed and the algorithm starts again with a new configuration, where at least one task has to be executed in a faster mode. In the worst case, the algorithm has to try every configuration. And even in this situation it is possible that the system is not schedulable. In our example, the deadline of Task τ 3 is missed, as its execution time is R 3 =29.82ms. Consequently, a new configuration has to be created in the PCAV. After testing some configurations, the configuration E Conf17 is found: τ 3 is scheduled with 60 MHz, all other tasks are executed with 40 MHz. This configuration satisfy the real-time requirements and the minimum power constraint. If the configuration is valid in terms of scheduling (no deadlines are missed) it can be a possible configuration for the system. The energy consumption of this configuration is calculated using the formulas in Section IV. In our example, the total power consumption (also considering leakage power and the display) for the configuration E Conf1 where all tasks are executed using the slowest CPU frequency mode, the total power consumption is P system = W. But as this configuration is not real-time, we have to dismiss it. The configuration E Conf17, which is real-time, has a total power consumption P system =3.6814W. VI. Conclusion and Future Work We have presented a UML profile, the Power Consumption Analysis View Profile, for annotating energy/power consumption relevant parameters to a UML development model. It is based on the MARTE Foundations. The Power Consumption Analysis View, which is a UML model annotated with the presented profile, enables the possibility to integrate energy aspects to a UML based development process and can be used as a basis for power consumption analysis. We created a simple analysis algorithm for an automatic analysis. Additionally, as power consumption and scheduling aspects are not independent, we implemented an algorithm for DVS systems, to find a combination that is real-time, but most power aware. Future work can be done by optimizing the search for a schedulable configuration and the integration of better power consumption analysis. References [1] OMG Object Management Group, Unified modeling language specification, [2], Systems Modeling Language (SysML), [3], UML Profile for Modeling and Analysis of Realtime and Embedded Systems (MARTE), [4] M. Hagner and M. Huhn, Modellierung und analyse von zeitanforderungen basierend auf der uml, in Workshop, ser. LNI, H. Koschke, Ed., vol. 110, 2007, pp [5], Tool support for a scheduling analysis view, in Design, Automation and Test in Europe (DATE 08), [6] M. Hagner and U. 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