A Preliminary Study of Maximum System-level Crosstalk at High Frequencies for Coupled Transmission Lines

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1 A Preliinary tudy of Maxiu yste-leel Crosstalk at High Frequencies for Couled Transission Lines iaoeng Dong, Haixiao Weng, Daryl G Beetner Todd Hubing Electroagnetic Coatibility Laboratory Uniersity of Missouri-Rolla Rolla, MO Eail: xdrg4@uredu Richard Wiese Joseh McCallu Electroagnetic Coatibility Electrical Center General Motors Milford, MI Abstract ile forulas were deried to quickly estiate axiu crosstalk between wires in a harness at high frequencies, the length of circuits is coarable with or greater than the waelength of the signals of interest Forulas were deried fro ulti-conductor transission line theory When the source load resistances are either both large or both sall coared to the characteristic iedance of the transission line, axiu couling is shown to be gien by aroxiately MA A siilar equation was found for the case the load iedances are atched Exerients show these equations redict the axiu alue of couling well Keywords- Crosstalk; Transission line; Couling II DERIATION A lued-eleent odel can be alied to silify calculations when circuit diensions are uch saller than the waelength of the signals of interest An equialent odel is shown in Figure The crosstalk (couling) is defined as ay be calculated fro this equialent circuit odel R R I M I L L C C R FE C R L - - I INTRODUCTION Crosstalk between circuits ay cause failure or alfunction if it is not well controlled It is useful to estiate the axiu crosstalk between circuits early in the design stage to aoid otential robles after anufacture Traditionally, a fullwae soler has been used to get an exact solution for crosstalk, but this ethod is tie consuing iractical in any cases Moreoer, full-wae siulation has to be reeated for eery sall change in the design it is difficult to link siulation results to secific characteristics of the circuit configuration An exact alue of crosstalk at all frequencies usually is not needed for reliinary ealuation of a circuit configuration A ballark aroxiation of axiu crosstalk leels is adequate [] The ai of the research resented here is to deelo sile forulas to estiate the axiu alue of crosstalk between culrit icti circuits at high frequencies, the waelength under consideration is sall coared to the length of the circuit These estiates ay be calculated easily gie the user a feel for the iortant contributors to crosstalk This aer resents exeriental results sile closed for forulas to estiate axiu crosstalk at high frequencies for couled transission lines Figure Lued odel of inductie caacitie couling The lued-eleent odel is not alid at high frequencies the circuit length is greater than a quarter-waelength At these frequencies, ulti-conductor transission line odels should be used In this case, oltage is not constant across the length of the circuit While the couling ight be defined as for the lued eleent odel, calculations can be silified by defining couling as MA, MA MA is the axiu oltage along the icti circuit MA is the axiu oltage along the culrit circuit Using this aroxiation for crosstalk, sile forulas can be deried fro ulti-conductor transission line theory to estiate axiu leels of crosstalk at high frequencies between two circuits that share the sae wiring harness Assutions were ade to bound the colexity of the roble Assutions include: The transission lines are unifor across their length (ie geoetry does not change) /04/$000 (C) IEEE

2 The couling edia is air (The erittiity /or ereability of wire insulation or other nearby aterial is ignored) The transission lines are lossless (The resistance of the wire conductiity of the couling edia are ignored) The oltage current of two couled circuits are related Assuing the transission line is lossless, their relationshi can be exressed as [][3]: jω LI z I jω C z, () (), are the oltages on the culrit I I I icti circuit resectiely;, I I are the currents through the culrit icti circuit resectiely, L L L L L, L is the self-inductance er unit length (PUL) of the culrit circuit, L is the self-inductance PUL of the icti circuit, L is the utual inductance PUL between the two circuits, C C C C, C is the selfcaacitance PUL of the culrit circuit, C is the selfcaacitance PUL of the icti circuit, is the utual caacitance PUL between two circuits Taking the artial deriatie of () () with resect to z substituting aroriately for z ω LC z I CLI z ω I z gies:, (3a) (3b) Because the edia is hoogeneous, both LC CL yield a diagonal atrix, LC CL U U is the unit atrix In free sace, is the hase elocity of wae roagation /s β ω µε If one defines the ter, then the solution to equation (3) can be exressed as: or jβz jβz e e jβz jβz e e e e jβz jβz (4) is the incident oltage wae (fro source to load) is the reflected oltage wae (fro load to source) ubstituting () into (4), we get the general solution for the current as jβz jβz I L ( e e ) jβz jβz ( e ) C e, (5) Boundary conditions ust be alied at both source load ends to get the secific solution for this roble At the load end ( z 0 ), we hae ( z 0) Z Load I( z 0), (6) z reresents osition along the transission line, Z Load RL 0 0 R FE, L R R FE are the load iedance of the culrit the far-end iedance of icti circuit resectiely (see Fig ) At the source end, z l, we hae Z ( z l) Z I( z l), (7) R 0 0 R, R R are the source iedance of the culrit circuit near-end iedance of the icti circuit resectiely The roble can be silified by assuing rough alues of terination iedances First let us assue that both the culrit icti circuit are shorted at the far ends This is a reasonable aroxiation when far-end terination iedances are uch less than the characteristic iedance of the transission lines (tyically about 300 ohs) In this case ( z 0) 0 (8) ubstituting (8) back into (4) (5), we get the silified oltage current equations as: /04/$000 (C) IEEE

3 jsin( β z) (9) I cos( β zc (0) ) Therefore the axiu oltage on the culrit circuit is, the axiu oltage on the icti circuit is Alying boundary condition at the source end, z l, we get ( z l) Z I( z l) ubstituting this into (9) (0) circuit jsin( βl) cos( βl) Z C, s 0, s is the source oltage of the culrit If we define A jsin( βl) cos( βz) Z C, then s A, Thus cos( β l) R ( C ) cos( β l) R jsin( β l) A cos( β l) R( C ) cos( β l) R jsin( β l) cos( βl) R( C ) cos( βl) R jsin( βl) 0 cos( βl) R( C ) cos( βl) R jsin( βl) For a icti circuit oerating at high frequencies, therefore suscetible to high frequency noise, it is reasonable to assue the near end iedance of the icti circuit is around the characteristic iedance of the transission line to ignore the extree case, ie R 0 or R Then, soling for, the axiu couling between the culrit icti circuit is gien by: Couling MA MA tan( βl) ( ) j R Maxiu couling occurs when sin( β l) 0, thus iniizing the diisor Peak couling occurs at frequencies with alue f k l, k,, MA () iilar deriations can be ade when both the culrit icti circuits are terinated with high iedance or are atched at the far ends Without detailed deriation, the results are gien as: When both the culrit icti circuit are terinated with high iedance at the far end, the axiu couling is gien by aroxiately MA When both circuits are atched at the far-end, the axiu couling is gien by aroxiately MA R C In real alications, the iedance of the culrit circuit should be well controlled to eet functionality requireents If we assue that the culrit circuit is atched at the source end oen or shorted at the load end then, ignoring feedback couling fro the icti to the culrit, we can get the axiu oltage along the culrit circuit as: MA () When the culrit icti circuit are right next to each other (strong couling case, ie C C C ), the energy ay coule back fro the icti circuit to the culrit circuit be absorbed by the source iedance of the culrit circuit because it is atched at the source end Thus the axiu leel of couling could be gien aroxiately by MA regardless of the source load iedance In this case, the axiu oltage along the icti circuit is gien by: MA MA MA MA (3) III ALIDATION Exerients were erfored to alidate the equations deried aboe Fig shows the exeriental setu Culrit /04/$000 (C) IEEE

4 icti circuits were created by susending two wires oer a ground lane Both circuits used the ground lane as the current return ath The source end of the culrit circuit was connected to ort of a network analyzer the far end of the icti circuit was connected to ort of the network analyzer was easured to calculate crosstalk between the two circuits The radius of the wires was 04 The height of the wires oer the ground lane was about 45 c The length of the wires was 87 c The distance between the circuits was aried fro (when they were laced right next to one another, searated only by their insulation) to 9 c For breity, only soe of the exeriental results are discussed in the following text icti easured crosstalk the axiu alue of crosstalk redicted by our sile equations when the two circuits were right next to each other (aroxiately aart) The deried alues of axiu couling are close (within 6dB) to alues easured exerientally It should be noted that the alue of couling, as defined here, ay be slightly different than the alue easured, as couling was defined to be the ratio between the axiu oltages oer the length of the line not the ratio of oltages at the terinations Of course, only the oltage at the end of the lines could be easured Ground R R Culrit R FE R L Cul: 90, 0; ic: 050, 0-70 Figure Exeriental setu Frequency [MHz] The characteristic iedance of the culrit circuit was easured using a TDR found to be 97 ohs In the exerient, the source iedance of the culrit was set to 90 ohs, aroxiately atching the characteristic iedance of the transission line Figure 4 Measured axiu-redicted crosstalk when the culrit icti are 9 c aart 5 c aboe the ground lane The culrit circuit uses a 90 oh source iedance a shortcicuit load The icti uses a 050 oh near-end iedance short-circuit far-end load The red dashed line shows the easured alue of crosstalk The solid black line shows the axiu redicted alue of crosstalk Cul:90,oen; ic:000, Frequency [MHz] Cul:90,oen; ic:000,050 Cul:90,short; ic:short,050 Cul:90,oen; ic:short, Frequnency [MHz] Figure 3 Measured axiu-redicted crosstalk when the culrit icti are 9 c aart 45 c aboe the ground lane The culrit circuit uses a 90 oh source iedance an oen-circuit load The icti uses a 000 oh near-end iedance 050 far-end (load) iedance The red dashed line shows the easured alue of crosstalk The solid black line shows the axiu redicted alue of crosstalk Fig s 3 4 show the easured crosstalk the axiu alue of crosstalk redicted by our sile equations when the two circuits were 9c aart Figure 5 shows the Figure 5 Measured axiu-redicted crosstalk when the culrit icti were right next to each other 45 c aboe the ground lane The source load iedances for the culrit icti circuits are gien in the figure legend The solid black line shows the axiu redicted alue of crosstalk I UMMARY Forulas were deried using ulti-conductor transission line theory to estiate the axiu couling between two /04/$000 (C) IEEE

5 circuits at frequencies the length of the circuit is greater than a quarter of the waelength The deeloed forulas were alidated exerientally The exeriental results agree well with calculations Howeer, the forulas only work for soe configurations, for exale when both the culrit icti circuits are terinated with a high or low iedance at the far (load) end Currently, we are working on the deeloent of forulas to estiate the high-frequency crosstalk for the general case, using any cobination of source- loadiedances REFERENCE [] Ranganathan; D G Beetner; R Wiese; T H Hubing, An Exert yste Architecture to Detect yste-leel Autootie EMC Probles, Proceedings of the 00 IEEE EMC yosiu, , Minneaolis, August, 00 [] D M Pozar, Microwae Engineering, nd Edtion, John Wiley & ons, Inc, 998 [3] C R Paul, Introduction to Electroagnetic Coatibility, John Wiley & ons, Inc, /04/$000 (C) IEEE

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