INPUT TO (TM/TC) CHANNEL CODING GREEN BOOK(s) AS DISCUSSED AT THE MEETING IN CRYSTAL CITY, VA (USA) on 12 March Frame Error Control Field

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1 INUT TO (TM/TC) CHANNEL CODING GREEN BOOK(s) AS DISCUSSED AT THE MEETING IN CRYSTAL CITY, VA (USA) on 12 March Frame Error Control Field [Reply to comment GC2] - Section of CCSDS 13.1-G-1 provides information about the error detection capability of a generic CRC obtained by cyclic code shortening. On the other hand, in this document the error detection capability is specifically discussed for the CRC CCITT. - Only generic information about CRC encoding and decoding are provided in CCSDS 13.1-G-1. More detailed information is provided in the present document. - Section of CCSDS 13.1-G-1 also contains a figure clarifying the concatenation of the CRC and Turbo encoder. - Section of CCSDS 13.1-G-1 discusses the situations where the use of CRC is advisable and the situations where the use of CRC can be avoided (e.g., RS code with E=16). Comment [GC1]: It is proposed this update to be inserted into the Channel Coding Breen Book and not in the (partly) obsolete TM Green Book. Comment [GC2]: CCSDS 13.1-G-1 contains a section called: 8.4 CERTIFICATION OF THE DECODED DATA (FRAME INTEGRITY CHECKS) It shall be checked how this input integrates with this section about CRC in Turbo Codes. Theoretical Background The Frame Error Control Field (FECF) of the TM/TC Transfer Frame is more commonly known in coding theory as Cyclic Redundancy Check (CRC), i.e. a binary systematic code used to detect bit errors after transmission. Usually, the term CRC refers to the parity bits produced by the encoding circuit, which are appended to the message before transmission. The concatenation of bit message and CRC is known as codeword. Rather than a cyclic code, the CRC is usually a shortened cyclic code. The CRC encoding and error detection procedure can be conveniently described by means of polynomials in binary algebra. This is possible by representing a message of k bits as a binary polynomial of degree k - 1. In [TM SDL Blue book] it is adopted the convention to represent a bit message [M, M 1,, M k-2, M k-1 ] of length k as a polynomial M(X) = M X k-1 + M 1 X k M k-2 X + M k-1. Conventionally, the coefficient M of the highest power of X is the bit which is transferred first. Adopting this polynomial description, a (n-k)-bits CRC is computed as the remainder (X) = X n-k X n-k n-k-2 X + n-k-1 of the long division between the degree n - 1 polynomial M(X) X n-k, where M(X) is the message polynomial of degree k-1, and a degree-(n-k) polynomial G(X) known as the generator polynomial, i.e. M(X) X n-k = G(X) Q(X) + (X), where Q(X) is the quotient of the division, which is not used. In other words we have

2 (X) = M(X) X n-k modulo G(X) (1) The CRC encoding principle is sketched in Figure 1, where the message bit M is input first to the encoder and the encoded bits are output in the order M,, q. M, M 1,, M k-2, M k-1 CRC ENCODER M, M 1,, M k-2, M k-1,, 1,, n-k-2, n-k-1 Figure 1: CRC encoding principle The CRC encoding block can be conveniently implemented using linear feedback shift-register (LFSR) circuits. In particular, the above mentioned long division is performed by the circuit shown in [TM SDL blue book, Figure ink 1], which was first proposed in [1]. INFORMATION BITS (M transferred first) M M n-17 (1) (1) Comment [GC3]: It may be wise to repeat the drawings here instead of just referencing to other books. Comment [GC4]: It may be wise to repeat the drawings here instead of just referencing to other books. CODED DATA OUTUT (2) (2) ZERO X X 1 X 2 X 3 X 4 X 5 X 6 X 7 X X 9 X 1 X 11 X X X 14 X rovided that all the shift register storage cells are initialized to, the coefficients of the remainder (X) are stored in the cells in the clock time in which the bit M k-1 is output by the encoding circuit. The CRC error detection is based on the following observation (use binary algebra): M(X) X n-k = G(X) Q(X) + R(X) M(X) X n-k + R(X) = G(X) Q(X), where M(X) X n-k + R(X) is the polynomial representation of the transmitted codeword, which is divisible by G(X). Then, on the decoding side, the remainder of the division between the n-bits received message C * (X) = C * X n-1 + C * 1 X n C * n-2 X + C * n-1 and G(X) is checked. This remainder is known as the syndrome, denoted by S(X) = S X n-k-1 + S 1 X n-k S n-k-2 X + S n-k-1. Comment [GC5]: Here C(X) should be replaced by C*(X) Comment [GC6]: It seems that C* as received codeblock (opposite to the transmitted codeblock) is not defined.

3 [Reply to comment GC6] A possibility is to modify from Then, on the decoder size to the expression of S(X) as follows: Let C * (X) = C * X n-1 + C * 1 X n C * n-2 X + C * n-1 denote the n-bits received message on the decoder side. Here, the remainder of the division between C * (X) and G(X) is checked. This remainder is known as the syndrome, denoted by S(X) = S X n-k-1 + S 1 X n-k S n-k-2 X + S n-k-1. Comment [GC7]: Here C(X) should be replaced by C*(X) Comment [GC8]: It seems that C* as received codeblock (opposite to the transmitted codeblock) is not defined. Then we have S(X) = C * (X) mod G(X). (2) If the syndrome is the all-zero string, then the received message is a valid codeword and the transmission is assumed as correct and incorrect otherwise. An undetected error takes place when the syndrome is the all zero string but the transmitted codeword was affected by errors. A LFSR circuit which allows checking the syndrome of the received word C * (X) is sketched in [TM SDL Blue book, Figure ink 2]. [Reply to comment GC7] The acronym LFSR (linear feedback shift-register) was actaully explained at its first use, a few lines above. OK for adding it to the acronym list. Comment [GC9]: Acronym to be explained in the first occurrence and to be included (if not yet) in the acronyms list. Comment [GC1]: Again, better repeating the drawing S S S S 15 S S S S S S 12 S S S S 11 1 S 9 S X X 1 X 2 X 3 X 4 X 5 X 6 X 7 X X 9 X 1 X 11 X X X 14 X FRAME BITS C C n-1 (C transferred first) This circuit is essentially the same that is used for encoding. All the storage cells of the shift register are initialized to. The syndrome of C * (X) is present in the shift register cells in the time clock subsequent to that in which the bit C * n-1 is input to the circuit. It is worthwhile noting that, using this circuit, one will actually check the remainder of the division between X n-k C * (X) and G(X): since G(X) has not X among its factors, the syndrome of C * (X) is zero if and only if the syndrome of X n-k C * (X) is zero. CCSDS Recommended CRC: Encoding and Error Detection

4 The 16-bit FECF (n k = 16) recommended by the CCSDS for the TM Space Data Link rotocol and for the TC Space Data Link rotocol is the CRC CCITT, whose generating polynomial is given by G(X) = X 16 + X 12 + X (3) We know that a necessary and sufficient condition for the corresponding binary (n, k) code to be cyclic is that G(X) is a factor of X n + 1. It is possible to show that the smallest n such that this condition is fulfilled is n = (2 15-1), so that selecting k = and using the encoding circuit of [TM SDL Blue book, Figure ink 2] we obtain a (32767, 32751) code, where the value n = is sometimes called the natural length. When using the encoding circuit of [TM SDL Blue book, Figure ink 2] with some k < we loose the code cyclicity. The obtained code is known as shortened cyclic code. In theory the initial value of the shift register storage cells has no affect on the CRC undetected error probability (the error detection capability of a CRC code employing the generating polynomial (3) is discussed in the next subsection.). However, there might be practical considerations leading to prefer an initial word to another one. For example, any CRC encoder where all the shift register storage cells are initialized to has no state transition if an all-zero message is input. In some situations a non-zero initial word may be preferred. A non-zero initial word is recommended in [TM SDL Blue book], where the encoding and syndrome computation rules are slightly different from (1) and (2). A degree-15 presetting polynomial 15 L(X) = i = i X (4) is first introduced, corresponding to the all-one sequence of length 16. Then, the FECF (encoding side) and the syndrome (decoding side) are computed as and FECF = [(X 16 M(X)) + (X (n 16) L(X))] mod G(X) (5) S(X) = [(X 16 C * (X)) + (X n L(X))] mod G(X) (6) respectively. It is possible to show that (5) and (6) correspond to input M(X) and C * (X) to the encoding and decoding circuits, respectively, presetting in both circuits all the storage cells to one. A formal proof can be found in [2]. Error Detection Capability In general, the error detection capability of a shortened cyclic code depends on the generating polynomial G(X) and on the input message length (k). We discuss next the error detection capability of a shortened cyclic code with G(X) = X 16 + X 12 + X Comment [GC11]: Correct the style to be less paper oriented.

5 [Reply to Comment GC11] We may modify just removing the phrase starting with We discuss next and writing Concerning the CRC with G(X) = X 16 + X 12 + X 5 + 1, its minimum distance is equal to. The minimum distance of this CRC code is equal to 4 for 2 k < and is equal to 2 for k Then, if 2 k < any single, double or triple error is detected. Observing that G(X) = (X+1) (X 15 + X 14 + X 13 + X 12 + X 14 + X 13 + X 12 + X + 1), we recognize that (X + 1) is a factor of G(X), that is the code provides a parity-check, which ensures that any pattern of an odd number of errors is detected. In general, if the bit errors take place independent of each other with probability e, then the undetected error probability of the CRC CCITT code can be approximated as u = A 4 e 4 (1- e ) n-4, where the values of A 4 as a function of k are provided in [3], where it is also advised that common operations such as bit stuffing can dramatically increase the undetected error probability. [Reply to Comment GC12]. For any (n,k) linear block code over the BSC, an undetected error occurs when the error pattern is a non-zero codeword. Letting p denote the error probability of the BSC, and letting A i denote the multiplicity of the weight-i codewords (i.e., the weight enumerating function), we have Comment [GC12]: This formula is causing some debate; ACTION to check and comment against the referenced paper. Comment [GC13]: Should in u the letter u be subscript? The same for letter e in e. Comment [GC14]: It could be very nice to add a table showing the values of such a probability for some typical frames sizes. The table could be limited to the frame sized allowed for Turbo Codes + I=8. u = n i = 1 A i p i ( 1 p) n 1 For small enough p, this is well approximated by considering only the terms in the summation associated with minimum weight codewords. More in general, by considering only this term, a lower bound on the undetected error probability is obtained. Note that the CCITT CRC has d min =4 for the frame lengths of interest for the CCSDS. Then, the term associated with A 4 has to be considered. It is worthwhile noting that in some real situations the errors are not independent but occur in bursts (this may be the case when using an error correcting code). By definition, the received sequence is said to be affected by a burst error of length b when the error pattern only occurs over a span of b encoded bits. More specifically, two bits of index j and j + b 1 within the same codeword are in error, some of the intermediate b 2 bits are in error and all the other bits are correctly received. A CRC constructed by shortening a cyclic code is capable of detecting any error burst of length b n k. This is because the error detection capability of a shortened cyclic code is at least the same as the original cyclic code. In the specific case of the CRC CCITT this means that the code is capable of detecting any burst error of length 16 or less. The expression (b, p) probabilistic burst error is used sometimes to refer to a burst error of length b where each of the b 2 intermediate encoding bits is in error with probability p. An analysis of the undetected error probability of cyclic and shortened cyclic codes affected by probabilistic burst errors can be found, for instance, in [4], [5].

6 References [1] W.W. eterson and D.T. Brown, Cyclic Codes for Error Detection, roceedings of the IRE, vol. 49, no. 1, pp , Jan [2] T.G. Berry, A note on the modified CRC, ACM SIGCOMM Computer Communication Review, vol. 2, no. 5, pp , Oct [3] D. Fiorini, M. Chiani, V. Tralli and C. Salati, Can we trust in HDLC?, ACM SIGCOMM Computer Communication Review, vol. 24, no. 5, pp. 61 8, Oct [4] V.K. Agarwal and A. Ivanov, Computing the robability of Undetected Error for Shortened Cyclic Codes, IEEE Transactions on Communications, vol. 4, no. 3, pp , Mar [5] J.K. Wolf and D. Chun, The Single Burst Error Detection erformance of Binary Cyclic Codes, IEEE Transactions on Communications, vol. 42, no. 4, pp , Jan

Ch. 7 Error Detection and Correction

Ch. 7 Error Detection and Correction Error Detection and Correction Data can be corrupted during transmission. Some applications require that errors be detected and corrected. 2 1. Introduction Let us