Device for Precise Packet Delay Measurement

Transcription

1 Device for Precise Packet Delay Measurement Jan Breuer 1, Vojtěch Vigner 2 and Jaroslav Roztocil 3 1, 2, 3 Department of Measurement, Faculty of Electrical Engineering, Czech Technical University in Prague, Technická 2, Prague, Czech Republic 1 jan.breuer@fel.cvut.cz, 2 vojtech.vigner@fel.cvut.cz, 3 jaroslav.roztocil@fel.cvut.cz Abstract- Node synchronization can be implemented in an Ethernet network using time protocols; e.g. IEEE 1588 (see [1]). Active network components like switches and routers influence a precision of the synchronization because they affect the packet delay in the network. Therefore, the delay is not constant and also the delay in one direction is not equal to the delay in the opposite direction. This paper presents a low-cost device that can precisely measure the packet delay in both communication directions and, at the same time, calculate network parameters; e.g. the packet delay variation, the path asymmetry and dependency of the delay in opposite directions. Measured values can be used to determine the usability of the network for the IEEE 1588 implementation and to predict the quality of the synchronization in a network. These measurements are important to achieve a precise synchronization in a low-cost network infrastructure. I. Introduction The quality of synchronization in an Ethernet network depends on the precision of timestamping in the terminal nodes, stability of the timebase in these nodes and the packet delay variation caused by an underlying network. Precise timestamping can be performed in an Ethernet physical layer (PHY). A stable timebase can be ensured by either a temperature compensated crystal oscillator (TCXO) or oven-controlled crystal oscillator (OCXO). Packet delay variation can be compensated by specialised network elements. This paper describes the construction of a special device for a network parameter measurement consisting of two special terminal nodes. These nodes are designed to be able to send and receive packets, provide their timestamps and evaluate packet delay. Packet delays are later post-processed and used to calculate packet delay variation, path asymmetry and dependency on the delay in one direction to the delay in the opposite direction. The measuring process can be extended to the function of measuring maximum time interval error (MTIE), time deviation (TDEV) and other metrics used in time synchronization (see [2]). Some of the methods are described in [3] and [4]. Measured values can determine if the network can be used for the IEEE 1588 implementation, and predict the quality of the synchronization in a network. These measurements are important for achieving precise synchronization in a low-cost network infrastructure. A. Synchronization by means of IEEE 1588 A precise time protocol (PTP) - IEEE 1588 serves for the synchronization of the units in a packet network. The protocol is based on a hierarchical architecture of the Master-Slave type. The hierarchy is formed automatically by the Best Master Clock algorithm which uniquely determines the optimal clock by which all other units in the system are synchronized. In the original version of the protocol, the Master periodically emits synchronizing messages by multicast UDP packets. As the fact that the multicast limits the usage of the protocol only to a local network, the latest version offers the possibility of synchronization by means of the unicast or other layers, and a direct exchange of packets on the second layer. Slave units are able to correct the delay on the transmission path according to the information received from the Master (see [5]). 66

2 B. Important parameters for IEEE 1588 implementation The most important parameter to consider is a packet delay from one node to another one (see [2]). The packet can pass through several active components; e.g. a network switch, router, etc. Another crucial aspect to observe is the symmetry of a communication channel. Knowing these two important aspects, we are able to determine whether a network has optimal properties to implement any synchronization protocol; e.g. IEEE 1588, see [1]. II. Description of the measuring device In this section the construction of our measuring device is described (Figure 1). The main component is an integrated circuit IEEE 1588 Precision Time Protocol Transceiver Physical Layer (PHY) DP83630 by Texas Instruments (see [6]). It allows us to timestamp ingoing and outgoing packets directly in the PHY interface. Thanks to this function, it is possible to reach a high resolution of timestamps; in this case 8 ns. In order to function properly, the device should have a synchronous timescale. The timescale does not have to be world-wide; e.g. UTC or GPS timescale, but for a proper function in a distributed system its implementation is very useful. The measured data is preprocessed in each microcontroller and then stored in an SD memory card or sent to a superior data-acquisition system; e.g. via LAN, USB, RS232, etc. A. Modularity Figure 1. Measuring device Thanks to a PHY IC which provides all necessary functions, we are not dependent on the choice of microcontrollers. Tho only condition is a presence of a MII/RMII bus. We used an STMicroelectronic's STM32F207 microcontroller (see [7] and [8]) with FreeRTOS (see [9]), which is a real-time operating system (RTOS) for embedded applications. The basis of the measuring device was Sleepy Cat Kit designed in the Czech Technical University in Prague, Faculty of Electrical Engineering. The main advantage of the kit is availability of a RMII thanks to the header connector. B. Device for a local measurement As it was described in Section I, for achieving the most accurate results, it is important to have synchronous timescale. This requirement is quite easy to reach in a local measurement. It is important to use the same clock source for both nodes in the device as described in Figure 2. To measure an interval precisely, the system clock should have sufficient stability (see [10]). The required stability is sufficiently ensured by the 10 MHz OCXO MTI-210 by MTI-Milliren Technologies, Inc. (see [11]). 67

3 Figure 2. Device for local measurement The device for a local measurement is the first step in building the distributed system described in the following section. Nevertheless, it is fully functional for the local measurement with an accuracy of 8 ns. Thanks to a local timescale, the nodes are fully synchronous, and thus the device is able to measure an asymmetry of the network connection at the same time. Measured delay asymmetry can be used for further determination of the algorithm of the packet processing in an active network device; e.g. in a network switch. This concept has been proven by the measurements described in Section III-B. C. Distributed measuring system The concept of the measuring system in a distributed system arrangement is based on splitting the whole system into two parts, where each part has its individual clock. Reliable and synchronous timescale has to be replaced by a short-term stable OCXO and UTC time reference in form of GPS PPS (see [12]). A GPS receiver provides a long-term stable time reference. To maintain precise timescale, however, it is necessary to combine a GPS receiver with an OCXO which has better short-term stability. Figure 3. Distributed measuring system (one device) III. Measurements The device for a local measurement was used to perform following tests: calibration with known references measurement of an ordinary switch measurement of an industrial switch A. Calibration of the device using a known LAN cable To calibrate our device, it was necessary to measure the system with known parameters. We decided to use a different length of the UTP cable. We measured a transport delay on a cable by SR620 Stanford Research Universal Time Interval Counter and this value was considered as a reference value (see Table 1). The delay values obtained by our device were processed using linear interpolation in order to determine a default offset of the device (the delay of PHY and LAN connectors). A final interpolated offset of ns was used to correct the measured data. Table 1 shows evidently that the measured values are similar to the reference values. Therefore, at our measuring device this measurement can be taken as a successful test. Slight differences between reference and measured values are caused by the resolution of time stamps (Section II) and can be considered as a property of this device. 68

4 Parameters Cat Cat 5 Cat 5 Cat 5e Cat 5e Cat 5e Type UTP UTP S/UTP S/UTP S/UTP Length 1 m 10 m 1 m 5 m 50 m Delay Reference 5.0 ns 44.3 ns 5.6 ns 22.4 ns ns Measured 6 ns 46 ns 6 ns 22 ns 238 ns B. Testing of a packet delay on a LAN switch Table 1. UTP Cable Delay, Measured vs. Reference For testing a packet delay on a LAN switch we used an ordinary and industrial switch with advanced networking functions for the next measurement. A basic principle of the measurement was that both ports (1 and 2) of our device were connected to the switch. As it is shown in Section III-B2, we tested an industrial switch with and without a packet propagation delay information from correction field of an IEEE 1588 message. The switch was tested at a room temperature of 20 C. 1) Ordinary network switch: The TP-LINK TL-SF1008P was chosen as a representative of the ordinary network switch. This switch uses a RTL8309G integrated circuit by Realtek, which is often used by many other desktop switch manufacturers. Direction Mean STD Min - Mean Max - Mean ns 126 ns -267 ns +237 ns ns 126 ns -268 ns +237 ns Table 2. Ordinary network switch propagation delay Results in Table 2 contain the following values: a mean value, a standard deviation, minimum and maximum values. The direction represents the route of packets; e.g. 1 2 means that the packet was sent from Port 1 to Port 2. We measured approx exchanges of the packets with the packet rate of 1 packet/s. 2) Industrial Ethernet switch with a PTP functionality: We tested an industrial switch with and without the information about a packet propagation delay from a correction field from a PTP message. For the evaluation of an IEEE 1588 functionality Hirschmann MS20 Ethernet switch was used. Figure 4 and Figure 5 represent the value of the packet delay between two LAN ports of the measuring device described in Section II-B. The switch was in the Transparent Clock mode. This measurement was done synchronously from both ports of the device. Thus, we could evaluate an asymmetry of this connection. We used a packet rate of packets/s, and we measured approx exchanges of the packets. The results of the measurements are presented in Table 3. Direction Mean STD Min - Mean Max - Mean Without corrections ns 294 ns -549 ns +595 ns ns 297 ns -549 ns +595 ns With corrections ns 7 ns -14 ns +14 ns ns 7 ns -15 ns +13 ns Table 3. IEEE 1588 network switch propagation delay The switch can provide its propagation delay value in the correction field inside a packet (see [13]). Figures 4a and 4b represent a histogram of the delay of both packets without using correction field value. A quick examination of the scatter plot pattern shows that the packet delay is not symmetrical. If it were, symmetrical values will be represented by a line instead of a rectangle. The variations in delays are even bigger than in case 69

5 of an ordinary switch (see Table 2). This effect can be caused by an advanced packet processing inside a manageable switch. Figure 5 depicts a packet delay after applying a correction field value provided by the switch. The application of this value significantly lowered the packet delay variation and reduced the asymmetry of the switch Path delay B A [ s] Path delay A B [ s] a) b) Figure 4. Instantaneous packet delay variation for both paths without using a correction field in the packets a) Scatter plot, b) 3D histogram Path delay B A [ s] x Path delay A B [ s] Figure 5. Scatter plot of an instantaneous packet delay variation for both paths with using a correction field in the packets. IV. Conclusions We proved that the device for a local measurement described in this paper provides reliable and precise results. The accuracy of the packet delay measurement is 8 ns, which was verified by the calibration described in Section III-A. The following research will be focused on the measurement in a distributed system, see Section II-C. Acknowledgment The research described in this paper has been financed by the TAČR (Technology Agency of the Czech Republic) under the Grant No. TA , Timing synchronous distributed systems for data acquisition and process control. 70

6 References [1] IEEE Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems. IEEE, New York, The Institute of Electrical and Electronics Engineers, Inc., [2] ITU-T, G.8261: Timing and synchronization aspects in packet networks, ITU-T, Geneva, International Telecommunication Union, [3] L. Cosart, Precision packet delay measurements using IEEE 1588v2, in Precision Clock Synchronization for Measurement, Control and Communication, ISPCS IEEE International Symposium on, oct. 2007, pp [4] L. Cosart, Packet network timing measurement and analysis using an IEEE 1588 probe and new metrics, in Precision Clock Synchronization for Measurement, Control and Communication, ISPCS International Symposium on, oct. 2009, pp [5] STMicroelectronics, AN3411 Application note: IEEE 1588 precision time protocol demonstration for STM32F107 connectivity line microcontroller, STMicroelectronics, Tech. Rep. Doc ID Rev 1, July [6] Texas Instruments, DP83630 Precision PHYTER - IEEE 1588 Precision Time Protocol Transceiver, Texas Instruments, Tech. Rep., February 23, [Online]. [7] STMicroelectronics, Reference manual: Stm32f101xx, stm32f102xx, stm32f103xx, stm32f105xx and stm32f107xx advanced arm-based 32-bit mcus, STMicroelectronics, ST Microelectronics, Doc ID Rev 14, Oct [8] STMicroelectronics, Getting started with STM32F20xxx/21xxx MCU hardware development, August [9] D. Deharbe, S. Galvao, and A. M. Moreira, Formalizing freertos: First steps, in Formal Methods: Foundations and Applications, 12th Brazilian Symposium on Formal Methods, SBMF 2009, Gramado, Brazil, August 19-21, 2009, Revised Selected Papers, ser. Lecture Notes in Computer Science, M. V. M. Oliveira and J. Woodcock, Eds., vol Springer, 2009, pp [10] D. W. Allan, Time and frequency (time-domain) characterization, estimation, and prediction of precision clocks and oscillators, IEEE TRANSACTIONS ON ULTRASONICS, FERROELECTRICS AND FREQUENCY CONTROL, vol. UFFC-34, no. 6, [11] MTI-MILIREN TECHNOLOGIES, INC., 210 Series OCXO - Mini OCXO in a 14 Pin DIP Package, MTI-MILIREN TECHNOLOGIES, INC., Tech. Rep., [Online]. [12] M. A. Lombardi, L. M. Nelson, A. N. Novick, and V. S. Zhang, Time and Frequency Measurements Using the Global Positioning System, Cal Lab: The International Journal of Metrology, pp , [13] K. Correll and N. Barendt, Design considerations for software only implementations of the IEEE 1588 precision time protocol, in Conference on IEEE 1588 Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems,