Traffic Engineering based on Experimentation in On-chip Virtual Network on Dyamically Reconfigurable Processor

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1 Traffic Engineering based on Experimentation in On-chip Virtual Network on Dyamically Reconfigurable Processor Shan GAO, Taku KIHARA, Sho SHIMIZU, Yutaka ARAKAWA, Naoaki YAMANAKA, Kosuke SHIA Department of Information and omputer Science, Faculty of Science and Technology, Keio University, Hiyoshi, Kohoku-ku, Yokohama, , Japan gao@yamanaka.ics.keio.ac.jp IPFlex Inc. Kamiosaki , Sun felista Meguro 6F, Shinagawa-ku, Tokyo, Japan Abstract In recent years, traffic engineering has widely researched to guarantee QoS. It is important that not only link cost, but also several metrics should be considered in next generation traffic engineering. A high-speed traffic engineering method is required, because the complexity increases when more than one metric is considered. In this paper, different from conventional mathematical approach, we describe an experimental traffic engineering method using on-chip virtual network implemented on reconfigurable processor. Links and nodes in virtual network are constructed by several (processor elements) in DAPDNA- 2. We obtain the realistic traffic fluctuation through the behavior of packets that is in the on-chip virtual network. In this paper, as first trial to achieve our goal, we implemented virtual network construction method and confirmed basic path calculation algorithm on the constructed virtual network. I. INTRODUTION In these years, some new internet service has been developed such as video meeting, VoIP(Voice over Internet Protocol) and Internet radio based on high-speed optical network. The optical network can transfer bulk data in high-speed, and it is indispensable on backbone network. However, the next generation internet service in optical network inquire the more high-speed packet forwarding technology, high reliability and quality of service (QoS) technologies [1]. Therefore, it is important that secure the high reliability using traffic engineering [2] [5] which includes survivability, bandwidth control and so on. There are several core technologies in traffic engineering(te), which includes TE routing, TE load balancing and protection, etc. In this paper, we focus TE routing. In existing routing algorithm the shortest path [6] which has minimum cost is always selected for efficient data transfer. However, because the shortest path is always selected, the traffic load on certain links in shortest path will increase, hence congestion will occur. To avoid congestion, several metrics such as the traffic flow, the physical bandwidth and the link usage rate should be considered in routing approach. onventional TE routing algorithms calculate link cost uses mathematical approach with these metrics and the smallest cost route will be selected. TE algorithm can avoid the debasement of communication quality when congestion was occurred. However, frequent iterative calculation [7] is required for the conventional TE routing to distribute traffic. Therefore, a new traffic distribute method for TE routing is required for reduce the iterative calculation times. To solve this problem, we propose an experimental method that emulates each traffic flow which is sending in network and monitor packet to decide the path for distributing traffic. However, it is difficult to monitoring packet appropriately in real network. Therefore, we construct an on-chip virtual network based on a real network and emulate the data transfer for monitoring the packet flow. We propose an on-chip virtual network construction method using reconfigurable processor. We send packets in the constructed virtual network and monitor packet flow. y changing the link cost according to the number of passed packets, we achieve the traffic distribution dynamically. Rest of this paper is organized as follows. In Section II, we describe several important steps to achieve our goal. In section III, we explain our virtual network construction method basic path search algorithms. Simulation results are provided to evaluate the performance of the proposed algorithm is Section IV. Finally, Section V concludes this paper. II. STEPS TO AHIEVE OUR GOAL For our traffic engineering approach in on-chip virtual network, some important steps is required to achieve our final goal, the detail of these steps are shown below. 1. How to construct the virtual node and virtual link The node and the link are two main components of real network. To emulate a node and link behavior in a real network, we use several in DAPDNA-2 to construct the virtual node and the virtual link. We add some original functions in virtual node and virtual link for implement our traffic engineering approach. 2. How to construction method of virtual network

2 We connect several virtual network and virtual link appropriately to construct virtual network base on real network. 3. How to collect network flow with virtual packet We have to decide the data format of virtual packet sent on the chip for recording the route information. 4. How to create virtual network based on the real network automatically To trace the topology change of real network flexibly, to automate the function that rearrange the link and node is needed. We make the program that automatically generates the description file of configuration, to realize automation of the PE arrangement. 5. Hardware resource assignment 5.1 network division method To construct larger network, the network division method is required. We divide the large network to several subnetworks and construct virtual network base on each smaller sub-network. 5.2 ontrol sub-network After dividing the large network, we have to control the packet flow between each sub-network. The virtual subnetwork that was constructed on processor should change at proper timing and transmit the virtual packets to another subnetwork. The dynamic reconfiguration technique and multichip technique of DAPDNA- was used to control changing subnetwork. 6. Entertain effectiveness of our experimental method We implement our traffic engineering in virtual network. We send virtual packets from several source nodes and then the link cost will be changed with the number of passed packets. Moreover, we record the route information in virtual packet. If the route was converged automatically, then the effectiveness of our proposed method is proved. In this paper, we describe about step 1, 2, 3 as the first trial. We also explain an example of step 5 which divide a 10 nodes network to 3 sub-networks. Moreover, we implement two basic routing algorithms, the shortest path algorithm and the disjoint path search algorithm. At last we show the effectiveness of our experimental route search method implemented in on-chip virtual network. III. PROPOSED SHEME In this section, we explain our experimental shortest path search algorithm and disjoint path search algorithm in onchip virtual network. We also explain about implementation of these twor algorithm and virtual network construction which are describe in previous section as step 1, 2 and 3. These are important and basic step to achieve our traffic engineering approach. A. Algorithm Summary 1) Shortest path search algorithm: We proposed a parallel shortest path search algorithm which use experimental approach. The algorithm summary shows below. step 1 We assign a link number and a node number to each link and node. step 2 Send a virtual packet from source node, and broadcast this packet into each branch of the source node. step 3 When the virtual packet pass through the link, the link number is recorded in the virtual packet. When the virtual packet arrived at a new branch node, the virtual packet will be broadcasted. step 4 Repeat step 3, until one packet arrived at destination node. step 5 Finally, the information of first arrived virtual packet shows the shortest path. 2) Disjoint path search algorithm: The basic idea of this algorithm is similar to our shortest path algorithm. In disjoint path search, we should collect all path information at the destination node. The algorithm summary is shown below. Step 1 and 2 is same as the shortest path search algorithm. step 3 When the virtual packet pass through the link, the link number and the link cost is recorded in the virtual packet. When the virtual packet arrived at a new branch node, the virtual packet will be broadcasted. For preventing loop, once a packet passed a link, the packet never sent at that link. step 4 Repeated step 3, until all packets arrived at destination node. We monitor all packets in the network. If no data transmit in any link, packet collection is finished. step 5 Finally, we collect all virtual packets. We calculate the disjoint path pair based on route information which recorded in virtual packet. The disjoint path pair of minimum cost is selected as a optimal solution.. Implementation on DAPDNA-2 Virtual Packet Memory Fig. 1. Virtual network DAPDNA-2 Memory construction a virtual network We construct a virtual network in dynamically reconfigurable processor DAPDNA-2 [8] developed by IPFlex Inc [9]. DAPDNA-2 consists of DAP(Digital Application Processor), a high-performance RIS core DNA(Digital Network Architecture). The DNA is embedded in an array of 376 PE(Processing Elements), which are comprised of computation units, memory, synchronizers and counters. The DNA has several memory banks to store configuration. There are 3 banks memory in background memory and a bank in foreground. These 4 banks

3 store 4 configurations, but just foreground memory is active. DNA can change configuration by load other configuration from 3 background memories. We construct a virtual network by configuring several in DNA. We set parameters of each PE to emulate various functions which real nodes and real links have. For search the route from source node to destination node, we send virtual packet which transmit in the processor. Figure 1 shows an example of virtual network construction. There are 6 nodes and 10 links in real network, so we construct 6 virtual node and 10 virtual link use several in parallel processor, and connect them. Then we read a 32-bit data as a virtual packet from main memory, and transmit this data in the processor. The virtual packets are broadcasted from the source node. Finally, we collect data at destination node and write it in mian memory. When we want to use this data, we can read it from main memory. We implement the shortest path search algorithm and the disjoint path search algorithm on DAPDNA-2. First, we explain how to implement the shortest path search algorithm. 1) Implementation of Shortest Path Search Algorithm: In implementation of shortest path algorithm, we design the virtual node and the virtual link. The design of virtual node and the virtual link is shown below. a) Virtual Node: We define that the virtual node has input port and output port, because links are bidirectional. Figure 2 shows an example of node design whose node degree is three. The virtual node has three input ports and three output ports when the real node s degree is three. For execute our algorithm, many function of the virtual node are shown below. Prevent loop. We use three to construct a loop prevention function. Figure 3(b) shows an example of loop preventing. When data came into link NO.1, we first calculate AND operation of and (the link number). Then, we compare the result to 0. If the result equals 0, we send forward to next node, but in this example, the result is not 0, so we do not send the data. Generate delay. We define the link cost as delay. For example, if the link cost of real network is three, we should generate three clocks delay in virtual link. So, the packet pass through different path, will take different clocks. The virtual packet which passed minimum costs path will first arrive at destination node OR Virtual link No.1 a) Record the link number AND Virtual link No.1 b) Prevent loop Fig. 3. Functions of virtual link No.1. (a)record the link number in data (b) loop preventing function Figure 4 shows an example of our shortest path search algorithm Source node A No.1 No.4 No.2 No.3 D No.7 No.6 F Destination node in1 dix nx do diy gexe U1 cix SEL co ciy ny out1 No.5 E No.8 A PE A in2 in3 dix nx do diy gexe U2 cix SEL co ciy ny dix nx do diy gexe U3 cix SEL co ciy ny out2 out Source node No.1 A No.4 No No.3 D No.7 No.6 F Destination node Fig. 2. Example of node degree which is three opy the virtual packet from input port. Send the virtual packet to other output port except the output port corresponding the input port that virtual packet come from. In our algorithm, the virtual packet will be broadcasted in each branch node. So, the virtual packet should be sent to each output port. b) Virtual Link: The basic virtual link functions are shown below. Record the link number to the input data. Figure 3(a) shows an example of virtual link design. In this example we show the lower 8 bits of virtual packet only. When data pass through the link No.1, rightmost bit will be change to 1. Then, the output data is Fig. 4. No.5 E No.8 construction a virtual network The network shown in figure4 has six nodes. At first, we assign the link number to all links and node number to all nodes. In this example, the network has 8 links, so the link number should be defined from No.1 to No.8. The virtual packet is initialized by 0x and the all 32 bits of virtual packet is used to record link information. step 1 At the source node, we broadcast virtual packets (In this example, we only show the lower 8 bits). The virtual packet will be sent forward to link 1 and link 2. step 2 The virtual packet pass through the link No.1 and No.2, and the link number is recorded to the virtual

4 packet. The output of link 1 and link 2 are and Then, we focus on node 1. Node 1 have 2 branches, so we send to link No.3 and link No.4 in the same way, and record link No.3 and No.4. The output data will be or step 3 When the data arrived at other nodes, step 2 will be repeated until the virtual packet arrive at the destination node. step 4 The first arrived packet will show the shortest path information. In the network shown in figure 4, the first data which arrived at the destination node is 0x The data passed through link No.1, link No.3 and link No.6. So, the shortest path is A--D-F. 2) Implementation of Disjoint Path Search: In disjoint path search, we collect all of the route information in the virtual network and we find the minimum cost disjoint path pair among these information. We first describe the virtual packet format of disjoint path search. Figure 5 shows an example of the format of virtual packet for searching disjoint path. In this example, the virtual packets arrived in a virtual node in same time. We prepare a two path in one port, one path has larger delay than another one. When two data arrive at this port at same time, one data will be sent to the path which has smaller delay, and another one is sent to a bigger path. DAPDNA-2 has 376 PE. We use a lot of to emulate some complicated function. When the network expands, PE becomes insufficient. Therefore we use dynamic reconfiguration technique to solve this problem. Figure 6 shows the example of path collection in a 10 nodes network. In this example, we divide the real network into three parts at first. We use three memory banks to store the virtual network configurations based on each network block. Then we decide how change memory bank using event rotation. Division the original network in 3 parts 0 No.1 No.2 1 RAM No No.4 2 No.5 EX 2 RAM 6 3 No.6 No.7 3 No.8 No No.10 RAM 3 EX RAM No.11 No No.13 9 No.14 1 Memory bank1 Memory bank2 Memory bank ost Node information Fig bits data Link information Example of format of virtual packet packet is divided into three field. Lower 16 bits of data is a field where the link information is recorded. The link information means the link number that the data passed. Next 10 bits which are 16th bit to 25th bit, is a field that the node information is recorded. Node information means the node number that the data passed. The upper 6 bits is a field that the cost of the passed route is recorded. The data format of this example can be used in 10 nodes or less 10 nodes network. If network expand, we should use more virtual packet to collect route information. For example, if we want to implement our proposed algorithm on the NSF network, we can use two 32 bits virtual packets to collect route information. (We define this two packets is a one set.) At every branch point, we broadcast the set of virtual packets. When we calculate the disjoint path pair, we look the set of two virtual packets. Next, We should remove or add some functions in virtual node and virtual link. In order to execute this algorithm faster, we remove delay generate function from virtual link. We add a calculation function in link. When the virtual packet passed through the link, the link cost will added in the cost filed of the virtual packet. Add conflict avoidance function in virtual node to prevent conflicting of virtual packets when two or more virtual Fig. 6. construction a virtual network The summary of implementation is shown below. step 1 We divide the network topology into three parts. step 2 At the source node, we broadcast virtual packets. step 3 When the virtual packet pass through the link, the link number is recorded to the virtual packet. When the virtual packet arrived in a new branch node, the virtual packet will be broadcasted. step 4 To transmit virtual packet to next configuration, we use RAM element to save packets. The change of memory bank will occurred when each RAM stored four virtual packets. We monitor all virtual packets in network. If no virtual packet transmit in currently configuration, we change configuration to configuration which stored in memory bank 2. step 5 Repeat step 3 and 4, until no virtual packets transmit in configuration which stored in memory bank 3. We collect all virtual packets which arrived at the destination node.. Automation of Virtual Network onstruction In Section II, we described several steps to achieve our goal. In the step 1 3, we use a GUI tool which is called DNAdesigner to design the configuration of the DNA. To achieve the step 4, we should use the PEL programing language. PEL is a special language which can describe the arrangement, parameter, and hard-wiring of in the DNA. The grammar of PEL is similar to c++. An example of PEL is shown in figure 7. The example of flow chart of automatic virtual network construction is shown in figure 8. We write a program using c++

5 ALU a, b; /* Arrangement of PE a and b */ a.alu = 0; /* Setup the parameter*/ a.dix = b.do; /* onnecte the PE*/ Fig. 7. An example of PEL TALE II SIMULATION RESULT OF THE READTH FIRST SEARH ALGORITHM AND OUR PROPOSED ALGORITHM Execution time: (µs) readth First Search algorithm Proposed algorithm which generates the PEL cord automatically when a network topology file was input. This program is called automation progrom. Then, the PEL source will be compiled by DNA compiler and execution file is created. Network Topology Fig. 8. Automation Program by c++ PEL source cord DAN compiler Execute file Flow chart of automatic virtual network construction IV. PERFORMANE EVALUATION In this section, we compare our algorithms and the Dijkstra s algorithm and readth first search. We execute these conventional two algorithm use 3GHz processor of Intel Pentium 4 PU. A. Simulation Result of Dijkstra s algorithm and our proposed In this section, we evaluate the calculation clocks of Dijkstra s algorithm [6], [10] and our proposed algorithm. The network topology is same as Figure 6. We execute Dijstra s algorithm and our proposed algorithm 100 times and we obtain the average of execution time. The simulation result is shown in table I. TALE I SIMULATION RESULT OF DIJKSTRA S ALGORITHM AND OUR PROPOSED ALGORITHM Execution time: (µs) Dijkstra s algorithm Proposed algorithm The execution time of our algorithm is faster than the execution time of Dijkstra s algorithm because our algorithm independent on the number of nodes. The Dijkstra s algorithm needs labeling all nodes in network, but our algorithm only depend the total cost of the shortest path. So, our algorithm can search shortest path faster even if the network is large.. Simulation result of the reath First Search algorithm and our proposed We compare execution time of collecting all route information between the breadth first search algorithm and our proposed algorithm. The simulation result shown in table II. We can see that our algorithm collects all route information faster than the breadth first search algorithm, because our algorithm broadcasts virtual packets and collects link informations at each route at the same time. V. ONLUSION In this paper, we proposed a novel approach for traffic engineering which use experimental method. In conventional approach of traffic engineering, frequent iterative calculation is needed to distribute traffic since traffic oscillation exiting in real network. If we monitor packet flow in each link, we can distribute the traffic easily. So, we send virtual packets in on-chip virtual network for monitor packets flow. The final goal of our approach is to distribute traffic dynamically. We explain several important steps to achieve our final goal and proposed a novel method to construct a on-chip virtual network in reconfigurable parallel processor DAPDNA-2. The automation of configuration construction was also explained in this paper. In performance evaluation, We show that both of the calculation time of our shortest path search algorithm and disjoint path algorithm faster than conventional method. Our algorithm can execution faster even when the network is large. So we prove that the experimental method based on on-chip virtual network is effectiveness. In this paper, several basic steps of our approach was completed, the next goal is step 4 and 6 which is described in section II. If we complete these two steps, we can achieve the final goal of our approach, that is to distribute traffic dynamically. It will becomes a great progress of traffic engineering. AKNOWLEDGMENT The authors thank Tomomi Sato and other staff for helping with implementation on DAPDNA-2 (IPFlex Inc). This work was supported by Global OE Program High-Level Global ooperation for Leading-Edge Platform on Access Spaces (12) and by the Japan Society for the Promotion of Science s (JSPS) Grant-in-aid for Scientific Research() ( ). REFERENES [1] D. Awduche, A. hiu, A. Elwalid, I. Widjaja, and X. Xiao, Overview and Principles of Internet Traffic Engineering, IETF, RF 3272, May [2] emard Fortz, Jennifer Rexford and Mikkel Thorup, Traffic Engineering with Traditional IP Routing Protocols,, IEEE ommunications Magazine, October 2002, pp [3] onstantion M.Lagoa, Hao he, and ernardo A. Movsichoff, Adaptive ontrol Algorithms for Decentralized Optimal Traffic Engineering in the Internet IEEE/AM Transactions on Networking, Vol.12,NO.3,June 2004, pp [4] Lu Ruan, Haibo Luo, and hang Liu, A Dynamic Routing Algorithm With Load alancing Heuristics for Restorable onnections in WDM Networks, IEEE Journal on selected areas in communications, Vol.22,No.9,November 2004, pp [5] Murali Kodialam, T. V. Lakshman, Dynamic Routing of andwidth Guaranteed Tunnels with Restoration, IEEE INFOOM, 2000,pp

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