Efficient Design of Power Module Using Semiconductor Device Model and Current Pathway Model

Transcription

1 Keihin Technical Review Vol.7 (2018) Technical Digest Efficient Design of Power Module Using Semiconductor Device Model and Current Pathway Model Shiho ARIMOTO *1 Takayoshi KIHARA *1 1. Introduction 2. PCU Overview As the electrification of vehicles has progressed rapidly in recent years, the demand for power control units (hereafter PCUs) for driving motors has been increasing accordingly. A PCU consists of electronic components such as power modules to control the power. In addition, in the design stage it is also necessary to consider various requirements such as for low power loss and high efficiency and low noise. This paper describes a power module design method using CAE (Computer Aided Engineering) models of the semiconductor device and electronic circuit in order to fulfill the various requirements with a good balance. Figure 1 shows a pattern diagram of the drive part of a PCU for a two-motor hybrid system. The PCU consists of a voltage control area for controlling the voltage depending on the driving conditions, an inverter circuit for controlling the motors (Motor PDU area), and a power generator circuit (Generator PDU area), etc. Figure 2 shows the PCU components. The PCU consists of an ECU (Electronic Control Unit) board, a gate drive board which controls the power modules and power modules on which a high-power Upper case High Voltage Battery ECU Voltage Control area Gate Drive PCB Generator PDU area IPM Motor PDU area PCU ECU IPM -Power module -Gate driver -Water jacket Middle case (Reactor is in middle case) Capacitor Technical Digests Lower case Generator Motor Fig. 1 Pattern diagram of drive part Fig. 2 PCU components (1) Received 10 August 2018 *1 PCU Development Department, R&D Operations -55-

2 Efficient Design of Power Module Using Semiconductor Device Model and Current Pathway Model semiconductor device is installed, etc. Figure 3 shows the power module model as viewed from the upper case side. The upper figure shows the power module filled with resin, and the lower one shows the power module without resin. It shows that plate copper bus bars through which electric current flows are provided inside the resin cover, as a current pathway around the semiconductors. In addition, the IGBT (Insulated Gate Bipolar Transistor) and Diode are adopted as semiconductor devices. With resin Fig. 3 Bus bar Resin Semiconductor device Without resin Bus bar Semiconductor device (IGBT) Resin removed Semiconductor device (Diode) Power module model as viewed from the upper case side optimized, redesign will be needed if the noise evaluation yielded poor results, which requires increased processing time. The following describes these issues. Figure 4 shows the measured waveforms of IGBT collector current and collector voltage when the switching operation is performed on the semiconductor device shown in Fig. 1. The product of these current and voltage values is power loss and impacts the power efficiency of the power module. (The red-striped area in Fig. 4 shows the image of power loss.) To improve power efficiency, a device with a faster switching speed (i.e. the smaller redstriped power loss area) is favorable. However, if the switching speed becomes faster, the current change (di/dt) per unit time becomes greater accordingly and the harmonic component increases, which results in deterioration of the noise levels. In addition, since PCU controls high electric power exceeding a few thousand watts, surge voltage exceeding a few hundred volts may be generated and it may cause malfunction and damage. It is also important to suppress the value of surge voltage Es in the power module design. Surge voltage is determined by the product of the value of L (impedance) of current pathway and the current change di/dt at the IGBT switching operation stage. (See the formula in Fig. 4.) Thus the smaller L value and absolute value of di/dt become more 3. Issues on Power Module Development The reduction of power loss, surge voltage, and noise are indicated as the major issues in power module development. These need to be correlated and each of them should be considered for optimal design. As a specific example, even if power loss and surge voltage in a trade-off relationship are Voltage Fig. 4 Surge voltage E s = L di dt Current change: di/dt Power loss (Image) Time VCE IC Current Switching waveform of motor PDU area (enlarged at turn-off time) -56-

3 Keihin Technical Review Vol.7 (2018) advantageous for the surge voltage design. However, if the value of di/dt is reduced, it will increase the base of power loss in Fig. 4 and the power loss will actually increase. 4. Development Flow Using CAE Issues on the power module development that are correlated as mentioned above were artificially reproduced at concept design stage using CAE and the optimal design for each issue was created. Figure 5 shows the conceptual image of development flow. In particular, the flow of 1 creating a behavior model which reproduces the characteristics of the semiconductor device utilized, 2 creating a state space model including circuit constants that may impact the switching waveform such as parasitic impedance in the current pathway, 3 performing coupled analysis of 1 and 2 using an electronic circuit model, and 4 performing modeling of a power module, was used to simulate the actual behavior. Semiconductor device model Behavior model Modify models / Adjust parameters Coupled analysis Modify models / Adjust parameters Electronic circuit model Perform switching operation Current pathway model State space model Collector Current, IC-A At first, this chapter is focused on the static characteristics of IGBT. Figures 6 and 7 show the waveforms of output characteristics and transfer characteristics respectively. Red waveforms are obtained from the simulation and blue ones are the measured waveforms. The measured waveforms are created from the table data of VCE-IC or VGE- IC. Physical approximation formulas for these characteristics are provided respectively for current ranges, and it is possible to reproduce them to some extent by adjusting these coefficients and orders. Thus, it is favorable to focus on the range and temperature suitable for the purpose and to perform the adjustment accordingly. Adjustment of static characteristics was performed for this study as well with a target of the used current range. As mentioned in chapter 3, the dynamic Actual used area Collector - Emitter Voltage, VCE-V Simulation Measurement Power module model Fig. 6 IGBT output characteristic Technical Digests Fig. 5 Conceptual image of development flow using CAE 5. Creation of Semiconductor Device Model The following describes the details of 1 in the development flow in Fig. 5. This flow covers the major semiconductor devices like the IGBT actually used for power modules, etc. Collector Current, IC-A Actual measured area Fig. 7 High temperature Room temperature Gate - Emitter Voltage, VGE-V Simulation Measurement IGBT transfer characteristic -57-

4 Efficient Design of Power Module Using Semiconductor Device Model and Current Pathway Model characteristics had a waveform including circuit constants such as parasitic impedance in the current pathway. Thus, it was necessary to perform modeling of the measurement environment (current pathway) of waveforms to be adjusted and then to adjust in accordance with those models. Details of dynamic characteristics are described in Chapter 7. complicated. At this stage a current pathway model was developed by using parasitic circuit constant extraction software, giving physical properties such as electric permittivity and electric conductivity to 3D shapes and calculating the circuit constants of when the lead frame and the bus bars, etc. are threedimensionally allocated and affecting each other. 6. Creation of Current Pathway Model Circuit constants of current pathway are affected to a large extent by 3D structure (configuration) and materials. Figure 8 shows the sub-comp model. The arrows indicate the current which flows into the semiconductor device. When the current flows through a conductive substance such as lead frame and bus bars, it contains a circuit constant for each substance such as impedance and flow into the semiconductor device. In addition, since bus bars are placed proximal to each other as shown in Fig. 8, mutual inductance and the proximity effect of the bus bars need to be considered. Therefore, the circuit constants of current pathway become highly 7. Coupling of Device Model and Current Pathway Model Next, simulation of the actual circuit of measurement system was performed using an electronic circuit simulator. Into that model, a device model adjusted up to static characteristics, and power module and current pathway models calculated to include the circuit constants of the measurement system were imported to create a state space model incorporating the circuit. After that, coupled analysis was performed on the electronic circuit and switching operation was performed. Figure 9 shows an example of the circuit. Figure 10 shows the switching waveform output after adjustment for dynamic characteristics. The red waveforms are obtained from the simulation and blue ones are measured waveforms. Switching operation was performed while taking circuit constants of the measurement system into account, thus the reproduction was of a high accuracy. Bus bars facing each other cause mutual inductance Fig. 8 Electromagnetic analysis result of subcomp model Fig. 9 Example of measurement system creation using electronic circuit -58-

5 Keihin Technical Review Vol.7 (2018) Voltage Fig. 10 VCE IC Time - Simulation - Measurement Current Comparison of switching waveforms from simulation and from actual measurement power loss when the gate resistance values are distorted. The power loss increases as the gate resistance increases. Based on Figs. 12 and 13, it can be confirmed that the surge voltage and power loss are in a trade-off relationship. Figure 14 shows the conducted noise output results by modeling LISN (Line Impedance Stabilization Network) using electronic circuit 8. Simulation of Study Result Using CAE Distortion of the IGBT gate resistance values was performed using parametric analysis of electronic circuit simulator. Figure 11 shows the results. This data is the output from the simulation. It shows that the surge voltage value decreases as the gate resistance value increases. Figure 12 compares this result with the actual measurement result. It shows a tendency where the surge voltage value decreases as the gate resistance value increases, which is similar to the actual measurement results. It can be inferred that a further improvement of accuracy of the current pathway model is required in order to reduce the gap between the measured and simulation values. Collector - Emitter Voltage, VCE-V In addition, Fig. 13 shows a graph of simulated Gate resistance: Large Time Surge voltage -V Fig. 12 Power loss -W High surge voltage Fig. 13 Noise level - db Small surge voltage: Better Gate resistance - ohm -Simulation -Measurement Gap between measurement and simulation Gate resistance - surge voltage comparison with the actual measurement Small power loss: Better Gate resistance - Ohm Gate resistance - power loss simulation result Frequency Technical Digests Fig. 11 Surge voltage waveforms dependent on gate resistance value Fig. 14 Common mode noise simulation result -59-

6 Efficient Design of Power Module Using Semiconductor Device Model and Current Pathway Model software. From this result, based on the trade-off between the surge voltage values and power loss, it is possible to simulate the noise level at a certain gate resistance value. In addition, it is also possible to pre-estimate the noise level in relation to gate resistance by distorting the gate resistance value with a target of a certain frequency range. As described above, in order to simulate issues caused by semiconductor devices such as surge voltage, power loss and conducted noise, device modeling incorporating the actual measurement environment (including the adjustment of switching characteristics) is necessary. After that, coupled analysis of the device model, current pathway model of the actual measurement environment, and electronic circuit simulation is performed, and the actual operation of switching is created. It enables the output of correlated parameters before creating physical items. Based on the output result, an optimum design for them is created thus reducing rework after design. In a similar way, it is possible to estimate the temperature by creating temperature characteristics of the device as a device model. It is also possible to simulate and study of evaluations such as for distortion of the gate resistance which would otherwise require a large amount of process time. For example, the results of six levels of the gate resistance as shown in Fig. 11 created in about five minutes by using parametric analysis of a simulation model on a 24-core 64GB workstation. disparities as evident in Fig. 12. For example, an expansion of the application of the current pathway model and a refinement of analysis precision can be studied. However, issues concerning increased analysis time and convergence capabilities arise accordingly. Therefore, suitable models for the result (purpose) to be achieved are necessary. By utilizing simulation models including device data prior to prototyping as shown here, it s possible to transition to a front-loading system where design and performance values can be determined prior to prototyping, instead of development based on an actual machine where prototyping, evaluation and re-prototyping are repeated. Optimization of the correlated design values prior to prototyping (i.e. offering prospects) enables a reduction of prototyping and evaluation process time as well as a contraction in development term. ANSYS Simplorer (currently Twin Builder) and ANSYS Q3D Extractor are used in this analysis. References (1) Eishin Matsumoto, et al., Power Control Unit for Hybrid Vehicles, Keihin Technical Review, Vol. 5 (2016) Author 9. Future Prospects In this study, we were able confirm that the above method enabled the estimation of the correlated design values in advance and contributed to the improvement of power module development efficiency. In the next step, we intend to improve the simulation accuracy by increasing the accuracy of the current pathway model in order to reduce S. ARIMOTO I d like to take this opportunity to express my gratitude to Ansys Japan K.K., the manufacturers concerned and all persons involved in this cooperation. (ARIMOTO) -60-