A NEW VISION OF THE EMBEDDED WORLD APF27DEV APF27DEV DATASHEET 0.H

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1 A NEW VISION OF THE EMBEDDED WORLD APF27DEV APF27DEV DATASHEET 0.H

2 26. juillet 2012 Disclaimer The informations in this manual have been carefully checked and are believed to be accurate. Armadeus systems assumes no responsibility for any inaccuracies that may be contained in this document. Armadeus systems makes no commitment to update or keep current the informations contained in this manual. Armadeus systems reserves the right to make improvements to this document and / or product at any time without notice. Warranty This product is supplied with a 1 year warranty. Product warranty covers failure caused by any manufacturing defects. Armadeus systems will make all reasonable effort to repair the product or replace it with an identical variant. Armadeus systems reserves the right to replace the returned product with an alternative part or an equivalent fit, form and functional product. Delivery charges will apply to all returned products. Trademarks ARM is a registered trademark of ARM Ltd. i.mx is a registered trademarks of Freescale semiconductor Spartan3A is a registered trademark of Xilinx Linux is a registered trademark of Linus Torvalds File name: datasheet_apf27dev.odt Last editing: 26 juil ARMADEUS A new vision of the embedded world 2/28

3 Table of Contents 1 - APF27Dev Overview Introduction APF27Dev Features Handling precautions Quick Start Hardware Description Power Supplies Input supply Vdc (onboard generated) Vdc (onboard generated) Vdc (onboard generated) Power consumption Normal modes Standby mode User LEDs (D12/D14) User switches (S1/S3) Bootstrap Jumper (J12) Reset Ethernet 10/100 (J16) RS232 Compatible Interfaces UART1 Connector (J2) UART3 Connector (J21) LCD Interface (J10) Connector (J10) microsd (J18) Connector Audio In / Audio Out Audio Connector (J1) Cellular Phone Audio In Connector (J17) USB Hosts Interfaces (J15) USB Host Connector DVI/HDMI Interface (J7) HDMI Connector ADC / DAC interfaces (full only) (J6) ADC DAC ADC/DAC Connector (J6) CAN (full only) (J13/J11) CAN Connector (J13) RTC (full only) Battery Holder (J4) Wireless Interfaces Wireless connector 1 (J8) Wireless connector 2 (J9) User Extension Interface (J22) USBH2 / SPI ARMADEUS A new vision of the embedded world 3/28

4 FPGA interfaces FPGA Differential Connector (J19) FPGA High Current Connector (J20) Mechanical and Assembly drawing Connectors and jumpers References...25 Edition Date Changes Edition 0.A (PCB ed 1.1) 12. November 2008 Initial version Edition 0.B (PCB ed 1.1) 5. January 2009 Update after review Edition 0.C (PCB ed 1.1) 12. August 2010 fixes (SD card connector manufacturer fix, J8 pin 15 fix) Edition 0.D (PCB ed 1.2) 03. March 2011 Add two pins to J19 Edition 0.E (PCB ed 1.2) 21. March 2011 Update mechanical drawing Edition 0.F (PCB ed 1.2) 14. October 2011 Add "Quick start"and Connectors chapters. Edition 0.G (PCB ed 1.2) 21 march 2012 Use pin39 for VCC(3.3v) and not pin19 Edition 0.H (PCB ed 1.2) 20 july 2012 Adding warning for J8 pin 1 ARMADEUS A new vision of the embedded world 4/28

This board offers access to the whole functionalities of the APF27 and provides several additional features.

5 1 - APF27Dev Overview Introduction The APF27Dev is a full featured development board dedicated to the APF27 single board computer. This board offers access to the whole functionalities of the APF27 and provides several additional features. Its price and its connectors make it ideal for rapid development of embedded applications. The APF27Dev is available with two levels of equipment: a full and a low cost version. ARMADEUS A new vision of the embedded world 5/28

6 1.2 - APF27Dev Features Input Power supply used) On board regulators 5 to 16V dc (2.5A@5V required if the whole functionalities are 5V / 2,5A max high efficiency DC/DC converter 3.3V / 1,5A max high efficiency DC/DC converter 1.8V/250mA LDO for audio and HDMI USB Host Controllers One high speed and one full speed USB 2.0 port Stereo Audio In/Out Controller Headset stereo audio out Touchscreen Controller Resistive touch panel CAN Controller CAN 2.0b. Full version only ADC 7 x 10 bits SPI ADC with internal or external reference. Full version only DAC 2 x 10bits I2C DAC with external external reference. Full version only HDMI HDMI 1.2a, up to 720p. Full version only RTC with backup battery Full version only Standard Connectors Specific 2,54mm connectors User LEDs User switches Reset Boot Standby mode Two Hirose receptacles for the APF27 Jack 2.5mm for power supply 2 x USB host (type A) RS232 DSub 9pts Ethernet (RJ45) with integrated isolation transformer and LEDs HDMI (full version only) dual 3,5mm stereo jack for audio in and out microsd Touchscreen LCD interface CAN (full version only) ADC/DAC (full version only) FPGA signals (full version only) imx inputs/outputs 2: one connected to the i.mx and the other to the FPGA 2: one connected to the i.mx and the other to the FPGA Switch Jumper for boot mode selection tbdl Handling precautions Please ensure that should a board need to be returned to Armadeus systems, it is adequately packed, preferably in the original packing material. ARMADEUS A new vision of the embedded world 6/28

7 2 - Quick Start At first an APF27 module needs to be plugged on J5. Once done, a power supply has to be connected to J3. The main characteristics of this input supply can be found in the section below. A null modem cable has to be connected between your PC and the RS232 connector (J2) of the board to get access to the debug console. See section for details of the serial communication settings. Ethernet cable can be connected to J16. If a LCD has to be connected do not forget to align pin 1 of the LCD connector (J10) with pin 1 of the LCD flat cable (red line). Please consult our wiki for initial setup ( and section 4.1 for details about the connectors/jumpers. 3 - Hardware Description ARMADEUS A new vision of the embedded world 7/28

8 J3 J2 J16 LCD pin 1 APF27 connectors The following section provides a detailed description of the functions available on the APF27Dev Power Supplies Input supply Connector type: 2.5mm mono jack (internal plug: positive supply, external ring: GND) Supply: 5 to 16V dc (2.5A@ 5V required if the whole functionalities are used) ARMADEUS A new vision of the embedded world 8/28

9 GND Vin Vdc (onboard generated) This supply is directly generated from the main input supply by means of a DC/DC converter. It is mainly used to power the two USB host ports (500mA each) and to provide a first conversion stage. It has to be noted that up to 5W are reserved for the two USB ports. If these ports are not used, the onboard 5V can supply an external board. Care must be taken to not overpass the power supply limits!! This supply is protected against over and reverse voltages Input: 5 to 16Vdc, 1 to 2.5A depending on functionalities used Output: 5Vdc / 2.5A max Vdc (onboard generated) This supply is generated from the local 5Vdc supply and uses a 1,5A DC/DC converter. A LED (D13) indicates the presence of the 3.3Vdc. Input: 5Vdc Output: 3.3Vdc / 1.5A max Vdc (onboard generated) This low power supply is used by the touchscreen / audio controller and by the video converter. Input: 3.3Vdc Output: 1.8Vdc / 250mA max Power consumption Normal modes All peripherals running excepted the FPGA: 2W (estimated) ARMADEUS A new vision of the embedded world 9/28

10 Standby mode In order to reduce the power consumption of the whole system during long inactivity periods, the APF27 and the APF27Dev can be placed in standby. In this mode, the processor is no longer working and is waiting for an interrupt. The volatile memory (DDR) enters in auto refresh allowing a fast wake up of the system. Total power consumption: 150mW (estimated) ARMADEUS A new vision of the embedded world 10/28

11 3.3 - User LEDs (D12/D14) LED D12 D14 Description FPGA user LED. Directly connected to IO_L24P_1 pin of the FPGA. See FPGA chapter for details about FPGAbank supply imx user LED. A low level on PC_VS1 (PF_14) pin of the i.mx will light the LED User switches (S1/S3) Switc h S3 S1 Description FPGA user switch. Directly connected to IO_L24N_1 pin of the FPGA. An external pullup is present on this line. See FPGA chapter for details about FPGAbank supply i.mx user switch. Connected to PC_VS2 (PF_13) pin of the i.mx. An external pullup is present on this line Bootstrap Jumper (J12) If a jumper is mounted on this 2 pins connector, the APF27 will start in bootstrap mode. This mode can be useful if the APF27 bios (U-Boot) is corrupted. The RS232 is used to transfer U-Boot from your PC to the internal FLASH of the APF27. For more information please see the APF27 datasheet. Reminder: Do not forget to remove the jumper after U-Boot recovery! Reset The board can be reseted by means of the small S2 switch Ethernet 10/100 (J16) The Ethernet connector (J16) can be used to connect your APF27Dev to your network. Two LEDs (orange/green) indicate respectively the presence of the link and the activity on this link. ARMADEUS A new vision of the embedded world 11/28

12 3.8 - RS232 Compatible Interfaces Two reduced RS232 interfaces (RX/TX only) are accessible on two specific connectors. The UART1 is connected to the DSUB9 connector (J2) while the UART3 is connected to a 4 pins header (J21). Only the TX/RX signals are routed. Both RS232 are protected against ESD UART1 Connector (J2) Connector type: DB9 Male Remark: a RS232 (crossover) cable has to be used to connect the APF27Dev to a PC. The communication baud rate is with 8bits data, 1 stop bit, no flow control and no parity UART3 Connector (J21) Pin Description Type Vdc Power 2 TX RS232 level 3 RX RS232 level 4 GND Power Connector type: 2.54mm 4 pin single row header Warning: the labels (pin1 and label) on the PCB (silkscreen) concerning J21 are not at the right place. Please take a look at the 4.1 chapter for right position LCD Interface (J10) The LCD interface (18bits data wide) allows connecting to the APF27Dev board: STN/TFT or standard text displays Resistive touch panels The signals of the LCD interface can be configured as standard GPIOs if required. Further informations can be found in the reference manual of the i.mx27 processor (link at the end of this document) Connector (J10) ARMADEUS A new vision of the embedded world 12/28

13 Pin Description Type Pin Description Type 1 LSCLK Bidir 2 3.3V Power 3 REV Bidir 4 5V Power 5 SPL_SPR Bidir 6 CONTRAST Bidir 7 PS Bidir 8 OE_ACD Bidir 9 CLS Bidir 10 HSYNC Bidir 11 GND Bidir 12 VSYNC Bidir 13 B1 Bidir 14 GND Power 15 B3 Bidir 16 B2 Bidir 17 B5 Bidir 18 B4 Bidir 19 G1 Bidir 20 G0 Bidir 21 G3 Bidir 22 G2 Bidir 23 G5 Bidir 24 G4 Bidir 25 R2 Bidir 26 R1 Bidir 27 R4 Bidir 28 R3 Bidir 29 R5 Bidir 30 GND Power 31 B0 Bidir 32 R0 Power 33 GND Power 34 GND Power 35 NC 36 NC 37 Touch X+ Analo g 39 Touch X- Analo g 38 Touch Y+ Analog 40 Touch Y- Analog Connector type: 2.54mm 30 pin dual rows Signal levels: 3.3V microsd (J18) A standard microsd card can be connected to the APF27Dev providing additional storage capacity. ARMADEUS A new vision of the embedded world 13/28

14 Connector Connector type: ALPS SCDA1A090x ARMADEUS A new vision of the embedded world 14/28

3.11 - Audio In / Audio Out A complete audio stereo codec (TSC2101) is present on the APF27Dev board providing a stereo headset output and two microphone inputs.

15 Audio In / Audio Out A complete audio stereo codec (TSC2101) is present on the APF27Dev board providing a stereo headset output and two microphone inputs. One microphone input is dedicated for the headset while the second one can be used to connect a cellular phone. A synchronous serial interface (SSI) is used to exchange the audio data between the codec and the i.mx. The configuration of the TSC2101 is done through the SPI2 interface Audio Connector (J1) Connector type: 3.5mm dual stereo jack Signal level for headset output: 0.8Vrms full scale, 1.5V output common mode Signal level for headset input: 0.7Vrms full scale, 1.5V output common mode Audio Out Audio In Cellular Phone Audio In Connector (J17) Connector type: 2.54mm dual pin single row header Signal level for cellular phone: 0.7Vrms full scale, 1.5V output common mode Pin Description Type 1 Mic In Analog 2 GND Power ARMADEUS A new vision of the embedded world 15/28

16 USB Hosts Interfaces (J15) One high speed and one full speed USB host interfaces are available. Both have independent current monitors and are protected against ESD USB Host Connector Connector type: dual USB A Signal level: USB High Speed Full Speed DVI/HDMI Interface (J7) The video controller of the APF27Dev board (AD9889 from Analog Devices) provides a fully compliant DVI/HDMI interface which can be used to display color images on a TV or a display. The controller is directly connected to the LCD interface and to the SSI1 port (for audio data transfers). The I2C2 bus allows programming the controller parameters. Unfortunately the datasheet and the programming reference manual for this component can not be redistributed. If custom parameters are required two solutions can be foreseen: contact directly Analog Devices or an official distributor or ask us. The software package provided by Armadeus systems includes a user space program to configure the HDMI port for the following resolutions: TBD Remark: a converter cable can be used to convert the HDMI output in a DVI output HDMI Connector Connector type: HDMI ARMADEUS A new vision of the embedded world 16/28

17 ADC / DAC interfaces (full only) (J6) ADC A 7 inputs multiplexed ADC (max1027) is present on the APF27Dev board. It is a 10bits version with up to 300ksps per channel. It is connected to the SPI1 bus of the i.mx and can be selected with SPI1_SS0. The conversion is started with the CNVST# signal while the end of conversion is indicated by the EOC# signal. This allows full speed conversions. By default the internal reference voltage of the MAX1027 is used for the conversions. This means that the voltage level of the analog inputs (AINx) can not be greater than 2.5V. This can be changed by applying an other reference voltage on the REF+ pin (J6 pin 2). Care must be taken to not exceed the MAX1027 specification. A link on the MAX1027 datasheet can be found at the end of this document DAC A dual 10bits voltage DAC (MAX5821) is used to control external analog devices. The output values can be changed through the I2C interface of the i.mx. The external reference voltage generated by the MAX1027 and can be overriden by applying an external voltage to pin 5 of J6. Care must be taken to not exceed the MAX5821 specification. The MAX5821 I2C address is: (binary). A link on the MAX5821 datasheet can be found at the end of this document ADC/DAC Connector (J6) Pin Description Type Pin Description Type 1 DAC OUTA Analog output (2.5V max with internal ref) 3 DAC OUTB Analog output (2.5V max with internal ref) 2 ADC AIN6 Analog input (2.5V max with internal ref) 4 ADC AIN5 Analog input (2.5V max with internal ref) 5 DAC REF 2.5V output if internal ref used otherwise external ref connection 6 ADC AIN4 Analog input (2.5V max with internal ref) 7 ADC AIN3 Analog input (2.5V max with internal ref) 9 ADC AIN1 Analog input (2.5V max with internal ref) 8 ADC AIN2 Analog input (2.5V max with internal ref) 10 ADC AIN0 Analog input (2.5V max with internal ref) V power 12 GND power ARMADEUS A new vision of the embedded world 17/28

18 Connector type: 2.54mm 12 pin dual row header Signal levels: 2.5V with internal reference voltage ARMADEUS A new vision of the embedded world 18/28

19 CAN (full only) (J13/J11) The CAN 2.0 controller is based on the MCP2515 from Microhip which is connected to the SPI2 bus of the imx27 processor. A CAN transceiver (SN65HVD234) converts the CMOS signals of the MCP2515 into CAN differential signals. A jumper (J11) provides a 120 ohms termination if required CAN Connector (J13) Pin Description Type Vdc Power 2 CANH Diff 3 CANL Diff 4 GND Power Connector type: 4 pins 2.54mm single row header Signal levels: CAN levels RTC (full only) The external RTC is based on a DS1374 from Maxim connected to the APF27 I2C bus. The IC has its own crystal (32.768kHz). The data retention is guaranteed by means of a dedicated battery cell (type CR2032) Battery Holder (J4) A cell battery (type CR2032) can be placed in this holder to maintain the RTC informations even if the board is no more powered. Up to 10 years of data retention can be expected. Remark: the cell battery has to be placed on the dedicated support according to the polarity indicated on this support! ARMADEUS A new vision of the embedded world 19/28

20 Wireless Interfaces Two 20pins connectors (J8/J9) are dedicated for further wireless child boards but can be used for other purposes. The signals available on these connectors are directly connected to the i.mx and thus care must be taken to the supply voltage domain associated to each signal (2.8 or 2.5V). Each line can be configured as standard GPIO or as primary function. Further informations can be found in the reference manual of the i.mx27 processor (link at the end of this document) Wireless connector 1 (J8) Connector type: 2.54mm 20pin dual row header Warning: Because of J21 label mistake on the PCB (silkscreen) the pin1 mark of J8 can be confusing. Please take a look at the 4.1 chapter for right position. Pin Description Type Supply domain Pin Description Type Supply domain 1 +2V5 (out) Power 2 +3V3 (out) Power 3 +2V8 (out) Power 4 UART3_CTS IO +2V8 5 GND Power 6 UART3_RTS IO +2V8 7 SD1_D0_SPI3_MISO IO +2V8 8 I2C_CLK IO +2V8 9 SD1_D1 IO +2V8 10 I2C_DATA IO +2V8 11 SD1_D2 IO +2V8 12 UART2_CTS_KP_COL7 IO +2V8 13 SD1_D3_SPI3_SS IO +2V8 14 UART2_RTS_KP_ROW7 IO +2V8 15 SD1_CMD_SPI3_MOSI IO +2V8 16 UART2_TXD_KP_COL6 IO +2V8 17 SD1_CLK_SPI3_SCLK IO +2V8 18 UART2_RXD_KP_ROW6 IO +2V8 19 GND Power 20 GND Power Wireless connector 2 (J9) Connector type: 2.54mm 20pin dual row header Pin Description Type Supply domain Pin Description Type Supply domain 1 +2V5 (out) Power 2 +2V8 (out) Power 3 SSI3_TXDAT IO +2V8 4 SSI3_FS IO +2V8 ARMADEUS A new vision of the embedded world 20/28

21 5 SSI3_CLK IO +2V8 6 SSI3_RXDAT IO +2V8 7 CSI_DO_UART6_TXD IO +2V5 8 CSI_D6_UART5_TXD IO +2V5 9 CSI_D1_UART6_RXD IO +2V5 10 CSI_D7_UART5_RXD IO +2V5 11 CSI_D2_UART6_CTS IO +2V5 12 CSI_VSYNC_UART5_CTS IO +2V5 13 CSI_D3_UART6_RTS IO +2V5 14 CSI_HSYNC_UART5_RTS IO +2V5 15 CSI_D4 IO +2V5 16 CSI_MCLK IO +2V5 17 CSI_D5 IO +2V5 18 CSI_PIXCLK IO +2V5 19 GND Power 20 GND Power User Extension Interface (J22) The following interfaces have be grouped on a single connector named User Extension: USBH2 / SPI2 This interface is shared with the audio codec and with the CAN controller. The USBH2 port can not be used together with the SPI2 port. SSI2 PWM0 TCK_OWIRE (1 wire) Keypad Connector type: 2.54mm 40 pin dual row header Pin Description Type Supply domain Pin Description Type Supply domai n 1 +3V3 (out) Power 2 TCK_OWIRE IO +2V8 3 +2V8 (out) Power 4 PWM0 IO +2V8 5 +2V5 (out) Power 6 GND Power 7 GND Power 8 GND Power 9 USBH2_CLK IO +2V5 10 USBH2_DATA7 IO +2V5 ARMADEUS A new vision of the embedded world 21/28

22 11 USBH2_STP IO +2V5 12 USBH2_DATA6_SPI2_SS0 IO +2V5 13 USBH2_DIR IO +2V5 14 USBH2_DATA5_SPI1_SS2 IO +2V5 15 USBH2_NXT IO +2V5 16 USBH2_DATA4_SPI2_SS2 IO +2V5 17 SSI2_CLK IO +2V8 18 USBH2_DATA3_SPI2_SS1 IO +2V5 19 SSI2_TXDAT IO +2V8 20 USBH2_DATA2_SPI2_MISO IO +2V5 21 SSI2_RXDAT IO +2V8 22 USBH2_DATA1_SPI2_MOSI IO +2V5 23 SSI2_FS IO +2V8 24 USBH2_DATA0_SPI2_SCLK IO +2V5 25 GND Power 26 GND Power 27 KP_COL0 Keypa d 29 KP_COL1 Keypa d 31 KP_COL2 Keypa d 33 KP_COL3 Keypa d 35 KP_COL4 Keypa d 37 KP_COL5 Keypa d +2V8 28 KP_ROW0 Keypa d +2V8 30 KP_ROW1 Keypa d +2V8 32 KP_ROW2 Keypa d +2V8 34 KP_ROW3 Keypa d +2V8 36 KP_ROW4 Keypa d +2V8 38 KP_ROW5 Keypa d +2V8 +2V8 +2V8 +2V8 +2V8 +2V8 39 GND Power 40 GND Power ARMADEUS A new vision of the embedded world 22/28

23 FPGA interfaces Two large connectors provide access to the FPGA signals. One connector (J19) is dedicated to the differential lines. It can be used for single ended connections too. The second one (J20) has several high current outputs. The FPGA banks (0,1,3) need to be powered by an external supply which can be applied at anytime (hot plug). For exemple, a wire can be connected between pin 39 and pin 1 of J20 to power the bank1 For more informations about the FPGA signals, have a look at the Spartan3A link at the end of this document FPGA Differential Connector (J19) Connector type: 2.54mm 40pin dual row header Pin Description Type Supply domain Pin Description Type Supply domai n 1 VCCO0 (in). Bank0 power supply Power BANK0 2 IO_L01N_0 IO VCCO0 3 IO_L02N_0 IO VCCO0 4 IO_L01P_0 IO VCCO0 5 IO_L02P_0 IO VCCO0 6 IO_L03N_0 IO VCCO0 7 IO_L04N_0 IO VCCO0 8 IO_L03P_0 IO VCCO0 9 IO_L04P_0 IO VCCO0 10 IO_L07N_0 IO VCCO0 11 IO_L08N_0 IO VCCO0 12 IO_L07P_0 IO VCCO0 13 IO_L08P_0 IO VCCO0 14 IO_L09N_0/GCLK5 IO VCCO0 15 IO_L10N_0/GCLK7 IO VCCO0 16 IO_L09P_0/GCLK4 IO VCCO0 17 IO_L10P_0/GCLK6 IO VCCO0 18 IO_L11N_0/GCLK9 IO VCCO0 19 IO_L12N_0/GCLK11 IO VCCO0 20 IO_L11P_P/GCLK8 IO VCCO0 21 IO_L12P_0/GCLK10 IO VCCO0 22 IO_L15N_0 IO VCCO0 23 IO_L16N_0 IO VCCO0 24 IO_L15P_0 IO VCCO0 25 IO_L16P_0 IO VCCO0 26 IO_L17N_0 IO VCCO0 27 IO_L18N_0 IO VCCO0 28 IO_L17P_0 IO VCCO0 29 IO_L18P_0 IO VCCO0 30 IO_L19N_0 IO VCCO0 ARMADEUS A new vision of the embedded world 23/28

24 31 GND Power 32 IO_L19P_0 IO VCCO0 33 JTAG_TRSTN Jtag +2V8 34 GND Power 35 JTAG_TDI Jtag +2V8 36 JTAG_TRMS Jtag +2V8 37 JTAG_TCK Jtag +2V8 38 JTAG_TDO Jtag +2V V3 (out) Power 40 GND Power 41 +2V8 (out) Power 42 GND Power ARMADEUS A new vision of the embedded world 24/28

25 FPGA High Current Connector (J20) Pin Description Type Supply domai n Pin Description Type Supply domai n 1 VCCO1 (in). Bank1 power supply Powe r BANK1 2 IO_L20N_1 IO VCC1 3 IO_L24P_1 (FPGA LED connected to this pin) 5 IO_L24N_1 (FPGA switch connected to this pin) IO VCC1 4 IO_L20P_1 IO VCC1 IO VCC1 6 IO_L23N_1 IO VCC1 7 IO_L22P_1 IO VCC1 8 IO_L23P_1 IO VCC1 9 IO_L22N_1 IO VCC1 10 GND Power 11 GND Powe r 12 VCCO3 (in). Bank3 power supply Power BANK3 13 IO_L24P_3 IO VCC03 14 IO_L24N_3 IO VCC03 15 IO_L23P_3 IO VCC03 16 IO_L23N_3 IO VCC03 17 IO_L22P_3 IO VCC03 18 IO_L22N_3 IO VCC03 19 IO_L20P_3 IO VCC03 20 IO_L20N_3 IO VCC03 21 IO_L15P_3 IO VCC03 22 IO_L15N_3 IO VCC03 23 IO_L14P_3 IO VCC03 24 IO_L14N_3 IO VCC03 25 IO_L12P_3 IO VCC03 26 IO_L12N_3 IO VCC03 27 IO_L11P_3 IO VCC03 28 IO_L11N_3 IO VCC03 29 IO_L08P_3 IO VCC03 30 IO_L08N_3 IO VCC03 31 IO_L03P_3 IO VCC03 32 IO_L03N_3 IO VCC03 33 IO_L02P_3 IO VCC03 34 IO_L02N_3 IO VCC03 35 IO_L01P_3 IO VCC03 36 IO_L01N_3 IO VCC03 37 IP_L25N_3 Input VCC03 38 IP_L04N_3 Input VCC V3 (out) Powe r 40 GND Power ARMADEUS A new vision of the embedded world 25/28

26 4 - Mechanical and Assembly drawing ARMADEUS A new vision of the embedded world 26/28

27 4.1 - Connectors and jumpers J23 J10 J3 D13 J1 J7 J22 J15 J8 J2 J21 J16 1 J19/J20 1 J4 J14 S1 J11 J17 J6 J18 S2 J9 J12 S3 D14 J13 D12 ARMADEUS A new vision of the embedded world 27/28

28 5 - References IMX27: code=i.mx27&nodeid= rh zrdr Spartan3A FPGA: MAX1027: MAX5821: TSC2101: MCP2515: SN65HVD234: AD9889: ARMADEUS A new vision of the embedded world 28/28

Kinetis K70 System-On-Module (SOM) Baseboard Hardware Architecture

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