UT54LVDM228 Quad 2x2 400 Mbps Crosspoint Switch Data Sheet September, 2015

Transcription

1 Standard Products UT54LVDM228 Quad 2x2 400 Mbps Crosspoint Switch Data Sheet September, 205 The most important thing we build is trust FEATURES Mbps low jitter fully differential data path 200MHz clock channel 3.3 V power supply 0mA LVDS output drivers Input receiver failsafe Cold sparing all pins Configurable as quad 2: mux, :2 demux, repeater or:2 signal splitter Fast propagation delay of 3.5ns max Receiver input threshold < 00 mv Operational environment; total dose irradiation testing to MIL STD883 Method 09 Totaldose: 300 krad(si) and Mrad(Si) Latchup immune (LET > 00 MeVcm 2 /mg) Packaging options: 64lead flatpack (.8 grams) Standard Microcircuit Drawing QML Q and V compliant part Compatible with TIA/EIA899 INTRODUCTION The UT54LVDM228 is a quad 2x2 crosspoint switch utilizing Low Voltage Differential Signaling (LVDS) technology for low power, high speed operation. Data paths are fully differential from input to output for low noise generation and low pulse width distortion. The nonblocking design allows connection of any input to any output or outputs on each switch. LVDS I/O enable high speed data transmission for pointto point or multidrop interconnects. This device can be used as a high speed differential crosspoint, 2: mux, :2 demux, repeater or :2 signal splitter. The mux and demux functions are useful for switching between primary and backup circuits in fault tolerant systems. The :2 signal splitter and 2: mux functions are useful for distribution of a bus across several rackmounted backplanes. The individual LVDS outputs can be put into TriState by use of the enable pins. All pins have Cold Spare buffers. These buffers will be high impedance when V DD is tied to V SS. En In In Sel En2 0 Out In2 Out In2 Sel2 0 Out 2 Out 2 Figure a. UT54LVDM228 Crosspoint Switch Block Diagram (Partial see Page 2 for complete diagram)

2 En In In Sel En2 0 Out Out In2 In2 Sel2 En3 0 Out 2 Out 2 Out3 In3 In3 Sel3 En4 0 Out3 In4 In4 Sel4 0 Out4 Out4 En5 In5 In5 Sel5 En6 0 Out5 Out5 In6 In6 Sel6 En7 0 Out6 Out6 In7 In7 Sel7 En8 0 Out7 Out7 In8 In8 Sel8 ENCK Clk In Clk In 0 Out8 Skew Match Out8 Clk Out Clk Out Figure b. UT54LVDM228 Crosspoint Switch Block Diagram 2

3 En In 2 In 3 En2 4 In2 5 In2 6 V DD 7 V SS 8 In3 9 In3 0 En3 In4 In4 En4 ENCK CLK In En7 In UT54LVDM228 Crosspoint Switch Sel Out2 Out Out Sel2 Out2 V DD V SS 56 Sel3 55 Out3 54 Out3 53 Sel4 52 Out4 5 Out4 50 V DD 49 CLK Out 48 CLK Out 47 V SS 46 Sel5 45 Out5 44 Out5 43 Sel6 42 Out6 4 Out V DD V SS Sel7 Out7 Out8 Out7 Sel8 Out8 CLK In V SS En5 In5 In5 En6 In6 In6 V DD V SS In7 In7 In8 En8 Sel Sel2 Out Out2 Mode 0 In In2 Repeater 0 In2 In Switch In2 In2 :2 splitter PIN DESCRIPTION Name # of Pins Description In 8 Noninverting LVDS input In 8 Inverting LVDS input Out 8 Noninverting LVDS output Out 8 Inverting LVDS Output En 8 A logic low on the enable puts the LVDS output into TriState and reduces the supply current ENCK A logic low on the enable puts the LVDS output into TriState and reduces the supply current Sel 8 2: mux input select V SS 6 Ground V DD 5 Power supply CLK In NonInverting Clock LVDS Input CLK In Inverting clock LVDS Input CLK Out NonInverting Clock LVDS Output CLK Out Inverting Clock LVDS Output Figure 2. UT54LVDS228 Pinout TRUTH TABLE Sel Sel2 Out Out2 Mode 0 0 In In :2 splitter 3

4 APPLICATIONS INFORMATION The UT54LVDM228 provides three modes of operation. In the :2 splitter mode, the two outputs are copies of the same single input. This is useful for distribution / fanout applications. In the repeater mode, the device operates as a 9channel LVDS buffer. Repeating the signal restores the LVDS amplitude, allowing it to drive another media segment. This allows for isolation of segments or long distance applications or buffers standard LVDS to 0mA multiop drivers.the switch mode provides a crosspoint function. This can be used in a system when primary and redundant paths are supported in a fault tolerant application. The intended application of these devices and signaling technique is for both pointtopoint baseband (single termination) and multipoint (double termination) data transmissions over controlled impedance media. The transmission media may be printedcircuit board traces, backplanes, or cables. (Note: The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media, the noise coupling to the environment, and other application specific characteristics. Input FailSafe: The UT54LVDM228 also supports OPEN, shorted and terminated input failsafe. Receiver output will be HIGH for all failsafe conditions. The outer layers of the PCB may be flooded with additional ground plane. These planes will improve shielding and isolation, as well as increase the intrinsic capacitance of the power supply plane system. Naturally, to be effective, these planes must be tied to the ground supply plane at frequent intervals with vias. Frequent via placement also improves signal integrity in signal transmission lines by providing short paths for image currents which reduces signal distortion. The planes should be pulled back from all transmission lines and component mounting pads a distance equal to the width of the widest transmission line from the internal power or ground plane(s) whichever is greater. Doing so minimizes effects on transmission line impedances and reduces unwanted parasitic capacitances at component mounting pads. Compatibility with LVDS standard: In backplane multidrop configurations, with closely spaced loads, the effective differential impedance of the line is reduced. If the mainline has been designed for 50 differential impedance, the loading effects may reduce this to the 35range depending upon spacing and capacitance load. Terminating the line with a 35load is a better match than with 50and reflections are reduced. PCB layout and Power System Bypass: Circuit board layout and stackup for the UT54LVDM228 should be designed to provide noisefree power to the device. Good layout practice also will separate high frequency or high level inputs and outputs to minimize unwanted stray noise pickup, feedback and interference. Power system performance may be greatly improved by using thin dielectrics (4 to 0 mils) for power/ground sandwiches. This increases the intrinsic capacitance of the PCB power system which improves power supply filtering, especially at high frequencies, and makes the value and placement of external bypass capacitors less critical. External bypass capacitors should include both RF ceramic and tantalum electrolytic types. RF capacitors may use values in the range 0.0F to 0. F. Tantalum capacitors may be in the range of 2.2F to 0F. Voltage rating for tantalum capacitors should be at least 5X the power supply voltage being used. It is recommended practice to use two vias at each power pin of the UT54LVDM228, as well as all RF bypass capacitor terminals. Dual vias reduce the interconnect inductance and extends the effective frequency range of the bypass components. 4

5 OPERATIONAL ENVIRONMENT PARAMETER LIMIT UNITS Total Ionizing Dose (TID).0E6 rad(si) Single Event Latchup (SEL) >00 MeVcm 2 /mg Notes:. Guarnteed but not tested. Neutron Fluence.0E3 n/cm 2 ABSOLUTE MAXIMUM RATINGS (Referenced to V SS ) SYMBOL PARAMETER LIMITS V DD DC supply voltage 0.3 to 4.0V V I/O 4 Voltage on any pin 0.3 to (V DD 0.3V) T STG Storage temperature 65 to 50C P D Maximum power dissipation Tc = 25 o C.667 W T J Maximum junction temperature 2 50C JC Thermal resistance, junctiontocase 3 5C/W I I DC input current ±0mA Notes:. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions beyond limits indicated in the operational sections of this specification is not recommended. Exposure to absolute maximum rating conditions for extended periods may affect device reliability and performance. 2. Maximum junction temperature may be increased to 75C during burnin and life test. 3. Test per MILSTD883, Method For Cold Spare mode (V DD =V SS ), V I/O may be 0.3V to the maximum recommended operating V DD 0.3V. 5. Per MILSTD883, Method 02., Section 3.4., PD = (T J (max) Tc(max) / JC. RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER LIMITS V DD Positive supply voltage 3.0 to 3.6V T C Case temperature range 55 to 25C V IN DC input voltage, receiver inputs 0 to 2.4V DC input voltage, logic inputs 0 to V DD for EN, SEL 5

6 DC ELECTRICAL CHARACTERISTICS * (V DD = 3.3V 0.3V; 55C < T C < 25C); Unless otherwise noted, Tc is per the temperature noted. SYMBOL PARAMETER CONDITION MIN MAX UNIT CMOS/TTL DC SPECIFICATIONS (EN, SEL) V IH Highlevel input voltage 2.0 V CC V V IL Lowlevel input voltage GND 0.8 V I IH Highlevel input current V IN =3.6V; V DD = 3.6V 0 0 A I IL Lowlevel input current V IN =0V; V DD = 3.6V 0 0 A V CL Input clamp voltage I CL =8mA.5 V I CS Cold Spare Leakage V IN =3.6V, V DD =V SS LVDS OUTPUT DC SPECIFICATIONS (OUT, OUT) V OD Differential Output Voltage R L = 35(see Figure 0) mv V OD Change in V OD between complimentary output states R L = mv V OS Offset Voltage R L = 35V OS =(V OH V OL ) V (see Figure 0) V OS Change in V OS between complimentary output states R L =35 35 mv I OZ Output TriState Current TriState output, V DD = 3.6V V OUT =V DD or GND 0 I CSOUT Cold Sparing Leakage Current V OUT =3.6V, V DD =V SS I OS 2,3 Output Short Circuit Current V OUT OR V OUT = 0 V 25 ma LVDS RECEIVER DC SPECIFICATIONS (IN, IN) V TH 3 Differential Input High Threshold V CM =.2V 00 mv V TL 3 Differential Input Low Threshold V CM =.2V 00 mv V CMR Common Mode Voltage Range V ID =200mV V I IN Input Current V IN = 2.4V, V DD = 3.6V 0 0 V IN = 0V, V DD = 3.6V 0 0 I CSIN Cold Sparing Leakage Current V IN =3.6V, V DD =V SS Supply Current I CCD Total Supply Current R L = 35 EN EN8, ENCK = V DD 220 ma ICCZ TriState Supply Current EN EN8, ENCK = V SS 20 ma 6

7 Notes: * For devices procured with a total ionizing dose tolerance guarantee, the postirradiation performance is guaranteed at 25 o C per MILSTD883 Method 09, Condition A up to the maximum TID level procured.. Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground. 2. Output short circuit current (I OS ) is specified as magnitude only, minus sign indicates direction only. Only one output should be shorted at a time, do not exceed maximum junction temperature specification. 3. Guaranteed by characterization. 7

8 AC SWITCHING CHARACTERISTICS* (V DD = 3.3V 0.3V, T A = 55 C to 25 C); Unless otherwise noted, Tc is per the temperature noted. SYMBOL PARAMETER Conditions MIN MAX UNIT, 2 t SET Input to SEL Setup Time (Figure 3 & 4) R L =35C L =0pf.6 ns t HOLD,2 Input to SEL Hold Time (Figure 3 & 4) R L =35C L =0pf.5 ns t SWITCH SEL to Switched Output (Figure 3 & 4) R L =35C L =0pf 3.0 ns t PHZ t PLZ Disable Time (Active to TriState) High to Z (Figure 5 & 8) Disable Time (Active to TriState) Low to Z (Figure 5 & 8) R L =35C L =0pf 4.5 ns R L =35C L =0pf 4.5 ns t PZH,4 Enable Time (TriState to Active) Z to High (Figure 5 & 8) R L =35C L =0pf EN on other channels = GND.0 ns t PZL,4 Enable Time (TriState to Active) Z to Low (Figure 5 & 8) R L =35C L =0pf EN on other channels = GND.0 ns t LHT 3 Output LowtoHigh Transition Time, 20% to 80% (Figure 5 & 6) t HLT 3 Output HightoLow Transition Time, 80% to 20% (Figure 5 & 6) R L =35C L =0pf 600 ps R L =35C L =0pf 600 ps t PLHD Propagation Low to High Delay (Figure 5 & 7) R L =35C L =0pf 3.5 ns T PHLD Propagation High to Low Delay (Figure 5 & 7) R L =35C L =0pf 3.5 ns T SKEW Pulse Skew T PHLD T PLHD (Figure 5 & 7) 900 ps T CCS Output ChanneltoChannel Skew (Figure 5 & 9) 500 ps Notes: * For devices procured with a total ionizing dose tolerance guarantee, the postirradiation performance is guaranteed at 25 o C per MILSTD883 Method 09, Condition A up to the maximum TID level procured.. Guaranteed by characterization. 2. T SET and T HOLD time specify that data must be in a stable state before and after SEL transition. 3. Guaranteed by design. 4. Max t PZH and t PZL = 4.5ns when EN or ENCL = V DD on another channel.

9 AC TIMING DIAGRAMS IN0 IN SEL OUT T SET T HOLD IN0 IN EN T SWITCH Figure 3. InputtoSelect Rising Edge Setup and Hold Times and Mux Switch Time IN0 IN SEL OUT T SET T HOLD IN IN0 EN T SWITCH Figure 4. InputtoSelect Falling Edge Setup and Hold Times and Mux Switch Time 9

10 Pulse Generator R IN R IN R D C L RL C L Figure 5. LVDS Output Load V OD 80% 80% Vdiff=(OUT) (OUT) 0V V OD 20% 20% t LHT t HLT Figure 6. LVDS Output Transition Time IN Vdiff = 0V t PLHD t PHLD OUT Vdiff = 0V Figure 7. Propagation Delay LowtoHigh and HightoLow 0

11 EN V DD /2 V DD /2 V DD OUT t PHZ t PZH V OH 50% 50% 0V Diff 50% 50% 0V Diff OUT V OL t PLZ t PZL Figure 8. Output active to TRISTATE and TRISTATE to active OUT 0 Vdiff = 0V TCCS OUT Vdiff = 0V Figure 9. Output ChanneltoChannel Skew in :2 splitter mode D IN 20pF D OUT Generator D R L = 35 V OD 50 Driver Enabled 20pF D OUT Figure 0. Driver V OD and V OS Test Circuit or Equivalent Circuit

12 PACKAGING Figure. 64pin Flatpack 2

13 ORDERING INFORMATION UT54LVDM228 Crosspoint Switch: UT 54LVDM228 * * * * * Lead Finish: (A) = Hot solder dipped (C) = Gold (X) = Factory option (gold or solder) Screening: (C) = HiRel Temperature Range flow (P) = Prototype flow Package Type: (U) = 64lead Flatpack (dualinline) Access Time: Not applicable Device Type: UT54LVDM228 Crosspoint Switch Notes:. Lead finish (A,C, or X) must be specified. 2. If an X is specified when ordering, then the part marking will match the lead finish and will be either A (solder) or C (gold). 3. Prototype flow per Aeroflex Colorado Springs Manufacturing Flows Document. Tested at 25C only. Lead finish is GOLD ONLY. Radiation neither tested nor guaranteed. 4. HiRel Temperature Range flow per Aeroflex Colorado Springs Manufacturing Flows Document. Devices are tested at 55C, room temp, and 25C. Radiation neither tested nor guaranteed. 3

14 UT54LVDM228 Crosspoint Switch: SMD ** ** * Lead Finish: (A) = Hot solder dipped (C) = Gold (X) = Factory Option (gold or solder) Case Outline: (X) = 64lead Flatpack (dualinline) Class Designator: (Q) = QML Class Q (V) = QML Class V Device Type 0 = LVDS Crosspoint Switch Drawing Number: 0537 Total Dose (R) = E5 rad(si) (F) = 3E5 rad(si) (G) = 5E5 rad(si) (H) = E6 rad(si) Federal Stock Class Designator: No Options Notes:.Lead finish (A,C, or X) must be specified. 2.If an X is specified when ordering, part marking will match the lead finish and will be either A (solder) or C (gold). 3.Total dose radiation must be specified when ordering. QML Q and QML V not available without radiation hardening. 4

15 Aeroflex Colorado Springs Datasheet Definition Advanced Datasheet Product In Development Preliminary Datasheet Shipping Prototype Datasheet Shipping QML & Reduced HiRel This product is controlled for export under the Export Administration Regulations (EAR), 5 CFR Parts A license from the Department of Commerce may be required prior to the export of this product from the United States Centennial Blvd Colorado Springs, CO E: infoams@aeroflex.com T: Aeroflex Colorado Springs Inc., dba, reserves the right to make changes to any products and services described herein at any time without notice. Consult Aeroflex or an authorized sales representative to verify that the information in this data sheet is current before using this product. Aeroflex does not assume any responsibility or liability arising out of the application or use of any product or service described herein, except as expressly agreed to in writing by Aeroflex; nor does the purchase, lease, or use of a product or service from Aeroflex convey a license under any patent rights, copyrights, trademark rights, or any other of the intellectual rights of Aeroflex or of third parties. 5

16 DATA SHEET REVISION HISTORY REV Revision Date Description of Change Author Last official release MM Page, added package weight. Applied new Cobham Data Sheet template to the document. MM 6