ICS548A-03 LOW SKEW CLOCK INVERTER AND DIVIDER. Description. Features. Block Diagram DATASHEET
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1 DATASHEET ICS548A-03 Description The ICS548A-03 is a low cost, low skew, high-performance general purpose clock designed to produce a set of one output clock, one inverted output clock, and one clock divided-by-two. Using our patented Phase-Locked Loop (PLL) techniques, the device operates from a frequency range of 10 MHz to 120 MHz in the PLL mode, and up to 160 MHz in the non-pll mode. In applications that need to maintain low phase noise in the clock tree, the non-pll (when S3=S2=1) modes should be used. This chip is not a zero delay buffer. Many applications may be able to use the ICS527 for zero delay dividers. Features Packaged in 16-pin SOIC (150 mil) Input clock up to 160 MHz in the non-pll mode Provides clock outputs of,, and /2 Low skew (500 ps) on,, and /2 All outputs can be tri-stated Entire chip can be powered down by changing one or two select pins 3.3 V operating range Available in commercial and industrial temperature ranges RoHS 5 (green) or RoHS 6 (green and lead free) compliant package Block Diagram VDD 2 GND 2 S3:S0 4 Clock input Input Buffer Clock Synthesis and Divider Circuitry /2 OE (all outputs) IDT / ICS 1 ICS548A-03 REV C
2 Pin Assignment I 1 16 DC VDD 2 15 DC VDD 3 14 DC S GND 5 12 GND 6 11 /2 S OE S0 8 9 S1,, and /2 Select Table (MHz) S3 S2 S1 S0, /2 PLL Input Range Low Low OFF Power Down Input/4 Input/8 ON Input Input/2 ON Input/2 Input/4 ON Low Low OFF Power Down Input x 2 Input ON Input/5 Input/10 ON Input/3 Input/6 ON Low Low OFF Power Down Input/4 Input/8 ON Input Input/2 ON Input/2 Input/4 ON Low Low OFF Power Down Input/6 Input/12 OFF Input/8 Input/16 OFF Input/2 Input/4 OFF 0-80 IDT / ICS 2 ICS548A-03 REV C
3 Pin Descriptions Pin Number Pin Name Pin Type External Components Pin Description 1 I Input Clock input. 2 VDD Power Connect to 3.3 V. 3 VDD Power Connect to 3.3 V. 4 S3 Input Clock Select 3. See table on page 2. 5 GND Power Connect to ground. 6 GND Power Connect to ground. 7 S2 Input Clock Select 2. See table on page 2. 8 S0 Input Clock Select 0. See table on page 2. 9 S1 Input Clock Select 1. See table on page OE Input Output Enable. Tri-states all clock outputs when low. 11 /2 Output Clock output divided by 2. See table on page Output Clock output. See table on page Output Inverted clock output. See table on page DC Don t connect. Do not connect anything to this pin. 15 DC Don t connect. Do not connect anything to this pin. 16 DC Don t connect. Do not connect anything to this pin. The ICS548A-03 requires a minimum number of external components for proper operation. Decoupling capacitors of 0.01µF should be connected between pins 3 and 5, as close to the device as possible. Connect pin 2 directly to pin 3, and pin 6 directly to pin 5. A series termination resistor of 33Ω should be used on all clock outputs, as close to the device as possible. Leave any unused clock outputs floating. There are no pull-up resistors on the input pins, and they may be connected directly to VDD or ground. IDT / ICS 3 ICS548A-03 REV C
4 Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS548A-03. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Supply Voltage, VDD (referenced to GND) All Inputs and Outputs Ambient Operating Temperature (commercial) Ambient Operating Temperature (industrial) Storage Temperature Junction Temperature Soldering Temperature Rating -0.5 V to 7 V -0.5 V to VDD+0.5 V 0 to +70 C -40 to +85 C -65 to +150 C 150 C 260 C Recommended Operation Conditions Parameter Min. Typ. Max. Units Ambient Operating Temperature (commercial) C Ambient Operating Temperature (industrial) C Power Supply Voltage (measured in respect to GND) V DC Electrical Characteristics VDD = 3.3 V, Ambient temperature -40 C to +85 C, unless stated otherwise Parameter Symbol Conditions Min. Typ. Max. Units Operating Voltage VDD V Input High Voltage V IH I only (pin 1) (VDD/2)+1 VDD/2 V Input Low Voltage V IL I only (pin 1) VDD/2 (VDD/2)-1 V Input High Voltage V IH All other inputs 2 V Input Low Voltage V IL All other inputs 0.8 V Output High Voltage, V OH I OH = -8 ma VDD-0.4 V CMOS level Output High Voltage V OH I OH = -12 ma 2.4 V Output Low Voltage V OL I OL = 12 ma 0.4 V Operating Supply IDD S3=S2=S0=0, S1=1 20 ma Current, 100 MHz clock Short Circuit Current I OS Each output ±50 ma Input Capacitance C IN All inputs 5 pf IDT / ICS 4 ICS548A-03 REV C
5 AC Electrical Characteristics VDD = 3.3 V, Ambient Temperature -40 to +85 C, unless stated otherwise Parameter Symbol Conditions Min. Typ. Max. Units Input Frequency, clock f IN MHz input, PLL on Input Frequency, clock f IN MHz input, PLL off Output Frequency (see f OUT Mode dependent MHz table on page 2) Output Clock Rise Time t OR 0.8 to 2.0 V 0.84 ns Output Clock Fall Time t OF 2.0 to 0.8 V 0.74 ns Output Clock Duty Cycle t DC At VDD/ % Output Enable Time, OE 50 ns high to output on Output Disable Time, OE 50 ns to tri-state Absolute Clock Period Deviation from mean 150 ps Jitter. PLL modes One Sigma Clock Period 60 ps Jitter, PLL modes Output clock skew for At VDD/2 850 ps,, or /2 Note 1: The phase relationship between input and output clocks can change at power up. Use the ICS570 or ICS527 Zero Delay Buffers for a guaranteed phase relationship. Thermal Characteristics Parameter Symbol Conditions Min. Typ. Max. Units Thermal Resistance Junction to θ JA Still air 120 C/W Ambient θ JA 1 m/s air flow 115 C/W θ JA 3 m/s air flow 105 C/W Thermal Resistance Junction to Case θ JC 58 C/W IDT / ICS 5 ICS548A-03 REV C
6 Package Outline and Package Dimensions (16-pin SOIC, 150 Mil. Narrow Body) Package dimensions are kept current with JEDEC Publication No Millimeters Inches INDEX AREA 1 2 D E H Symbol Min Max Min Max A A B C D E e 1.27 BASIC BASIC H h L α A h x 45 A1 - C - C e B SEATING PLANE.10 (.004) C L Ordering Information Part / Order Number Marking Shipping Packaging Package Temperature 548AM-03LF 548AM-03LF Tubes 16-pin SOIC 0 to +70 C 548AM-03LFT 548AM-03LF Tape and Reel 16-pin SOIC 0 to +70 C 548AMI-03LF 548AMI03LF Tubes 16-pin SOIC -40 to +85 C 548AMI-03LFT 548AMI03LF Tape and Reel 16-pin SOIC -40 to +85 C Parts that are ordered with a "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. IDT / ICS 6 ICS548A-03 REV C
7 Innovate with IDT and accelerate your future networks. Contact: For Sales Fax: For Tech Support <product line > <product line phone> Corporate Headquarters Integrated Device Technology, Inc Silver Creek Valley Road San Jose, CA United States (outside U.S.) Asia Pacific and Japan Integrated Device Technology Singapore (1997) Pte. Ltd. Reg. No G 435 Orchard Road #20-03 Wisma Atria Singapore Europe IDT Europe, Limited Prime House Barnett Wood Lane Leatherhead, Surrey United Kingdom KT22 7DE Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners. Printed in USA
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ICS Frequency Generator and Integrated Buffer. Integrated Circuit Systems, Inc. General Description. Applications.
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Pin Configuration and Selector Guide appear at end of data sheet. Typical Operating Circuits
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4-Mbit (512K x 8) Static RAM
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