79LV2040B. 20 Megabit (512K x 40-Bit) Low Low Voltage EEPROM MCM. Memory FEATURES: DESCRIPTION: Logic Diagram

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79LV24B 2 Megabit (512K x 4-Bit) Low Low Voltage EEPROM MCM FEATURES: 512k x 4-bit EEPROM MCM RAD-PAK radiation-hardened agait natural space radiation Total dose hardness: - >1 krad (Si) - Dependent

endurance - 1, cycles (Page Programming Mode) - 1 year data retention Page Write Mode: 128 Dword Page High Speed: - 2 and 25 maximum access times Automatic programming - 15 ms automatic Page/Dword

1 79LV24B 2 Megabit (512K x 4-Bit) Low Low Voltage EEPROM MCM FEATURES: 512k x 4-bit EEPROM MCM RAD-PAK radiation-hardened agait natural space radiation Total dose hardness: - >1 krad (Si) - Dependent upon orbit Excellent Single event 25 C - SEL > 12 MeV cm 2 /mg (Device) - SEU > 85 MeV cm 2 /mg( Cells) - SEU > 18 MeV cm 2 /mg (Write Mode) - SET > 4 MeV cm 2 /mg (Read Mode) High endurance - 1, cycles (Page Programming Mode) - 1 year data retention Page Write Mode: 128 Dword Page High Speed: - 2 and 25 maximum access times Automatic programming - 15 ms automatic Page/Dword write Low power dissipation - 1 mw/mhz active current mw standby current Logic Diagram DESCRIPTION: Maxwell Technologies 79LV24B multi-chip module (MCM) memory features a greater than 1 krad (Si) total dose tolerance, dependent upon orbit. Using Maxwell Technologies patented radiation-hardened RAD-PAK MCM packaging technology, the 79LV24B is the first radiation-hardened 2 megabit MCM EEPROM for space applicatio. The 79LV24B uses twenty 1 Megabit high speed CMOS EEPROM die to yield a 2 megabit product. The 79LV24B is capable of in-system electrical byte and page programmability. It has a 128 x 4 page programming function to make the erase and write operatio faster. It also features Data Polling and a Ready/Busy signal to indicate the completion of erase and programming operatio. In the 79LV24B, hardware data protection is provided with the RES pin, in addition to noise protection on the WE signal and write inhibit on power on and off. Software data protection is implemented using the JEDEC optional standard algorithm. Maxwell Technologies' patented RAD-PAK packaging technology incorporates radiation shielding in the microcircuit package. It eliminates the need for box shielding while providing the required radiation shielding for a lifetime in orbit or space mission. In a GEO orbit, RAD-PAK provides greater than 1 krad (Si) radiation dose tolerance. This product is available with screening up to Maxwell Technologies self-defined Class K Rev 1 1 (858) Fax: (858) Maxwell Technologies.

$1-3, 91-98, 88-81 D to D39 Data I/O 13, 14, 15, 16 CS\ - CS3\ Chip Enable 23-28, 31, 32, 78-73, 7-68 A to A16 Address Inputs 33 RES\ - Reset 34-38 WE\ - WE\4 Write Enables 66-63 RBSY\ - RBSY\3$

2 2 Megabit (512K x 4-Bit) EEPROM MCM 79LV24B PINOUT DESCRIPTION 1, 11, 21, 3, 4, 5, 51, 61, 71, 8, 9, 1 2, 12, 22, 29, 39, 49, 52, 62, 72, 79, 89, 99 VSS - Ground VCC - Positive Supply 6-53, 41-48, 1-3, 91-98, D to D39 Data I/O 13, 14, 15, 16 CS\ - CS3\ Chip Enable 23-28, 31, 32, 78-73, 7-68 A to A16 Address Inputs 33 RES\ - Reset WE\ - WE\4 Write Enables RBSY\ - RBSY\3 Ready/Busy 67 OE\ - Output Enable Rev Maxwell Technologies

3 2 Megabit (512K x 4-Bit) EEPROM MCM 79LV24B TABLE 1. 79LV24B ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL MIN TYP MAX UNIT Supply Voltage V CC V Input Voltage V IN V Package Weight RP Grams Operating Temperature Range T OPR C Storage Temperature Range T STG C 1. V IN min = -3.V for pulse width <5. TABLE 2. 79LV24B RECOMMENDED DC OPERATING CONDITIONS PARAMETER SYMBOL MIN MAX UNIT Supply Voltage V CC V Input Voltage V IL V IH V CC +.3 V V RES_PIN V H V CC -.5 V CC +1 V Operating Temperature Range T OPR C 1. V IL min = -1.V for pulse width < 5 TABLE 3. 79LV24B DELTA LIMITS 1 PARAMETER VARIATION I CC1A +/- 1 % Specified in Table 5 I CC1B +/- 1 % Specified in Table 5 I CC2A +/- 1 % Specified in Table 5 I LI - ADDR, CE, OE, WE +/- 1 % Specified in Table 5 I LI - D-D39 +/- 1 % Specified in Table 5 1. Parameters are measured and recorded as Deltas per MIL-STD-883 for Class K Devices Rev Maxwell Technologies

4 2 Megabit (512K x 4-Bit) EEPROM MCM 79LV24B TABLE 4. 79LV24B CAPACITANCE (T A = 25 C, f = 1 MHz) PARAMETER SYMBOL MIN MAX UNIT Input Capacitance : V IN = V 1 C IN OE 6 pf C IN WE 6 C IN CE -3 3 C IN A-A16 6 C IN RES 12 Output Capacitance: V OUT = V 1 C Out RDY/BSY 6 pf C O ut D-D Guaranteed by design. TABLE 5. 79LV24B DC ELECTRICAL CHARACTERISTICS (V CC = 3.3V ±1%, T A = -55 TO +125 C) PARAMETER TEST CONDITION SYMBOL SUBGROUPS MIN MAX UNITS Input Leakage Current A-A16,WE, OE Input Leakage Current CE Input Leakage Current D-D39 V IN = V CC & V I LI 1, 2, 3 2 µa V IN = V CC & V 1 ua V IN = V CC & V I LI 1, 2, 3 1 µa Output Leakage Current (V CC = 3.6V, V OUT = 3.6V/.4V) I LO 1, 2, 3 8 µa Standby V CC Current CE = ADDR=WE=OE =V CC I CC1A 1, 2, 3 64 µa CE = V IH; ADDR=WE=OE =V CC I CC1B 21 ma Operating V CC Current, Input Voltage OE = V ADDR=WE=V CC I OUT = ma, CE Duty = 1%, Cycle = 1 us at V CC = 3.6V OE =ADDR=WE=V I OUT = ma, CE Duty = 1%, Cycle = 15 at V CC =3.6V I CC2A 1, 2, 3 3 ma I CC2D 1, 2, 3 75 ma V IL V IH 1, 2, V RES_PIN V H V CC -.5 Output Voltage Data Lines: V CC Min, I OL = 2.1mA Data Lines: V CC Min, I OH = -4µA All Outputs: V CC Min, I OH = -1uA V OL V OH V OH 1, 2, V CC -.3V.4 V V V 1) For RES IIL=2uA max. 2) Only one Chip Enable Active (Logic Low) at a time. 3) RDY/BSY is an open drain output. Only V OL applies to this pin Rev Maxwell Technologies

5 2 Megabit (512K x 4-Bit) EEPROM MCM 79LV24B TABLE 6. 79LV24B AC ELECTRICAL CHARACTERISTICS FOR READ OPERATION 1 (V CC =3.3V ±1%, T A = -55 TO +125 C) PARAMETER SYMBOL SUBGROUPS MIN MAX UNIT Address Access Time CE = OE = V IL, WE = V IH t ACC 2 25 Chip Enable Access Time OE = V IL, WE = V IH t CE 2 25 Output Enable Access TIme CE = V IL, WE = V IH t OE Output Hold to Address Change CE = OE =V IL, WE = V IH t OH Output Disable to High-Z 2 CE = V IL, WE = V IH CE = OE = V IL, WE = V IH t DF t DFR RES to Output Delay CE = OE = V IL, WE = V IH 3 t RR Test conditio: input pulse levels =.4V to 2.4V; input rise and fall times < 2 ; output load = 1 TTL gate + 1 pf (including scope and jig); reference levels for measuring timing =.8 V/1.8 V. 2. t DF and t DFR are defined as the time at which the output becomes an open circuit and data is no longer driven. 3. Guaranteed by design. TABLE 7. 79LV24B AC ELECTRICAL CHARACTERISTICS FOR WRITE OPERATION (V CC = 3.3V ±1%, T A = -55 TO +125 C) PARAMETER SYMBOL SUBGROUPS MIN 1 MAX UNITS Address Setup Time -15 t AS Chip Enable to Write Setup Time (WE controlled) -15 t CS Rev Maxwell Technologies

6 2 Megabit (512K x 4-Bit) EEPROM MCM 79LV24B TABLE 7. 79LV24B AC ELECTRICAL CHARACTERISTICS FOR WRITE OPERATION (V CC = 3.3V ±1%, T A = -55 TO +125 C) PARAMETER SYMBOL SUBGROUPS MIN 1 MAX UNITS Write Pulse Width CE controlled WE controlled t CW t WP Address Hold Time t AH Data Setup Time t DS 1 15 Data Hold Time Chip Enable Hold Time (WE controlled) Write Enable to Write Setup Time (CE controlled) t DH t CH t WS 1 1 Write Enable Hold Time (CE controlled) t WH Output Enable to Write Setup Time t OES Output Enable Hold Time t OEH Write Cycle Time 2 t WC ms Data Latch Time t DL 7 75 Byte Load Window t BL 1 1 µs Byte Load Cycle t BLC µs Rev Maxwell Technologies

7 2 Megabit (512K x 4-Bit) EEPROM MCM 79LV24B TABLE 7. 79LV24B AC ELECTRICAL CHARACTERISTICS FOR WRITE OPERATION (V CC = 3.3V ±1%, T A = -55 TO +125 C) PARAMETER SYMBOL SUBGROUPS MIN 1 MAX UNITS Time to Device Busy t DB 1 12 Write Start Time 3 t DW RES to Write Setup Time t RP 1 1 µs V CC to RES Setup Time 4 t RES 1 1 µs 1. Use this device in a longer cycle than this value. 2. t WC must be longer than this value unless polling techniques or RDY/BUSY are used. This device automatically completes the internal write operation within this value. 3. Next read or write operation can be initiated after t DW if polling techniques or RDY/BUSY are used. 4. Guaranteed by design. TABLE 8. 79LV24B MODE SELECTION 1 PARAMETER CE 2 OE WE I/O RES RDY/BUSY Read V IL V IL V IH D OUT V H High-Z Standby V IH X X High-Z X High-Z Write V IL V IH V IL D IN V H High-Z > V OL Deselect V IL V IH V IH High-Z V H High-Z Write Inhibit X X V IH X X V IL X X Data Polling V IL V IL V IH Data Out 3 V H V OL Program Reset X X X High-Z V L High-Z 1. Refer to the recommended DC operating conditio. 2. For CE -3 only one CE can be used ( on ) at a time. 3. Bits 7, 15, 23, 31 and Rev Maxwell Technologies

8 2 Megabit (512K x 4-Bit) EEPROM MCM 79LV24B FIGURE 1. READ TIMING WAVEFORM FIGURE 2. BYTE WRITE TIMING WAVEFORM (1) (WE CONTROLLED) Rev Maxwell Technologies

9 2 Megabit (512K x 4-Bit) EEPROM MCM 79LV24B FIGURE 3. BYTE WRITE TIMING WAVEFORM (2) (CE CONTROLLED) FIGURE 4. PAGE WRITE TIMING WAVEFORM (1) (WE CONTROLLED) 1) A7-A16 are Page Addresses and must be the same within a Page Write Operation Rev Maxwell Technologies

10 2 Megabit (512K x 4-Bit) EEPROM MCM 79LV24B FIGURE 5. PAGE WRITE TIMING WAVEFORM (2) (CE CONTROLLED) 1 1) A7-A16 are Page Addresses and must be the same within a Page Write Operation. FIGURE 6. DATA POLLING TIMING WAVEFORM I/O 1 1) BITS 7, 15, 23, 31 AND Rev Maxwell Technologies

11 2 Megabit (512K x 4-Bit) EEPROM MCM 79LV24B FIGURE 7. SOFTWARE DATA PROTECTION TIMING WAVEFORM (1) (IN PROTECTION MODE) FIGURE 8. SOFTWARE DATA PROTECTION WAVEFORM (2) (IN NON-PROTECTION MODE) EEPROM APPLICATION NOTES This application note describes the programming procedures for the EEPROM modules and with details of various techniques to preserve data integrity. Automatic Page Write Page-mode write feature allows 1 to 128 bytes of data to be written into the EEPROM in a single write cycle. Loading the first byte of data, the data load window ope 3µs for the second byte. In the same manner each additional byte of data can be loaded within 3µs of the preceding falling edge of either WE or CE. When CE and WE are kept high for 1µs after data input, the EEPROM enters the write mode automatically and the data input is written into the EEPROM. WE, CE Pin Operation During a write cycle, addresses are latched by the falling edge of WE or CE, and data is latched by the rising edge of WE or CE Rev Maxwell Technologies

12 2 Megabit (512K x 4-Bit) EEPROM MCM 79LV24B Data Polling Data Polling function allows the status of the EEPROM to be determined. If EEPROM is set to read mode during a write cycle, an inversion of the last byte of data to be loaded outputs from I/O 7 to indicate that the EEPROM is performing a write operation. RDY/Busy Signal RDY/Busy signal also allows a comparison operation to determine the status of the EEPROM. The RDY/Busy signal goes low (V OL) after the first write signal. At the end of the write cycle, the RDY/Busy retur to a high state ( V OH ). RES Signal When RES is LOW (V L ), the EEPROM cannot be read or programmed. The EEPROM data must be protected by keeping RES low when V CC is power on and off. RES should be high (V H ) during read and programming operatio. Data Protection To protect the data during operation and power on/off, the EEPROM has the internal functio described below. 1. Data Protection agait Noise of Control Pi (CE, OE, WE) during Operation. During readout or standby, noise on the control pi may act as a trigger and turn the EEPROM to programming mode by mistake. To prevent this phenomenon, the EEPROM has a noise cancellation function that cuts noise if its width is 2 or less in programming mode. Be careful not to allow noise of a width more than 2 on the control pi Rev Maxwell Technologies

13 2 Megabit (512K x 4-Bit) EEPROM MCM 79LV24B 2. Data Protection at V CC on/off When V CC is turned on or off, noise on the control pi generated by external circuits, such as CPUs, may turn the EEPROM to programming mode by mistake. To prevent this unintentional programming, the EEPROM must be kept in unprogrammable state during V CC on/off by using a CPU reset signal to RES pin. 3. RES Signal. RES should be kept at V SS level when V CC is turned on or off. The EEPROM breaks off programming operation when RES become low, programming operation doesn t finish correctly in case that RES falls low during programming operation. RES should be kept high for 1 ms after the last data is input 15ms 4. Software Data Protection Enable. The 79LV24A contai a software controlled write protection feature that allows the user to inhibit all write operatio to the device. This is useful in protecting the device from unwanted write cycles due to uncontrollable circuit noise or inadvertent writes caused by minor bus contentio. Software data protection is enabled by writing the following data sequence to the EEPROM and allowing the write cycle period (t WC ) of 15ms to elapse: Software Data Protection Enable Sequence Address 5555 AAAA or 2AAA 5555 Data AA AA AA AA AA A A A A A Rev Maxwell Technologies

14 2 Megabit (512K x 4-Bit) EEPROM MCM 79LV24B 5. Writing to the with Software Data Protection Enabled To write to the device once Software protection is enabled, the enable sequence must precede the data to be written. This sequence allows the write to occur while at the same time keeping the software protection enabled Sequence for Writing Data with Software Protection Enabled. Address 5555 AAAA or 2AAA 5555 Write Address(s) Data AA AA AA AA AA A A A A A Normal Data Input 6. Disabling Software Protection Software data protection mode can be disabled by inputting the following 6 bytes sequence. Once the software protection sequence has been written, no data can be written to the memory until the write cycle (T WC ) has elapsed. Software Protection Disable Sequence Address 5555 AAAA or 2AAA Data AA AA AA AA AA AA AA AA AA AA AAAA or 2AAA Devices are shipped in the unprotected state, meaning that the contents of the memory can be changed as required by the user. After the software data protection is enabled, the device enters the Protect Mode where no further write commands have any effect on the memory contents Rev Maxwell Technologies

15 2 Megabit (512K x 4-Bit) EEPROM MCM 79LV24B 1 Pin Rad-Tolerant Flat Pack DIMENSIONS SYMBLOL MIN NOM MAX A b c D e.25 BSC E L Q S A b Note: All dimeio in inches. Top and Bottom of the package is internally connected to ground Rev Maxwell Technologies

16 2 Megabit (512K x 4-Bit) EEPROM MCM 79LV24B Important Notice: These data sheets are created using the chip manufacturers published specificatio. Maxwell Technologies verifies functionality by testing key parameters either by 1% testing, sample testing or characterization. The specificatio presented within these data sheets represent the latest and most accurate information available to date. However, these specificatio are subject to change without notice and Maxwell Technologies assumes no respoibility for the use of this information. Maxwell Technologies products are not authorized for use as critical components in life support devices or systems without express written approval from Maxwell Technologies. Any claim agait Maxwell Technologies must be made within 9 days from the date of shipment from Maxwell Technologies. Maxwell Technologies liability shall be limited to replacement of defective parts Rev Maxwell Technologies

17 2 Megabit (512K x 4-Bit) EEPROM MCM 79LV24B Product Ordering Optio Model Number Features Option Details 79LV24B XX Q X -XX Access Time 2 = 2 25 = 25 Screening Flow Multi Chip Module (MCM) 1 Package K = Maxwell Self-Defined Class K H = Maxwell Self-Defined Class H I = Industrial +25C, +125C) E = Engineering +25C) Q = Quad Flat Pack Radiation Features 2 RP = Rad-Pak Package RT = No Radiation Guarentee Class E and I only RT1 = 1 krad (Read/Write) RT2R = 25 krad (Read); 15 krad (Write) RT4R = 4 krad (Read); 25 krad (Write) RT6R = 6 krad (Read), 25 krad (Write) Base Product Nomenclature 2 Megabyte (512K x 4-Bit) EEPROM 1) Products are manufacturered and screened to Maxwell Technologies self-defined Class H and Class K. 2) The device will meet the specified read mode TID level, at the die level, if it is not written to during irradiation. Writing to the device during irradiation will reduce the device s TID tolerance to the specified write mode TID level. Writing to the device before irradiation does not alter the device s read mode TID level Rev Maxwell Technologies

79LV Megabit (512K x 40-Bit) Low Low Voltage EEPROM MCM. Memory DESCRIPTION: FEATURES: Logic Diagram

79LV Megabit (512K x 40-Bit) Low Low Voltage EEPROM MCM. Memory DESCRIPTION: FEATURES: Logic Diagram 79LV24 2 Megabit (512K x 4-Bit) Low Low Voltage EEPROM MCM FEATURES: 512k x 4-bit EEPROM MCM RAD-PAK radiation-hardened agait natural space radiation Total dose hardness: - >1 krad (Si) - Dependent upon