UM2032 User manual. Discovery kit with STM32F412ZG MCU. Introduction

Transcription

1 UM0 User manual Discovery kit with STMFZG MCU Introduction The FGDISCOVERY discovery kit is a complete demonstration and development platform for STMicroelectronics ARM Cortex -M core-based STMFZGT6 microcontroller. This microcontroller features four I C buses, four USART ports, five SPI ports with two multiplexed full-duplex I S buses, SDIO interface, USB OTG full-speed.0 port, two CAN buses, FMC parallel interface, two digital filters for sigma-delta modulators, PDM interface for two digital microphones, one -bit ADC, dual Quad-SPI interface, JTAG and SWD debugging support. This discovery kit offers everything required for users to get started quickly and develop applications easily. A full range of hardware features on the board helps users to evaluate on-board peripherals such as: USB OTG FS, microsd card, full-duplex I S with an audio codec and stereo jack for headset including analog microphone, DFSDM with a pair of ST-MEMS digital microphones on board, Quad-SPI Flash memory device,." TFT LCD using FMC interface with capacitive touch panel. The Arduino Uno V compatible connectors expand the functionality with a wide choice of specialized shields. The extension connectors allow easy connection of a daughterboard for specific customer applications. The integrated ST-LINK/V- provides an embedded in-circuit debugger and programmer for the STM. Figure. FGDISCOVERY (top view) Figure. FGDISCOVERY (bottom view). Pictures are not contractual. November 06 DocID09078 Rev /8

2 Contents UM0 Contents Features Demonstration software Product marking Ordering information Technology partner Hardware layout and configuration FGDISCOVERY discovery kit mechanical drawing Embedded ST-LINK/V Drivers ST-LINK/V- firmware upgrade Power supply Power supply sources STM power supply options Modification of STM voltage Supplying the FGDISCOVERY through the ST-LINK/V- USB port Programming/debugging when the power supply is not from ST-LINK/V Measurement of current IDD drawn by the microcontroller Clock source HSE clock source LSE clock source Reserved use of solder bridges Reset source Boot options Audio codec Stereo headset and headphone jack Loudspeaker output Digital microphones /8 DocID09078 Rev

3 UM0 Contents 6.0 USB OTG FS FGDISCOVERY is USB device FGDISCOVERY is USB host microsd card I C extension connector Quad-SPI NOR Flash memory Virtual COM port Arduino Uno V connectors Extension connectors P and P LCD display, backlight and touch panel LCD display LCD signal access (CN7) Backlight Touch panel Joystick and LEDs Connectors I C extension connector CN USB OTG FS Micro-AB connector CN microsd connector CN ST-LINK/V- USB Micro-B connector CN Appendix A Schematics Appendix B Federal Communications Commission (FCC) and Industry Canada (IC) Compliance Statements B. FCC Compliance Statement B.. Part B.. Part B.. Part B. IC Compliance Statement B.. Compliance Statement B.. Déclaration de conformité Appendix C CISPR C. Warning DocID09078 Rev /8

4 Contents UM0 Revision history /8 DocID09078 Rev

5 UM0 List of tables List of tables Table. Ordering information Table. Power-supply-related jumper settings Table. Boot options Table. Boot-related solder bridge and resistor settings Table. Arduino Uno V compatible connectors Table 6. Pin assignment for the extension connector P Table 7. Pin assignment for the extension connector P Table 8. Pin assignment for connector CN Table 9. Pin assignment for connector CN Table 0. Port assignment to the LED indicators Table. I C extension connector pinout CN Table. USB OTG FS Micro-AB connector CN Table. microsd connector CN Table. USB Micro-B connector CN Table. Document revision history DocID09078 Rev /8

6 List of figures UM0 List of figures Figure. FGDISCOVERY (top view) Figure. FGDISCOVERY (bottom view) Figure. Hardware block diagram Figure. FGDISCOVERY top layout Figure. FGDISCOVERY bottom layout Figure 6. FGDISCOVERY mechanical drawing Figure 7. USB composite device Figure 8. R90 and R9 resistors Figure 9. I C extension connector CN0 (front view) Figure 0. USB OTG FS Micro-AB connector CN (front view) Figure. microsd connector CN (front view) Figure. USB Micro-B connector CN6 (front view) Figure. FGDISCOVERY discovery kit Figure. FGDISCOVERY MCU Figure. FGDISCOVERY Power Figure 6. FGDISCOVERY LCD Figure 7. FGDISCOVERY Quad-SPI Figure 8. FGDISCOVERY Audio Figure 9. FGDISCOVERY Peripherals Figure 0. FGDISCOVERY USB OTG FS Figure. FGDISCOVERY extension connectors Figure. FGDISCOVERY Arduino Uno V connector Figure. FGDISCOVERY ST-LINK/V /8 DocID09078 Rev

7 UM0 Features Features STMFZGT6 microcontroller featuring Mbyte of Flash memory and 6 Kbytes of RAM in LQFP package On-board ST-LINK/V- SWD debugger, supporting USB re-enumeration capability: Virtual COM port Mass storage Debug port.-inch, 0x0-pixel TFT color LCD with parallel interface I S audio codec, with a stereo headset jack, including analog microphone input and a loudspeaker output Stereo digital ST-MEMS microphones. microsd card connector I C extension connector 8-Mbit Quad-SPI NOR Flash memory Reset button and joystick Four-color user LEDs USB OTG FS with Micro-AB connector Four options for power-supply source: ST-LINK/V- USB connector User USB FS connector VIN from Arduino Uno V connector + V from Arduino Uno V connector Two supply voltage options for STM:.0 V and. V Compatible Arduino Uno V connectors Extension connectors for direct access to various features of the STMFZGT6 Comprehensive free software including a variety of examples, part of the STMCube package Demonstration software Demonstration software is preloaded in the STMFZGT6 Flash memory. The latest version of the demonstration source code and the associated documentation can be downloaded from the webpage. DocID09078 Rev 7/8 7

8 Product marking UM0 Product marking Evaluation tools marked as "ES" or "E" are not yet qualified and therefore they are not ready to be used as reference design or in production. Any consequences deriving from such usage will not be at ST charge. In no event, ST will be liable for any customer usage of these engineering sample tools as reference design or in production. "E" or "ES" marking examples of location: On the targeted STM that is soldered on the board (for illustration of STM marking, refer to the section "Package information" of the STM datasheet available at Next to the evaluation tool ordering part number, that is stuck or silk-screen printed on the board. Ordering information To order the FGDISCOVERY discovery kit refer to Table : Table. Ordering information Order code STMFG-DISCO Target STM STMFZGT6 Technology partner MICRON: 8-Mbit Quad-SPI NOR Flash memory device, part number NQ8A 8/8 DocID09078 Rev

9 UM0 Hardware layout and configuration 6 Hardware layout and configuration The FGDISCOVERY discovery kit is designed around the STMFZGT6 (-pin TQFP package). The hardware block diagram showed in Figure, illustrates the STMFZGT6 connections with the peripherals. Figure and Figure show the location of the main components on the discovery kit. Figure. Hardware block diagram DocID09078 Rev 9/8 7

10 Hardware layout and configuration UM0 Figure. FGDISCOVERY top layout Figure. FGDISCOVERY bottom layout 0/8 DocID09078 Rev

11 A D 6 7 UM0 Hardware layout and configuration 6. FGDISCOVERY discovery kit mechanical drawing Figure 6. FGDISCOVERY mechanical drawing Embedded ST-LINK/V- ST-LINK/V- programming and debugging tool is integrated into the FGDISCOVERY discovery kit. Compared to ST-LINK/V stand-alone tool available from STMicroelectronics, ST-LINK/V- offers new features and drops some others. New features: USB software re-enumeration Virtual COM port interface on USB Mass storage interface on USB USB power management request for more than 00 ma power on USB Feature dropped: SWIM interface For all general information concerning debugging and programming features common between V and V- versions, refer to ST-LINK/V in-circuit debugger/programmer for STM8 and STM User manual (UM07) at the website. DocID09078 Rev /8 7

12 Hardware layout and configuration UM0 6.. Drivers Before connecting STMFZGT6 to a Windows XP, 7 or 8 PC via USB, a driver for ST-LINK/V- must be installed. It can be downloaded from the website. In case the FGDISCOVERY discovery kit is connected to the PC before the driver is installed, some FGDISCOVERY interfaces may be declared as "unknown" in the PC device manager. To recover from this situation the user must install the driver files, and update the driver of the connected device from the device manager (see Figure 7). Note: Prefer using the "USB Composite Device" handle for a full recovery. Figure 7. USB composite device 6.. ST-LINK/V- firmware upgrade ST-LINK/V- employs a dedicated MCU with Flash memory. Its firmware determines ST-LINK/V- functionality and performance. The firmware may evolve during the life span of the FGDISCOVERY to include new functionalities, fix bugs or support new target microcontroller families. It is therefore recommended to keep the ST-LINK/V- firmware up to date. The latest version is available from the website. 6. Power supply 6.. Power supply sources The FGDISCOVERY discovery kit is designed to be powered by the following sources: V DC from the ST-LINK/V- USB connector CN6 with 00 ma current limitation. Power mechanism of supplying the discovery kit by the ST-LINK/V- is explained in Section 6..: Supplying the FGDISCOVERY through the ST-LINK/V- USB port. A jumper should be placed in location STLK of JP, connecting pins and. The green LED LD6 is lighted on to confirm the presence of + V voltage. V DC from the user USB FS connector CN. A jumper should be placed in location USB of JP, connecting pins and 6. The green LED LD6 is lighted on to confirm the presence of + V voltage. 6 V to 9 V DC from VIN pin of Arduino Uno V compatible connector CN. The voltage is limited to 9 V to keep the temperature of the regulator U within his thermal safe /8 DocID09078 Rev

13 UM0 Hardware layout and configuration area. A jumper should be placed in location EV of jumper JP, connecting pin to pin of JP. The green LED LD6 is lighted on to confirm the presence of + V voltage. V DC from + V pin of Arduino Uno V connector (CN pin ) with limitations. The jumpers on JP and CN have to be removed, SB (NRST) and SB8 (SWO) have to be opened. In such configuration the ST-LINK/V- MCU is not powered, as consequence the 8 MHz of the ST-LINK/V- cannot be used as external input clock for the STM. For details on JP jumper setting refer to Table : Power-supply-related jumper settings. 6.. STM power supply options The FGDISCOVERY offers the possibility to supply the STM under.0 V or. V. A jumper has to be placed in location.0 V of JP to supply the STM under.0 V, then pins and are connected. Similarly the jumper has to be placed in. V to supply the STM with. V, then pins and of JP are connected. For details on JP jumper setting refer to Table : Power-supply-related jumper settings. 6.. Modification of STM voltage Regulator U6 LD7STR is dedicated to the.0 V supply. The output voltage of U6 is by default.0 V but it is adjustable depending on the resistors R90 and R9 which are by default 0 and 68 ohms respectively. The output voltage is calculated as following: VOUT = VREF ( + ( R9) ( R90) ) with VREF =. V. If necessary, resistors R90 and R9 can be changed to modify the STM supply voltage. R90 and R9 are easily located bottom side of the discovery kit near U6 (see Figure and Figure 8). DocID09078 Rev /8 7

14 Hardware layout and configuration UM0 Figure 8. R90 and R9 resistors 6.. Supplying the FGDISCOVERY through the ST-LINK/V- USB port To power the FGDISCOVERY through the ST-LINK/V-, the USB host (a PC) gets connected with the FGDISCOVERY Micro-B USB receptacle CN6, via a USB cable. This event starts the USB enumeration procedure. In its initial phase, the current supply capability of the USB port located on the host, is limited to 00 ma. It is enough because only the ST-LINK/V- part of the FGDISCOVERY discovery kit draws power at that time. If the solder bridge SB8 is open (default configuration), the U8 ST890 power switch is set to OFF position, and only the ST-LINK/V- is powered. In the next phase of the enumeration procedure, the host PC informs the ST-LINK/V- facility of its capability to supply up to 00 ma of current. If the answer is positive, the ST-LINK/V- sets the U8 ST890 switch to ON position to supply power to the remainder of the FGDISCOVERY discovery kit. If the PC USB port is not capable of supplying up to 00 ma of current, another power source should be used like VIN pin of connector CN. Should a short-circuit occur on the discovery kit, the ST890 power switch protects the USB port of the host against current demand exceeding 600 ma. In such an event, the red LED FAULT LD0 lights on. The FGDISCOVERY discovery kit can also be supplied from a USB power source not supporting enumeration, such as a USB charger. In this particular case, SB8 solder bridge must be closed. ST-LINK/V- turns the ST890 power switch ON regardless of the enumeration procedure result and passes the power unconditionally to the discovery kit. The green LED LD6 turns on whenever the discovery kit is powered. /8 DocID09078 Rev

15 UM0 Hardware layout and configuration 6.. Programming/debugging when the power supply is not from ST-LINK/V- Before connecting the USB cable from the ST-LINK/V- USB connector CN6 to the PC, it is mandatory to power the discovery kit using the user USB FS connector CN or the VIN pin of the Arduino Uno V connector CN. Proceeding this way, ensures that the enumeration succeeds thanks to the external power source. The following power sequence procedure must be respected:. Put a jumper in JP at location USB to use power from the user USB CN or at location EV to use power from VIN of Arduino Uno V connector CN.. Connect the corresponding external power source.. Check that the green LED LD6 is turned ON. Connect the PC to the ST-LINK/V- USB connector CN6 If this order is not respected, the discovery kit may be powered by VBUS first from ST- LINK/V-, and the following risks may be encountered:. If more than 00 ma current is needed by the discovery kit, the PC may be damaged or current can be limited by PC. As a consequence the discovery kit is not powered correctly.. 00 ma is requested at the enumeration. If the PC cannot provide such current there is a risk that the request is rejected and the enumeration does not succeed Measurement of current IDD drawn by the microcontroller The jumper JP7 should be closed by default to supply the STMFZGT6. To measure the current IDD drawn by the microcontroller STMFZGT6 only, remove the jumper JP7 and replace it by a multimeter (see Table ). Table. Power-supply-related jumper settings Jumper Description Default Setting FGDISCOVERY is supplied through the Micro-B ST-LINK/V- connector CN6. Jumper in STLK place. USB STLK JP FGDISCOVERY is supplied through CN Micro-AB USB FS connector. Jumper in USB place. EV USB STLK EV DocID09078 Rev /8 7

16 Hardware layout and configuration UM0 Table. Power-supply-related jumper settings (continued) Jumper Description FGDISCOVERY is supplied through the VIN pin of the Arduino Uno V compatible connector CN. Jumper in EV place. USB STLK EV JP FGDISCOVERY is supplied by + V pin of Arduino Uno V compatible connector CN (pin ) or by pins or of the extension connector P. No jumper in JP. USB STLK EV Default Setting STMFZGT6 is supplied with a +. V voltage (_MCU). +V JP STMFZGT6 STM is supplied with a +.0 V voltage (_MCU). +V +V +V Default Setting _USB power pin of STMFZGT6 is supplied with same voltage _MCU as remainder supply pins of STM. JP6 +V 6/8 DocID09078 Rev

17 UM0 Hardware layout and configuration Table. Power-supply-related jumper settings (continued) Jumper Description _USB power pin of STMFZGT6 is supplied with a fix voltage of +V independently of the remainder of supply pins of STM. JP6 Default Setting JP7 IDD is closed by default to supply the STMFZGT6 and when removed, it offers the possibility to insert an ammeter to measure the current drawn by the STM only. +V JP7 IDD DocID09078 Rev 7/8 7

18 Hardware layout and configuration UM0 6. Clock source 6.. HSE clock source By default the 8 MHz clock source is provided to the STMFZGT6 by the MCO output of the ST-LINK/V- MCU U6. In that case the solder bridge SB0 is closed, resistors R and R6 are not soldered, solder bridge SB is open. The pins PH0 and PH are not available for the extension connector P. Alternatively, the discovery kit offers the possibility to use a crystal to provide the 8 MHz HSE clock source of the STMFZGT6 U7. In that case, PH0 and PH are used as OSC_IN and OSC_OUT respectively. The solder bridges SB0, SB, SB6 must be opened, 0 ohm resistors should be soldered to R and R6 and a crystal must be soldered in place X. Regarding component selection of X, capacitors C9 and C (8. pf) are optimized for a crystal NDK NXGD 8 MHz EXS00A-CG087 and they are not fitted. The pins PH0 and PH are not available for the extension connector P. 6.. LSE clock source By default, the.768 khz crystal X is connected to pins PC-OSC_IN and PC- OSC_OUT of STMFZGT6 for the RTC clock. Solder bridges SB and SB must be open. If LSE clock is not used, it is possible to use PC-OSC_IN and PC-OSC_OUT of STMFZGT6 and to access by the extension connector P. In that case, solder bridges SB and SB must be closed and resistors R, R6 removed. 6. Reserved use of solder bridges The following solder bridges must not be changed otherwise the microcontroller STMFZGT6 U7 or other parts of the discovery kit may be damaged: Solder bridges must be left closed: SB, SB6 Solder bridges must be left open: SB7, SB 6.6 Reset source The reset signal of FGDISCOVERY discovery kit is low active and the reset sources include: Reset button B, providing solder bridge SB is closed (default setting) Embedded ST-LINK/V-, providing solder bridge SB is closed (default setting) Arduino Uno V compatible connector CN pin Extension connector P pin 6 8/8 DocID09078 Rev

19 UM0 Hardware layout and configuration 6.7 Boot options After reset, the STMFZGT6 boots from the following embedded memory locations depending on bits BOOT0 and BOOT (see Table ): User Flash memory (non-protected) System Flash memory (protected) for In Circuit Programming RAM for debugging Table. Boot options BOOT0 BOOT Boot Memory 0 X User Flash 0 System Flash RAM BOOT0 is set by the input pin BOOT0 of the STMFZGT6. Its level is set by default to 0 by closing the solder bridge SB and keeping R69 unfitted. BOOT is shared with the GPIO PB used as QSPI_CLK and is sampled by the STMFZGT6 only at RESET phase. At start-up, BOOT level depends on the resistors R0 and R00. By default R00 and R0 are not fitted on the discovery kit to avoid any influence on the QSPI_CLK signal using same pin as BOOT. The application note STM microcontroller system memory boot mode Application note (AN606) details the bootloader mechanism and configurations. Boot-related solder bridge and resistor settings are reported in Table : Table. Boot-related solder bridge and resistor settings Resistors, solder bridge Description SB Closed R69 not fitted BOOT0=0 R00 and R0 not fitted BOOT=X Default Setting Microcontroller STMFZGT6 boots from user Flash. SB Open R69 fitted (any value from 0 to 0K) BOOT0= R00 not fitted R0 fitted () BOOT=0 R00 fitted () R0 not fitted BOOT= Microcontroller STMFZGT6 boots from system Flash. R0 is a pull-down resistor on PB shared between BOOT and QSPI_CLK. Microcontroller STMFZGT6 from RAM. R00 is a pull-up resistor on PB shared between BOOT and QSPI_CLK.. To keep Quad-SPI functionality after boot-up phase, the user should select a resistor value of R00 or R0 insuring a weak pull-down or weak pull-up respectively. DocID09078 Rev 9/8 7

20 Hardware layout and configuration UM0 6.8 Audio codec A Cirrus/Wolfson codec WM899 U connected to the IS interface of the microcontroller STMFZGT6 offers possibility to connect a stereo headphone or headset with a monoanalog microphone. A loudspeaker can be connected to the extension connector. The digital audio output from the microcontroller is handled by the port of the microcontroller PB called CODEC_IS_SD while the other direction is handled by port PB called CODEC_ISext_SD. The I ² C-bus address of WM899 is 0b Stereo headset and headphone jack A stereo headphone or a stereo headset with analog microphone can be plugged into the. mm standard jack socket CN9. The stereo digital audio streamed from pin PB of the microcontroller STMFZGT6 is transformed in a stereo analog output by the codec WM899 and is delivered to the headphone or headset through the pins 6 and of the jack socket CN9. If a headset is plugged into CN9, the bias of the microphone is driven by the output MICBIAS of the codec and the analog audio enters into the codec by the pin INLN. The corresponding digital audio output from the codec is connected to the microcontroller STMFZGT6 by the port PB Loudspeaker output The FGDISCOVERY discovery kit can deliver a monophonic audio to a loudspeaker connected to pins 6 and 8 of the extension connector P. It is recommended to use the WM899 codec loudspeaker outputs SPKOUTRN and SPKOUTRP in linear mode called "class AB". This mode is compatible with -ohm to 8-ohm impedance loudspeakers. Use of the switching mode called "class D" requires to use an appropriate filter to maximize rejection of unwanted frequencies and efficiency. To select the mode "class AB" of the codec WM899, set to the bit 8 of the register 0x. 6.9 Digital microphones Two ST-MEMS MPDT0TR digital microphones U and U are available on the FGDISCOVERY discovery kit. The two microphones are located at a distance of mm each other. The microphones are connected to the DFSDM of the STM by the port PC generating the clock and by the port PB collecting the PDM interleaved data. 6.0 USB OTG FS A USB OTG full-speed communication is available at USB Micro-AB receptacle connector CN. Limitations: the USB-related operating supply voltage of STMLZGT6 (_USB line) must be within the range from.0 V to.6 V. Therefore, in case the STMFZGT6 is supplied with V by JP set in + V position, the USB of the STM works only if the _USB power pin is supplied independently by +.V. This is done by closing pins and of the jumper JP6 (refer to Table : Power-supply-related jumper settings). 0/8 DocID09078 Rev

21 UM0 Hardware layout and configuration 6.0. FGDISCOVERY is USB device When the FGDISCOVERY is USB device, the discovery kit is powered by the V of the CN USB OTG FS Micro-AB connector. In this case a jumper must be put in USB location of jumper JP and the green LEDs LD7 VBUS and LD6 PWR light on to confirm the V presence FGDISCOVERY is USB host When the FGDISCOVERY is USB host it supplies the V for the USB peripheral using one of the following sources: ST-LINK/V- USB Micro-B connector CN6, putting a jumper in STLK location of JP An external + V source connected to pins or of the extension connector P, with no jumper in JP. An external +V source connected to V pin of Arduino Uno V connector CN, with no jumper in JP. An external source between +7 to + V connected to VIN pin of Arduino Uno V connector CN, putting a jumper in EV location of JP. The green LED LD6 is lighted to confirm the presence of the + V source. The power switch STMPSSTR is controlled by the port PG8 of STM to deliver the V power to the USB device connected to the USB connector CN. It is recommended to use PG8 in open drain mode. When PG8 is closed to ground, the power switch is closed, and the green LED LD7 confirms the V to the USB Device. The red LED LD8 FAULT is lit when an overcurrent occurs. For more details refer to Section 6.: Power supply. 6. microsd card microsd cards with a capacity of Gbytes or more can be inserted in the receptacle CN. The four bits of the SDIO interface including CLK and CMD signals of the STMFZGT6 are used to communicate with the microsd card. The card detection is read by the GPIO PD: when a microsd card is inserted, the logic level is 0, otherwise it is. Note that port PC9 used as usd_d can be routed also to the pin 6 of the extension connector P, by closing the solder bridge SB for other usage like the alternate function MCO. Therefore the use of the microsd card is exclusive with MCO output. Limitations: The microsd card is not working when the STM is supplied with V. 6. I C extension connector The IC bus is available on the I C extension connector CN0. IC-SDA (port PB9) is available on pin and IC-SCL is available on pin. Pins and 7 of CN0 are the and supplying the microcontroller. IC voltage levels follows also. DocID09078 Rev /8 7

22 Hardware layout and configuration UM0 6. Quad-SPI NOR Flash memory A 8-Mbit Quad-SPI NOR Flash memory (NQ8AEF80E from MICRON) is connected to the Quad-SPI interface of the STMFZGT6 microcontroller. Note that QSPI_CLK (port PB) is sampled by the STMFZGT6 at start-up as the BOOT bit. If necessary, the user can set the BOOT state by fitting one of the resistors R00 or R0. By default R00 and R0 are not fitted. Refer to Section 6.7: Boot options for more details. Limitations: The Quad-SPI memory is not working when the STM is supplied with V. 6. Virtual COM port The serial interface USART is directly available through a USB virtual COM port of the ST-LINK/V-. The USB connector is CN6. 6. Arduino Uno V connectors CN, CN, CN and CN are female connectors compatible with Arduino Uno V standard. Most shields designed for Arduino Uno V can fit to the FGDISCOVERY discovery kit. Caution: The IOs of STM microcontroller are. V compatible instead of V for Arduino Uno V. Table. Arduino Uno V compatible connectors Left connectors Right connectors CN No. Pin No. Pin name STM pin Function Function STM pin Pin name Pin No. CN No IC_SCL PB0 D 0 - IC_SDA PB9 D A - A Ground - 7 CN Power - - Not connected SPI_SCK PA D 6 IOREF -. V SPI_MISO PA6 D NRST NRST Reset TIM_CH, SPI_MOSI PA7 D CN Digital /8 DocID09078 Rev

23 UM0 Hardware layout and configuration Table. Arduino Uno V compatible connectors (continued) Left connectors Right connectors CN No. Pin No. Pin name STM pin Function Function STM pin Pin name Pin No. CN No. +V - +. V input/output (see Note:) TIM_CH, SPI_NSS PA D0 CN Power + V - + V input/output (see Note:) TIM_CH PB8 D9 6 - Ground - PG0 D8 7 - Ground VIN - +6V to +9V power input (see Note:) - PG D TIM_CH PF D6 7 CN Analog A0 PA ADC_IN TIM_CH PF0 D 6 A PC ADC_IN - PG D A PC ADC_IN TIM_CH PF D A PC ADC_IN - PG D A 6 A PC or PB9 (see Note:) PB0 or PB0 (see Note:) ADC_IN or IC_SDA (see Note:) ADC_IN8 or IC_SCL (see Note:) USART6_TX PG D USART6_RX PG9 D0 CN Digital CN Digital Note: Note: Note: Note: Important, before using pin of CN as +.V input, insure that the solder bridge SB is removed. Otherwise the FGDISCOVERY discovery kit could be damaged by the overcurrent. The external voltage applied to pin VIN should be in the range 6 to 9V at C ambient temperature. If a higher voltage is applied, the regulator U may overheat and could be damaged. By default pin and pin 6 of connector CN are connected respectively to the port PC (ADC_IN) and BP0 (ADC_IN8) of the STM. They are enabled by the default configuration of the solder bridges: SB8 and SB6 closed, SB7 and SB opened. In case it is necessary to have an IC interface instead of ADC inputs on pins and 6 of CN, open SB8 and SB6, and close SB7 and SB. Important, before using pin of CN as + V input, insure the jumpers and solder bridges are configured according to V DC power input defined in Section 6..: Power supply sources. Otherwise the FGDISCOVERY discovery kit could be damaged by the overcurrent. DocID09078 Rev /8 7

24 Hardware layout and configuration UM0 6.6 Extension connectors P and P The extension connectors consist in male pin headers P and P (not soldered by default). They provide access to the following IPs of the STMFZGT6: SPI I C with SMBA and FM+ ( MHz speed) Full USART (Rx, Tx, RTS, CTS) CAN ADC inputs TIMERs channels I S full duplex with SD and extsd alternate functions. DFSDM input for stereo PDM digital microphones Most of the ports connected to the extension connectors P and P are the same for the F0CDISCOVERY and FEDISCOVERY discovery kits, to maximize the compatibility with the previous designs. In Table 6, Table 7 and in the FGDISCOVERY schematics (see Section Appendix A: Schematics), the pin numbers corresponding to these ports, are annotated with the star symbol: *. In Table 6, Table 7 and in the FGDISCOVERY schematics (see Section Appendix A: Schematics) the pins belonging to the extension connectors P and P annotated with a letter, are shared with a peripheral of the FGDISCOVERY (for example, S means that the port PC9 corresponding to pin 6 is also used for microsd, see Table 7). Table 6. Pin assignment for the extension connector P P odd pins P even pins Pin No. Name Note Pin No. Name Note * * _MCU * _MCU * * 6 NRST * 7 PC *A 8 PC0 * 9 PC *A 0 PC *D PA *A - - PA *V PA *V PA *A 6 PA *C 7 PA7 *A 8 PA6 *A 9 PC *A 0 PC *A PB *D PB0 *A * PF - PF A PF0 A 8 PF PF - PG C - - /8 DocID09078 Rev

25 UM0 Hardware layout and configuration Table 6. Pin assignment for the extension connector P (continued) P odd pins P even pins Pin No. Name Note Pin No. Name Note PG9 A PB0 *A PB *D 6 PB *C 7 PB * 8 PB * 9 PB * PD * PD * * 0 * Table 7. Pin assignment for the extension connector P P odd pins P even pins Pin No. Name Note Pin No. Name Note * * +V * +V * +V * 6 +V * 7 PH0 * 8 PH * 9 PC * 0 PC * PE6 * PC * PE * PE * PE * 6 PE * 7 PE0 * 8 PE * 9 PB8 *A 0 PB9 *A BOOT0 * _MCU * PB6 *TC PB7 *TC PB *C 6 PB *C PB * PD6 * PG0 A PG A PG A PG A PG A 6 SPKOUTRN SPKOUTRP - 9 PA * 0 PA *A DocID09078 Rev /8 7

26 Hardware layout and configuration UM0 Table 7. Pin assignment for the extension connector P (continued) P odd pins P even pins Pin No. Name Note Pin No. Name Note PA0 * PA * PA8 *D PC9 *S 7 PC6 * 8 PC7 *C 9 * 0 * Note: Note: The star symbol * means pin compatible with F0CDISCOVERY and FEDISCOVERY discovery kits. Meaning of the letters: A : shared with Arduino Uno V connectors, C: shared with codec, D: shared with digital microphones, V: shared with virtual COM port, T: shared with capacitive touch panel, S: shared with microsd. 6.7 LCD display, backlight and touch panel 6.7. LCD display The display is a.-inch, 0x0 pixels TFT color LCD with capacitive touch panel. It displays up to 6 K colors. The LCD parallel interface is connected to the FMC of the STMFZGT6 by the connector CN (see Table 8). To enable the data bus of the LCD display in 6-bit mode, the solder bridges SB and SB are opened and closed respectively by default. In this way the IM signal of the LCD is set to high.to use the LCD in 8-bit mode, SB must be closed and SB opened. The selection of the LCD is performed by FMC_NE (PD7), write-enable signal is FMC_NWE (PD) and read-enable is FMC_NOE (PD). The address bit A0 of the FMC (Flexible Static Memory Controller) is used to select data/command access to the LCD. The port PG should be used as an input of the microcontroller connected to the LCD signal TE (Tearing Effect). To avoid visible artifacts on the display, TE signal is used to synchronize the refresh of the LCD memory done by the microcontroller with the LCD scan. The port PD of the STMFZGT6 controls the reset of the LCD display LCD_RESET. Table 8. Pin assignment for connector CN CN pin Signal name Description STM pin involved Ground LCD_TE Tearing Effect output pin to send an interrupt to STM PG D Data connected to FMC PD0 D Data connected to FMC PD9 D Data connected to FMC PD8 6/8 DocID09078 Rev

27 UM0 Hardware layout and configuration Table 8. Pin assignment for connector CN (continued) CN pin Signal name Description STM pin involved 6 D Data connected to FMC PE 7 D Data connected to FMC PE 8 D0 Data connected to FMC PE 9 D9 Data connected to FMC PE 0 D8 Data connected to FMC PE D7 Data connected to FMC PE0 D6 Data connected to FMC PE9 D Data connected to FMC PE8 D Data connected to FMC PE7 D Data connected to FMC PD 6 D Data connected to FMC PD0 7 D Data connected to FMC PD 8 D0 Data connected to FMC PD 9 /RD Read of LCD connected to FMC_NOE PD 0 /WR Write of LCD connected to FMC_NWE PD RS Data/Command select connected to A0 PF0 /CS Chip Select of LCD connected to FMC_NE PD7 RESET LCD RESET PD IM 8-bit (low)/6-bit (high) mode selection pin n/a IOVCC LCD I/Os power supply connected to n/a 6 VCI Power supply connected to +.V n/a 7 Ground 8 LEDA Anode of backlight LED n/a 9 LEDK Cathode of backlight LED n/a 6.7. LCD signal access (CN7) CN7 is the footprint of a dual-row, through-hole, 6-pin header with. mm pitch. The header CN7 gives an easy access to the FMC signals of the LCD (see Table 9). Table 9. Pin assignment for connector CN7 CN7 odd pins Signal name CN7 even pins Signal name A0 LCD_BLCTRL FMC_NWE FMC_NE 6 FMC_NOE 7 D0 8 D DocID09078 Rev 7/8 7

28 Hardware layout and configuration UM0 Table 9. Pin assignment for connector CN7 (continued) CN7 odd pins Signal name CN7 even pins Signal name 9 D 0 +.V D LCD_TE LCD_RESET D 6 D 7 D6 8 D7 9 D8 0 D9 D0 D D D D 6 D 6.7. Backlight LEDK and LEDA signals of the LCD module are the cathode and the anode respectively of the backlight LEDs. The backlight requires a current source of typically ma capable to deliver a voltage up to 0 V. This function is handled by the backlight-driver circuit STLD0DPUR that is a switching-mode-boost converter, supplied by the + V rail of the discovery kit. The high level on the signal LCD_BLCTRL (PF) lights the backlight on. It is possible to dim the backlight intensity by applying a low-frequency PWM signal to LCD_BLCTRL ( to 0 khz) Touch panel The touch panel is a capacitive touch panel using an I C interface. The 0-pin connector CN of the touch panel is located at the bottom side of the discovery kit (see Figure : FGDISCOVERY bottom layout). The I C SDA line is connected to PB7 and the I C SCL line is connected to PB6. An interrupt output CTP_INT is connected to port PG to be used as an interruption input of the microcontroller. Port PF is the reset of the capacitive touch panel. 6.8 Joystick and LEDs The blue button B is a -direction joystick with a selection mode when pressed in the center. The logic state is high when one of the five-position switches (Left, Right, Up, Down, Selection) is pressed. The center position is connected to a wake-up pin of the microcontroller PA0. This offers the possibility to wake-up the microcontroller by pressing the center of the joystick. Four LEDs located near the Arduino Uno V connectors CN and CN are available for the user (refer to the Figure : FGDISCOVERY top layout). From left to right the user finds LD, LD, LD and LD with their colors green, orange, red and blue respectively. To light a LED a low-logic state 0 must be written in the corresponding GPIO. Table 0 gives the assignment of control ports to the LED indicators. 8/8 DocID09078 Rev

29 UM0 Hardware layout and configuration Table 0. Port assignment to the LED indicators LED Controlled by STM port Color LD PE0 Green LD PE Orange LD PE Red LD PE Blue DocID09078 Rev 9/8 7

30 Connectors UM0 7 Connectors 7. I C extension connector CN0 Figure 9. I C extension connector CN0 (front view) Table. I C extension connector pinout CN0 Pin number Description Pin number Description IC_SDA (PB9) NC 6 NC IC_SCL (PB0) 7 EXT_RESET (PF) 8 NC 7. USB OTG FS Micro-AB connector CN Figure 0. USB OTG FS Micro-AB connector CN (front view) Table. USB OTG FS Micro-AB connector CN Pin number Description Pin number Description VBUS (PA9) ID (PA0) DM (PA) DP (PA) - - 0/8 DocID09078 Rev

31 UM0 Connectors 7. microsd connector CN Figure. microsd connector CN (front view) Table. microsd connector CN Pin number Description Pin number Description SDIO_D (PC0) 6 SDIO_D (PC) 7 SDIO_D0 (PC8) SDIO_CMD (PD) 8 SDIO_D (PC9) +.V 9 SDIO_CLK (PC) 0 MicroSDcard_detect (PD) 7. ST-LINK/V- USB Micro-B connector CN6 Figure. USB Micro-B connector CN6 (front view) DocID09078 Rev /8 7

32 Connectors UM0 Table. USB Micro-B connector CN6 Pin number Description Pin number Description VBUS (power) DM,6 Shield DP - - /8 DocID09078 Rev

33 UM0 Schematics Appendix A Schematics This section provides the design schematics for the FGDISCOVERY discovery kit, to help users to implement these features in application designs. This section includes: Overall schematics for the FGDISCOVERY, see Figure STM connections, see Figure Power supply, see Figure LCD, camera and connector, see Figure 6 Quad-SPI, see Figure 7 Audio amplifier, see Figure 8 Peripherals, see Figure 9 USB OTG FS, see Figure 0 Extension connectors, see Figure Arduino Uno V connector, see Figure ST-LINK/V-, see Figure DocID09078 Rev /8 7

34 /8 DocID09078 Rev U_Arduino_ Connectors Arduino_ Connectors.SchDoc NRST ARD_A0 ARD_A ARD_A ARD_A ARD_A ARD_A ARD_D0 ARD_D ARD_D ARD_D ARD_D ARD_D ARD_D6 ARD_D7 ARD_D8 ARD_D9 ARD_D0 ARD_D ARD_D ARD_D ARD_D ARD_D U_LCD Matched Net Lengths [Tolerance = 00mil] LCD.SchDoc Impedance Constraint [Min = 0.00 Max = ] LCD_D[0..] LCD_TE LCD_RESET A0 FMC_NWE FMC_NOE FMC_NE LCD_BLCTRL CTP_INT IC_SDA CTP_RST IC_SCL U_Peripherals Peripherals.SchDoc NRST usd_detect usd_d0 usd_d usd_d usd_d usd_clk usd_cmd LED LED LED LED JOY_SEL JOY_DOWN JOY_LEFT JOY_RIGHT JOY_UP EXT_RESET IC_SDA IC_SCL U_QSPI QSPI.SchDoc QSPI_BK_IO0 QSPI_BK_IO QSPI_BK_IO QSPI_BK_IO QSPI_CLK QSPI_BK_NCS U_USB_OTG_FS USB_OTG_FS.SchDoc USB_OTGFS_DP USB_OTGFS_DM USB_OTGFS_VBUS USB_OTGFS_ID USB_OTGFS_PPWR_EN USB_OTGFS_OVRCR U_Power Power.SchDoc FMC i FMC i Figure. FGDISCOVERY discovery kit FMC FMC i i FMC i FMC i Matched Net Lengths [Tolerance = 00mil] QSPI i QSPI i QSPI i QSPI i QSPI i QSPI i U_MCU MCU.SchDoc ARD_A0 PA ARD_A PA ARD_A PA ARD_A PA ARD_A PA ARD_A PA6 ARD_D0 PA7 ARD_D PA8 ARD_D PA0 ARD_D PA ARD_D PA ARD_D PA ARD_D6 PB0 ARD_D7 PB ARD_D8 PB ARD_D9 PB ARD_D0 PB ARD_D PB6 ARD_D PB7 ARD_D PB8 ARD_D PB9 ARD_D PB0 PB PB PB PB PB D[0..] PC0 LCD_TE PC LCD_RESET PC A0 PC FMC_NWE PC FMC_NOE PC FMC_NE PC6 LCD_BLCTRL PC7 PC CTP_INT PC CTP_RST PC PD6 PD PD PE0 PE PE PE usd_detect PE usd_d0 PE usd_d PE6 usd_d PF usd_d PF usd_clk PC9 usd_cmd PF0 LED PF LED LED PF LED PG JOY_SEL JOY_DOWN JOY_LEFT PG9 JOY_RIGHT PG0 JOY_UP PG EXT_RESET PG PG PG PH0 PH BOOT0 QSPI_BK_IO0 QSPI_BK_IO QSPI_BK_IO QSPI_BK_IO CODEC_IS_SCK QSPI_CLK CODEC_IS_WS QSPI_BK_NCS CODEC_IS_SD CODEC_ISext_SD CODEC_IS_MCK CODEC_INT IC_SDA IC_SCL DFSDM_DATIN0 USB_OTGFS_DP DFSDM_DATIN USB_OTGFS_DM DFSDM_CKOUT USB_OTGFS_VBUS USB_OTGFS_ID USB_OTGFS_PPWR_EN USB_OTGFS_OVRCR SWDIO SWCLK SWO USART_TX USART_RX STLK_MCO IC_SCL IC_SDA NRST Extension_connectors.SchDoc U_Extension_connectors PA PA PA PA PA PA6 PA7 PA8 PA0 PA PA PA PB0 PB PB PB PB PB6 PB7 PB8 PB9 rev D-0 modifications: PB0 PB Silkscreen: PB - update revision of board to D top side and bottom side. PB - name of pin of connector P is NC PB - bottom side update the LCD reference: LCD ref: PB FRDBP90-CTP PC0 PC Schematic: PC - R69- connected to PC - updated CTP connector CN: pin8 is now IOVCC PC - added SB, SB, C87 connected to CN pin8 PC - remove ZZ because LCD and CTP are now same part PC6 - updated reference of LCD ZZ: FRDBP90-CTP ( now PC7 LCD+CTP) PC - added comment: CTP working with _MCU from.8 to PC.6V PC - added R0 00K to insure CTP INT is low at power-on. PD6 - removed R PD - pin6 of U6 STLINK, corrected name of power PD +V_ST_LINK PE0 - SB set: open by default PE PE rev D-0 modifications: PE - connected CN7 pin to PF PE - added two pull-up resistors to Reset of CTP one to, PE second one to +V. Not populated. PE6 PF PF PC9 PF0 PF PF PG PG9 PG0 PG PG PG PG PH0 NRST PH BOOT0 SPKOUTRP SPKOUTRN U_Audio Audio.SchDoc CODEC_IS_SCK CODEC_IS_WS SPKOUTRN CODEC_IS_SD SPKOUTRP CODEC_ISext_SD CODEC_IS_MCK CODEC_INT IC_SDA IC_SCL DFSDM_DATIN0 DFSDM_DATIN DFSDM_CKOUT U_ST_LINK_V-_ ST_LINK_V-_.SCHDOC SWDIO NRST SWCLK SWO USART_TX USART_RX STLK_MCO Note: Text in italic placed on a wire is not the net name. It just helps to identify rapidly MCU IO related to this wire. Title: MB09-TOP Project: STMFG-DISCO Size: A Reference: MB09 Revision: D-0 Date: 6/9/06 Sheet: of Schematics UM0

35 DocID09078 Rev /8 JOY_SEL ARD_A0 USART_TX USART_RX CODEC_IS_WS ARD_D ARD_D ARD_D SWO CODEC_ISext_SD CODEC_IS_SD IC_SCL IC_SDA PA0 - WKUP PA6 PA7 SB _CKIN PA8- MCO Open by default PA9 USB_OTGFS_VBUS PA0 USB_OTGFS_ID PA USB_OTGFS_DM PA USB_OTGFS_DP PA SWDIO PA SWCLK PB0 PB PB PB PB PB6 PB7 PB8 PB9 PB0 PB PB PB PB PB PA PA PA PA PA PA6 PA7 PA8 PA0 PA PA PA ARD_D0 ARD_A IC_SCL ARD_D ARD_D IC_SDA STLK_MCO PH0 Not Fitted Not Fitted PB0 PB PH PB PB PB PB6 PB7 PB8 PB9 PB0 PB PB PB PB PB PA PA PA PA PA PA6 PA7 PA8 PA0 PA PA PA PA PA PA PA PA PA PB0 R66 R67 C9 K K IC_SCL IC_SDA R R70 K K SB0 Closed by default SB Open by default R6 [N/A] C 8.pF X NXGD-8.00M 8.pF DFSDM_DATIN0 QSPI_CLK ARD_D9 CODEC_IS_SCK R [N/A] close to MCU Not Fitted SB6 Closed by default _CKIN PA0 PA PA PA PA PA PA6 PA7 PA8 PA9 PA0 PA PA PA PA PA PB0 PB PB PB PB PB PB6 PB7 PB8 PB9 PB0 PB PB PB PB PB PH0-OSC_IN PH-OSC_OUT NRST NRST _MCU C7 00nF _MCU C76 00nF 8 BOOT0 R68 0 U7A PA0-WKUP PC0 PA PC PA PC PA PC PA PC PA PC PA6 PC6 PA7 PC7 PA8 PC8 PA9 PC9 PA0 PC0 PA PC PA PC PA PC-ANTI_TAMP PA PA PC-OSC_IN PB0 PB PB PC-OSC_OUT PB PB PB PB6 PB7 PB8 PB9 PB0 PB PB PB PB PB PH0-OSC_IN PH-OSC_OUT NRST BOOT0 STMFZGT6U R69 [N/A] SB Closed by default C7 00nF C8 00nF BOOT0 C7 00nF C9 00nF PDR_ON One 00nF placed close to each _x pin of MCU C7 00nF C60 00nF C68 00nF C0 00nF Figure. FGDISCOVERY MCU PC PC R7 00K PC0 PC PC PC PC PC PC6 PC7 PC8 PC9 PC0 PC PC PC C7 00nF _MCU SB PC Open by default R6 0 R 0 SB Open by default C9.7uF A C0 uf PC PC PC PC PC PDR ON by default SB9 Open by default PC _MCU _MCU ARD_A ARD_A ARD_A ARD_A L BEAD C 00nF VREF+ PC0 / WKUP DFSDM_CKOUT PC7 close to MCU PC8 PC9 PC0 PC PC CODEC_IS_MCK SB Open by default C0.pF usd_d0 usd_d usd_d usd_d usd_clk PC NDK NXSA-.768KHZ-EXS00A-MU00 X C.pF R9 6 _USB C uf SB C7 00nF PC0 PC PC PC PC PC PC6 PC7 PC9 Closed by default SB Open by default C6 uf U7C 6 _7 _8 0 0 _0 A VREF+ USB STMFZGT6U C 00nF usd_cmd usd_detect PD6 PD PD LED LED LED LED PE DFSDM_DATIN VSS_ VSS_ VSS_6 VSS_7 VSS_8 VSS_9 VSS 0 VSS_ VSS_0 VSSA VBAT VCAP_0 VCAP_ FMC_NOE FMC_NWE FMC_NE LCD_RESET C.uF D D PD0 PD FMC_NOE FMC_NWE FMC_NE D PD8 D PD9 D PD0 LCD_RESET D0 D PD PD D PE7 D PE8 D6 PE9 D7 PE0 D8 PE D9 PE D0 PE D PE D PE Ceramic capacitor (Low ESR) PD PD PD PD PD6 PD7 PD PD PD PE0 PE PE PE PE PE PE U7B PD0 PD PD PD PD PD PD6 PD7 PD8 PD9 PD0 PD PD PD PD PD PE0 PE PE PE PE PE PE6 PE7 PE8 PE9 PE0 PE PE PE PE PE SB6 _MCU Closed by default SB7 _MCU Open by default C8.uF STMFZGT6U LCD signals access (.mm pitch) CN7 A0 LCD_BLCTRL PF FMC_NWE FMC_NE FMC_NOE 6 D0 D 7 8 D 9 0 +V D LCD_TE LCD_RESET D D 6 D6 D7 7 8 D8 D9 9 0 D0 D D D D D 6 [N/A] 0 PF0 A0 PF0 PF PF PF PF PF PF ARD_D6 PF PF ARD_D PF PF LCD_BLCTRL 8 PF6 PF6 QSPI_BK_IO 9 PF7 PF7 QSPI_BK_IO 0 PF8 PF8 QSPI_BK_IO0 PF9 PF9 QSPI_BK_IO PF0 PF0 ARD_D 9 PF PF EXT_RESET 0 PF PF CTP_RST PF PF PF PF JOY_RIGHT PF PF JOY_LEFT 6 PG0 PG0 JOY_UP 7 PG PG JOY_DOWN 87 PG PG CODEC_INT 88 PG PG 89 LCD_TE PG PG LCD_TE 90 PG PG CTP_INT 9 PG6 PG6 QSPI_BK_NCS 9 PG7 PG7 USB_OTGFS_OVRCR 9 PG8 PG8 USB_OTGFS_PPWR_EN PG9 PG9 ARD_D0 ARDUINO USART6_RX PG0 PG0 ARD_D8 6 PG PG ARD_D7 7 PG PG ARD_D 8 PG PG ARD_D 9 PG PG ARD_D ARDUINO USART6_TX PG PG PF PF PF PF PF0 PF0 PF PF PF PF PG PG PG9 PG9 PG0 PG0 PG PG PG PG PG PG PG PG PE0 PE0 PE PE PE PE PE PE PE PE PE6 PE6 D[0..] D[0..] A0 A0 Title: MCU Project: STMFG-DISCO Size: A Reference: MB09 Revision: D-0 Date: 6/9/06 Sheet: of UM0 Schematics

36 6/8 DocID09078 Rev EV UV_ST_LINK Arduino power pin VIN +V UV C7 0uF(V) JP 6 Header X U6 LD7STR Vin Vout Tab +V U LD7S0TR Vin Vout Tab Figure. FGDISCOVERY Power C 0uF R9 80 C 0uF LD6 Green U +V LD7STR +V SB Vin Vout Closed by default C6 Tab C C 0uF 0uF 00nF C8 0uF PWR EV _MCU Open solder bridge if Discovery is supplied from +V of extension connector R90 0 R9 68 VOUT = VREF ( + R9 / R90) +V VOUT = +V +/- 0mV using R90=0ohms and R9=68ohms and % tol JP JP = supply of peripherals _MCU= supply of MCU pins only Voltage selection JP8 JP JP9 IDD JP7 _MCU Jumper to measure IDD of the MCU Title: Power Project: STMFG-DISCO Size: A _USB +V JP6 _USB source selection _USB Reference: MB09 Revision: D-0 Date: 6/9/06 Sheet: of Schematics UM0

37 DocID09078 Rev 7/8 SB +V +V Closed by default 9 CN *: standard orientation. Rotations by 90, 80, 70 degrees possible by registers. LCD_TE FMARK PD0 D D PD9 DB DB PD8 D 6 D PE DB DB PE D 7 8 D0 PE DB DB0 PE D9 9 0 D8 PE DB9 DB8 PE0 D7 D6 PE9 DB7 DB6 PE8 D D PE7 DB DB PD D 6 D PD0 DB DB PD D 7 8 D0 PD DB DB0 PD FMC_NOE 9 0 FMC_NWE PD D[0..] FMC_NOE /RD /WR LCD_D[0..] PF0 A0 FMC_NE PD7 A0 RS /CS PD LCD_RESET LCD_RESET RESET IM 6 IOVCC VCI +V 7 8 LEDA LEDA LEDK 9 R LEDK Capacitive Touch Panel connector of FRDBP90-CTP 00K FH6-9S-0.SHW SB Open by default PF CTP_RST C80 00nF C87 00nF R06 [N/A] R07 [N/A] SB pixel (0,0) * Y Open by default Top side: layout of CN +V PG R98 00K Pull-down to insure CTP is in Reset at power-on Common mode supply filter L8 Not Fitted BEAD L BEAD L6 BEAD C8 C8 0uF 00nF Backlight control: ON/OFF or dimmer by low frequency ( to 0kHz typ.) PWM using TIM_CH X LCD+Touch FRIDA FRDBP90-CTP CN IOVCC RESET +V INT SDA SCL DF7NB-0DS-0.V (x) CTP_INT Pull-down to insure CTP is in Reset at power-on R0 00K FPC CTP operation: MCU operating voltage range.8 to.6v LCD_BLCTRL CN IC_SDA_CTP IC_SCL_CTP BL PF L BEAD SB7 Closed by default SB8 Closed by default VL BL C8 00nF L7 BEAD Figure 6. FGDISCOVERY LCD C78 0nF IC_SDA IC_SCL Backlight driver & PFC connector for LCD panel 0x0 pixels TFT LCD with Capaticitve Touch Panel ZZ FRDBP90-CTP SB open and SB closed = IM high: LCD in 6bits mode SB closed and SB opened = IMlow : LCD in 8bits mode LCD Operation: MCU operating voltage range.6 to.6v Layout: parts close to STLD0D and grouped in same area with BL as local ground plane C8.7uF/0V PB7 PB6 IC_SDA IC max clock: 00kHz IC_SCL +V R [N/A].7uH(A) L BL BL R0 00K Z PG SB STPSL0M U7 6 SW Vo Vi NC EN FB P Rset STLD0DPUR Closed by default R99 00K C77.7uF/0V BL R7 00K LCD_TE FMC_NWE FMC_NE IC_SDA_CTP IC_SCL_CTP R 0 BL BEAD C79 0nF SB6 Open by default SB9 Open by default L current regulated at ma +V LEDA LEDK R6 [N/A] R87 [N/A] D G S D0 D D D D D D6 D7 D8 D9 D0 D D D D D P68 D CN8 D0 D D D D D D6 D7 D8 D9 D0 D D D D D P68 VCS G TCOM G TR not fitted BSN0BK S Reserved use VSYNC TE RESETB IM IM0 DCX WRX RDX CSX IO REG VCC VREF A P MTP MOLEX 00-0 TR not fitted BSN0BK lower voltage side higher voltage side (MCU ) (CTP) IC Level shifter option (TR, TR, R6, R87 parts are not soldered) SB7 Open by default SB0 Open by default GVSS VLED- NC VLED+ Title: Project: Size: IC_SDA IC_SCL LCD A LEDK LEDA STMFG-DISCO Reference: LCD_TE LCD_RESET IM IM0 A0 FMC_NWE FMC_NOE FMC_NE C70 00nF +V PG PD PF0 PD PD PD7 C7 00nF IM IM0 P68 MB09 Revision: D-0 6/9/06 Date: Sheet: of R7 0 R 0 R8 0 UM0 Schematics

38 8/8 DocID09078 Rev QSPI_BK_NCS QSPI_CLK QSPI_BK_IO0 QSPI_BK_IO QSPI_BK_IO QSPI_BK_IO PG6 PB PF8 PF9 PF7 PF6 TP QSPI_CLK R00 R0 [N/A] [N/A] TP QSPI_BK_IO0 Figure 7. FGDISCOVERY Quad-SPI TP QSPI_BK_IO R00 and R0:pull-up and pull-down to set PB in BOOT alternate function QSPI_BK_NCS QSPI_CLK QSPI_BK_IO0 QSPI_BK_IO QSPI_BK_IO QSPI_BK_IO R7 0K U S# 6 C 7 VCC DQ0 DQ DQ/Vpp/W# DQ/HOLD# VSS 8 C7 00nF MICRON NQ8AEF80F Exposed central pad should not be connected to any voltage on PCB Title: QSPI Project: STMFG-DISCO Size: A Reference: MB09 Revision: D-0 Date: 6/9/06 Sheet: of Schematics UM0

39 DocID09078 Rev 9/8 C0 00nF 00nF C 00nF C MPDB0MM Not Fitted MPDB0MM Not Fitted Figure 8. FGDISCOVERY Audio +V +V +V8 +V8 +V8 +V8 00nF C.7uF C 00nF C6 uf C6 00nF C.7uF C 00nF C6.7uF C uf C66 PB CODEC_IS_SCK PA CODEC_IS_WS PB CODEC_IS_SD PB CODEC_ISext_SD PG CODEC_INT R8 0K U LR SB PC CLK DFSDM_CKOUT DOUT Closed by default MPDT0TR U LR CLK PB DOUT DFSDM_DATIN0 MPDT0TR mm distance between a pair of microphones SB PE DFSDM_DATIN Open by default Open this solder bridge if PE is used externally at the Extension connector DOUT CLK U R77 0K L/R C9 00nF LD98M8R +V U8 Vin Vout INH BYPASS DOUT CLK L/R U C 0nF U E9 D6 LDO A D9 E7 A A B E8 SPK A C A SPK SPK D8 C A SPK G9 H9 CP CP F E DC D D F7 DB HP D LDO F SDA R8 0K D H LDOENA SCLK D G LDOENA CS/ADDR C uf E6 A VREFC CIFMODE D MCLK C6 E DMICCLK GPIO/MCLK R9 0 G A BCLK SPKMODE R9 0 E A LRCLK REF R88 0 E DACDAT R96 0 F A7 ADCDAT MICBIAS R86 0 G B6 ADCLRCLK/GPIO MICBIAS C9 VMIDC H F9 GPIO/BCLK HPOUTN F F8 GPIO/LRCLK HPOUTP H GPIO/DACDAT E G GPIO7/ADCDAT HPOUTFB G G6 GPIO6/ADCLRCLK HPOUTR H6 HPOUTL F6 GPIO/BCLK H GPIO0/LRCLK H GPIO8/DACDAT F C GPIO9/ADCDAT LINEOUTN B LINEOUTP C9 C8 C INLP LINEOUTN D7 B INLN LINEOUTP A6 LINEOUTFB uf B8 INLP/VRXN B9 INLN/DMICDAT B SPKOUTLN C7 A INRP SPKOUTLP B7 INRN C SPKOUTRN A8 B INRP/VRXP SPKOUTRP A9 INRN/DMICDAT G8 CPCA H8 CPCB H7 CPVOUTN G7 CPVOUTP WM899ECS/R Operating range:.6<<.6v PB7 PB6 R97 [N/A] 00nF C 00nF C R79 0 R9 0 C0.7uF C6.uF C.uF C7.uF PC7 C8.7uF R80 0 IC_SDA IC_SCL CODEC_IS_MCK R78 K R6 0 CN9 6 PJ08B- SPKOUTRN SPKOUTRP Title: Audio Project: STMFG-DISCO Size: A Reference: MB09 Revision: D-0 Date: 6/9/06 Sheet: 7 of UM0 Schematics

40 0/8 DocID09078 Rev NRST MICRO SD (TF) Card SB Closed by default usd_d usd_d0 usd_d usd_d usd_clk usd_cmd usd_detect PC9 PC8 PC PC0 PC PD PD Reset Button C 00nF R9 7K R8 00K R 7K B TD-0 [RESET/Black] R 7K R8 7K CN PJS SMS06FF or SMS8FF Figure 9. FGDISCOVERY Peripherals R7 7K R6 0 SW SW LEDs LD +V Green LD Orange LD Red R 0 R 680 LD Blue R 680 R 680 IC Extension Connector B Right side Left side MT008-A IC_SDA IC_SCL The LEDs are top side COMMON Selection DOWN LEFT RIGHT UP PB9 PB0 6 R 00 PE0 PE PE PE R6 [N/A] CN F06A-*0MGF-A SSM-0-L-DH (Samtec) R [N/A] R8 [N/A] Title: Peripherals Project: STMFG-DISCO Size: A LED LED LED LED R [N/A] PF R0 [N/A] PA0 - WKUP PG PF PF PG0 EXT_RESET JOYSTICK JOY_SEL JOY_DOWN JOY_LEFT JOY_RIGHT JOY_UP Reference: MB09 Revision: D-0 Date: 6/9/06 Sheet: 6 of Schematics UM0

41 DocID09078 Rev /8 R6 7K +V PG8 R0 0 USB_OTGFS_PPWR_EN Open Drain PA9 USB_OTGFS_VBUS PA USB_OTGFS_DM PA USB_OTGFS_DP PA0 R 0 USB_OTGFS_ID B C D A B Figure 0. FGDISCOVERY USB OTG FS +V R7 7K U FAULT IN OUT EN C STMPSSTR.7uF R76 0 R7 0 D A Vbus ID C D+out D+in D D-out D-in B Dz Pd C Pup Pd D EMIF0-USB0F USB Full Speed operating range voltage:.0v<usb<.6v PG7 R8 60 LD8 Red MICROAB_N MICROAB_P USB_OTGFS_OVRCR UV R 0 CN VBUS DM DP ID 6 Shield 7 Shield 8 Shield 9 Shield 0 EXP V R 0 R 7K R0 0K USB_Micro-AB receptacle LD7 VBUS OK Green T 90-SOT transistor pins numbers follow SOT JEDEC standard, Title: USB_OTG_FS Project: STMFG-DISCO Size: A Reference: MB09 Revision: D-0 Date: 6/9/06 Sheet: 8 of UM0 Schematics

42 /8 DocID09078 Rev ADC_/WKUP SPI_MOSI/IS_SD/ADC_ SPI_MOSI/IS_SD/USART_RTS/ADC_/TIM_CH/TIM_CH IS_MCK/USART_RX/ADC_/TIM_CH/TIM_CH/TIM9_CH SPI_SCK/IS_CK/ADC_/TIM_CH/_ETR/TIM8_CHN SPI_MOSI/IS_SD/ADC_7/TIM_CHN/TIM_CH/TIM8_CHN/TIM_CH IC_SMBA/USART_RX/ADC_ SPI_NSS/IS_WS/ADC_9/TIM_CHN/TIM_CHTIM/8_CHN/DFSDM_DATIN0 SPI, SPI, SPI IC, IC with SMBA, IC FM+ MHz with SMBA USART Rx,Tx,Cts,Rts, USART6 Rx,Tx,Cts,Rts CAN, CAN ADC inputs > Timer channels IS full duplex with SD and extsd DFSDM input for stereo PDM microphones +V +V shared with HSE crystal PH0 shared with LSE crystal PC SPI_MOSI/IS_SD/SPI_MOSI/IS_SD/TIM9_CH PE6 PE shared with LED PE shared with LED PE0 SPI_MOSI/IS_SD/IC_SCL/IC_SDA/CAN_RX/TIM_CH/TIM0_CH PB8 BOOT0 IC_SCL shared with Codec and CTP PB6 PB Figure. FGDISCOVERY extension connectors TIM_CH TIM_CH USART6_RX DFSDM_clocking/IS_CKIN/IC_SDA SPI_SCK/IS_CK/SPI_SCK/IS_CK/USART_CTS/CAN_TX/TIM_CHN SPI MOSI/IS_SD/IC SCL/TIM CHN/TIM8_CHN/TIM_CH/RTC_0Hz Alternate functions available: IC_SDA/TIM_CH USART6_RTS/CAN_TX USART6_TX JTCK-SWCLK shared with USB_OTGFS_ID MCO_ IS_MCK/IC_SCL/USART6_TX/TIM_CH/TIM8_CH Not Fitted P (left side) * * _MCU * * NRST * _MCU 6 * NRST PC A PC0 PC * 7 8 * PC0 ADC_0/WKUP PC A D PC PC * 9 0 * PC SPI_MISO/ISext_SD/DFSDM-CKOUT/ADC_ PA A PA * PA V V PA PA * * PA IS_CKIN/USART_TX/ADC_/TIM_CH/TIM_CH/TIM9_CH PA A C PA PA * 6 * PA SPI_NSS/IS_WS/SPI_NSS/IS_WS/ADC_ PA7 A A PA6 PA7 * 7 8 * PA6 SPI_MISO//ADC_6/TIM_CH/TIM_CH PC A A PC PC * 9 0 * PC IS_MCK/ADC_ PB D A PB0 PB * * PB0 SPI_SCK/IS_CK/ADC_8/TIM_CHN/TIM_CH/TIM8_CHN PF * PF IC_SMBA PF A PF 6 PF0 A PF PF0 7 8 PF shared with EXT_RESET PF 9 0 PF IC_SMBA PG C PG PG9 A A PB0 PG9 * PB0 SPI_SCK/IS_CK/IS_MCK/IC_SCL/IC_SCL/USART_TX/TIM_CH PB D C PB PB * 6 * PB SPI_NSS/IS_WS/SPI_SCK/IS_CK/SPI_NSS/IS_WS/IC_SMBA/USART_RX PB PB PB * 7 8 * PB SPI MISO//ISext_SD/IC SDA/USART RTS/TIM CHN_8_CHN CH PB PB * 9 0 PD * PD PD * 6 PD USART_RTS/TIM_CH/IC_SCL 7 8 * 9 0 * PG0 PG PG PA PA0 PA8 PC6 Header X * : pin compatible with STMF0-DISCO and STMF-DISCO A : shared with Arduino connectors C : shared with CODEC D : shared with Digital microphones Not Fitted V : shared with Virtual Com Port T : shared with Capacitive Touch Panel P (right side) S : shared with MicroSD * * * * +V * 6 * +V PH0 PH * 7 8 * PH PC PC * 9 0 * PC shared with LSE crystal PE6 PC * * PC TAMP PE PE * * PE SPI_MISO/SPI_MISO/TIM9_CH PE PE * 6 * PE shared with LED PE0 PE * 7 8 * PE shared with LED PB8 A A PB9 * 9 0 * PB9 SPI_NSS/IS_WS/IC_SDA/IC_SDA/CAN_TX/TIM_CH/TIM_CH BOOT0 * * _MCU PB6 T C C T PB7 * PB PB 6 * * PB7 IC_SDA shared with Codec and CTP * C C PB PB 7 8 * PB JTDO-SWO PD6 9 0 * PD6 SPI_MOSI/_SD/USART_RX PG0 A A PG PG CAN_RX PG A A PG PG USART6_CTS PG A SPKOUTRN 6 SPKOUTRN SPKOUTRP 7 8 SPKOUTRP PA A PA * 9 0 * PA SPI_NSS/_WS/USART_TX/TIM_CH/_ETR PA0 PA * * PA JTMS-SWDIO PA8 D * S 6 * PC9 MCO_/IS_CKIN/IC_SDA /TIM_CH /TIM8_CH PC6 C PC7 * 7 8 * PC7 * 9 0 * Header X Title: Extension connectors Project: STMFG-DISCO Size: A Reference: MB09 Revision: D-0 Date: 6/9/06 Sheet: 9 of Schematics UM0

43 DocID09078 Rev /8 ADC_IN IC_SDA ADC_IN8 IC_SCL Figure. FGDISCOVERY Arduino Uno V connector ARD_A ARD_A ADC_IN ADC_IN ADC_IN ADC_IN PC PB9 PB0 PB0 NRST ARD_A0 ARD_A ARD_A ARD_A NRST SB8 Closed by default SB7 Open by default SB6 Closed by default SB Open by default PA PC PC PC +V +V VIN CN CN 6 A0 A A A A A Arduino uno connector IOREF NRST V V VIN LD9 Green POWER Header 8X_Female AIN Header 6X_Female R7 0 SB0 Closed by default CN SCL/D 0 SDA/D A SCK/D MISO/D PWM/MOSI/D PWM/CS/D0 PWM/D9 D8 D7 PWM/D6 PWM/D D PWM/D D TX/D RX/D PB0 PB9 PA PA6 PA7 PA PB8 PG0 Header 0X_Female CN PG PF PF0 PG PF PG PG PG9 Header 8X_Female ARD_D IC_SCL ARD_D IC_SDA VREF+ R7 0 C8 [N/A] ARD_D ARD_D ARD_D ARD_D0 ARD_D9 ARD_D8 ARD_D7 ARD_D6 ARD_D ARD_D ARD_D ARD_D ARD_D ARD_D0 SPI_SCK SPI_MISO TIM_CH, SPI_MOSI TIM_CH, SPI_NSS TIM_CH TIM_CH TIM_CH TIM_CH USART6_TX USART6_RX Title: Arduino Uno connector Project: STMFG-DISCO Size: A Reference: MB09 Revision: D-0 Date: 6/9/06 Sheet: 0 of UM0 Schematics

44 /8 DocID09078 Rev Open by default +V_ST_LINK R 00K C6 0pF +V_ST_LINK SB9 USART_RX C6 00nF C8 00nF C6 00nF +V_ST_LINK Board Ident: PC=0 R0 R0 R0 USB Virtual ComPort PA USART_TX R9 00K X NXGD-8.00M PA R8 00K C6 00nF C 0pF R7 [N/A] K7 K7 C67 00nF OSC_IN OSC_OUT STM_RST [N/A] R6 0 R9 0 C8 00nF +V_ST_LINK R6 0K AIN_ STLINK_TX +V_ST_LINK V_ST_LINK C7 00nF U0 8 VCCA VCCB 7 A B 6 A B DIR SN7LVCTDCUT +V D BAT60JFILM VBAT PC PC PC OSC_IN OSC_OUT /RST VSSA A PA0 PA U_TX STLINK_RX R SB8 Open by default R 00K [N/A] T_JTCK T_JTDO T_JTDI T_NRST T_JRST Figure. FGDISCOVERY ST-LINK/V- R8 00K R K7 USB ST-LINK R K7 PWR_EXT USB_RENUMn STM_JTCK _ VSS_ PB9 PB8 BOOT0 PB7 PB6 PB JNRST JTDO JTDI JTCK U_RX U_CK S_CK S_MISO S_MOSI PB0 PB PB/BOOT PB0 PB VSS CN6 USB_Micro-B receptacle CUR_SEL VBUS DM DP ID Shield Shield Shield Shield EXP EXP _ VSS_ JTMS PA PA PA0 PA9 PA8 S_MOSI S_MISO S_CK PB +V_ST_LINK U6 STLINK VUSB_ST_LINK V_ST_LINK STM_JTMS STL_USB_DP STL_USB_DM T_SWO LED_STLINK MCO PWR_ENn T_JTMS T_JTCK T_SWDIO_IN R8 K R0 0 R9 0 R89 00K EV VUSB_ST_LINK UV VUSB_ST_LINK STL_USB_DM STL_USB_DP D BAT60JFILM D BAT60JFILM D6 BAT60JFILM +V_ST_LINK C6 C9 00nF 00nF U 8 VccA VccB 7 A B T_JTDO 6 A B DIR T_SWO SB Closed by default R8 6K uf C U9 LD98MR Vin Vout INH BYPASS C 00nF Power Switch to supply +V from STLINK USB U8 IN IN R60 LD0 8 FAULT 80 R Red ON 0K ST890CDR FAULT SN7LVCTDCUT T_JTMS SWO_MCU SWD CN 6 Header 6 VUSB_ST_LINK +V_ST_LINK R Text R8 T 0K SOT USB_RENUMn transistor pins numbers follow SOT JEDEC standard, STLINK power supply OUT OUT SET R7 0K D C86 0nF C Title: ST-LINK/V- Project: STMFG-DISCO Size: A +V_ST_LINK C uf UV_ST_LINK 00nF LED_STLINK C 00nF 6 7 output current limitation : 00mA R6 K7 To use the Discovery as programmer of an external STM: - Insure the STM to programm on an external board is supplied with.v ONLY! - Remove the two jumpers on CN to left pins,,, open - Connect following pins of CN to the STM to programm: pin to SWCLK, pin to, pin to SWDIO, pin to RESET. [N/A] BAT60JFILM R R9 R R [N/A] R9 AIN_ T_JTCK T_JTMS T_NRST T_SWO DEFAULT Closed by default SB SB SB0 MCO R 00 Reference: MB09 Revision: D-0 Date: 6/9/06 Sheet: of R7 00 COM R6 0 +V_ST_LINK STLK_MCO C69 [N/A] Not Fitted SWD to MCU TCK/SWCLK PA SWCLK TMS/SWDIO PA SWDIO T_NRST Closed by default NRST SWO_MCU SB PB SWO SB8 Closed by default Jumpers ON --> DISCOVERY Selected Jumpers OFF and Solder bridge on T_SWO removed --> ST-LINK Selected SB CN Red R 6 RESERVED Open by default SB SB SB9 SB _Green LD HSMF-A0-A00J STM_JTCK STM_JTMS JP [N/A] +V_ST_LINK Schematics UM0