Computer Systems II. Memory Management" Subdividing memory to accommodate many processes. A program is loaded in main memory to be executed

Transcription

1 Computer Systems II Memory Management" Memory Management" Subdividing memory to accommodate many processes A program is loaded in main memory to be executed Memory needs to be allocated efficiently to pack as many processes into memory as possible Memory management requirements Relocation Protection

2 Relocation" The programmer doesn t know where the program will be placed in memory when it is executed Physical memory references cannot be fixed It is necessary to distinguish between logical address and physical address : Logical address generated by the CPU; also referred to as virtual address Physical address address seen by the memory unit The compiler generates logical addresses Hardware Support for Relocation"

3 Protection" User processes cannot be allowed to read or write outside their boundaries Protection must be done at runtime Programs can be loaded anywhere in memory Programs can dynamically allocate memory Check for valid addresses during address translation Verify that address is within its bound Hardware Support for Protection"

4 Relocation and Protection Exercise" ax " CPU" MMU" Limit " Relocation " " Main memory" bx " " mov ax, ()" IR " mov ax, ()" PC " " " x" " Memory Partitioning Paging"

5 Simple Paging" Memory is divided into small page frames Pages of process are loaded into frames (need not be contiguous) Less external fragmentation Small pages limit internal fragmentation Page table translates page addresses to frames Frame Main Memory Simple Paging (Example)" Load pages into empty frames Sufficient frames must exist for entire process No compaction needed (pages can be loaded into non-contiguous frames) Frame Main Memory Process A D () () Process A D () () Process A D () () Process A D () () Process B () Process B () Process B () Process B () Process B () Process B () Process C () Process C () Process C () Process C () Process D () Process D ()

6 Page Tables" One page table for each process Page table translates logical addresses to physical addresses Process B Page Frame Process C Page Frame Process D Page Frame Frame Main Memory Process A D () () Process A D () () Process A D () () Process A D () () Process B () Process B () Process B () Process B () Process B () Process B () Process C () Process C () Process C () Process C () Process D () Process D () Logical to Physical Translation" Translation done in hardware Upper N bits translated to frame number Lower M bits contain offset into page Page Number Page Offset Logical Address Page Page Table Frame Number Page Offset Frame Number Page Page Physical Address...

7 Address Translation" Page number p Page offset d Use the page # to index the page table and append the offset to the frame # Address Translation Example"

8 Virtual Memory" Problems with Memory Allocation" In simple paging all pages must be loaded Limits the number of active processes External fragmentation still possible Swapping is a time consuming process Solution: Virtual Memory Load pages only when needed Less need to swap processes out to disk Virtual memory allows the OS to load pieces only when needed (demand paging)

9 Virtual Addressing" Virtual (logical) address is mapped to a real address using a page table Size of physical address limited by memory size What limits the size of a Virtual address?? Page Number Offset Virtual Address Page table mapping Frame Number Offset Physical Address Backing Store on Disk" Pages not in main memory are stored in a dedicated swap area on disk Main Memory Pages Page table Disk Swap Area

10 Demand Paging" Only load those pages needed by process Keep a permanent store of pages on disk Allows more processes to be active Eliminates needless loading and unloading Frame Main Memory Process A () Process A () Process D () Process B () Process C () Process D () Process E () Process C () Process F () Process G () Process B () Process H () Process I () Process J () Process E () Process J () Page Table Structure" Extra control information needed Presence bit: indicates whether page is loaded Dirty bit: indicates whether page has been modified other control (I.e. protection) During address translation, if bit in page table entry is invalid page fault Frame # Presence bit page table

11 Page fault" Occurs when a process accesses a page not in memory Initial page fault processing When page is loaded: Block current process Memory Full? No Setup I/O HW to read page from disk Start a new ready process yes Evict a page from memory Page loaded? yes Update page table Mark process ready No Aside: Programming Considerations" Program structure int A[][]; Assume each row is stored in one page Program : page faults for (j = ; j < ; j++) for (i = ; i < ; i++) A[i][j] = ; Program : page faults for (i = ; i < ; i++) for (j = ; j < ; j++) A[i][j] = ;

12 Replacement Policy" Process A attempts to execute: mov (ebx), ecx Register ebx contains an address that corresponds to page of process A What happens? Frame Main Memory Process A () Process A () Process D () Process B () Process C () Process D () Process E () Process C () Process F () Process G () Process B () Process H () Process I () Process J () Process E () Process J () Replacement Policy" Most studied memory policy Goal is to replace page needed furthest in the future (minimize page faults) Policies include: Optimal: Not possible but something to try for Least recently used (LRU) First-in, first-out (FIFO) Clock: tries to approximate LRU Some pages not subject to replacement Frames are locked

13 Least-Recently-Used (LRU)" Replace the page that was referenced furthest in the past Assumes that the past reflects the future Requires an update on every reference keep the time or update the reference list Four page replacements for example Page Address Stream F F F F This Lecture" Relocation and Protection Simple Paging Virtual Memory