The Role of Storage Class Memory in Future Hardware Platforms Challenges and Opportunities

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1 The Role of Storage Class Memory in Future Hardware Platforms Challenges and Opportunities Sudhanva Gurumurthi

2 Multicore Processors Intel Nehalem AMD Phenom IBM POWER6 Future processors are expected to have even more cores 2

3 Data-Centric Computing Store and process massive datasets Concurrent accesses from many users Traditional Application Domains Emerging Application Domains Image Source: P. Dubey, Teraflops for the Masses: Killer Apps of Tomorrow, EDGE Workshop, May

4 Data Keeps Growing 1 exabyte = bytes Source: IDC Whitepaper, The Expanding Digital Universe, March

5 Multicore Processors Data-Intensive Applications Need a High-Performance Memory and Storage System 5

6 Memory Capacity Wall Source: Lim et al., ISCA Memory capacity/core dropping 30% every two years. 6

7 Normalized Performance Jan-09 Jan-08 Jan-07 Jan-06 Jan-05 Jan-04 Jan-03 Jan-02 Jan-01 Jan-00 Jan-99 Jan-98 Jan-97 Jan-96 Normalized CPU Performance Normalized Media Access Time for 20K Read Media Access Time for 20K Read Multicore CPU CPU Disk Source: Frank Hady (Intel), WISH 2009 talk. Source: Intel measurements 7

8 Promise of Storage Class Memory (SCM) Non-Volatile Low power consumption Fast access times Between DRAM and Disk High density Multi-Level Cells (MLC) 8

9 SCM Technologies SanDisk/Toshiba NAND Flash Memory Trinh et al., ISSCC 2009 STM/Intel Phase Change Memory (PCM) Bedeschi et al., ISSCC

10 Key SCM Challenges Erase before write requirement (Flash) Inefficient in-place writes Asymmetry between read/write and erase granularities (Flash) Limited endurance (Flash, PCM) Reliability and security implications Suitable abstractions for software 10

11 SCM Translation Layer Hide the idiosyncrasies of a SCM Logical-to-physical block map Wear-leveling algorithms Cleaning algorithms Translation layer design has a significant impact on performance, lifetime, and capacity utilization Complexity of the design is a function of the SCM and its intended use 11

12 Understanding Physical SCM Characteristics Important for developing accurate architecture level models of performance, power, and reliability Datasheets are inadequate SCM characterization studies Flash [Boboila et al., FAST 2010; Grupp et al., MICRO 2009] Architecture level modeling tools PCRAMSim [Sun et al., ICCAD 2009] FlashPower [Mohan et al., DATE 2010] 12

13 Using SCM as Universal Memory PCM, MRAM, and STTRAM could be used at different layers of the memory hierarchy Large power and capacity benefits Main memory [Qureshi et al., ISCA 09; Lee et al., ISCA 09; Zhou et al., ISCA 09] Last-Level Caches [Sun et al., HPCA 09] Challenges: Latency, endurance Need to develop circuit and architecture level techniques to make them truly universal memory 13

14 The Non-Volatility Property Traditional memory hierarchies are volatile above the storage layers. SCMs blur distinction between memory and storage Implications for both hardware and software Example: BPFS Filesystem [Condit et al., SOSP 09] How could we exploit non-volatility for architecture optimizations? 14

15 Rotating Disks Won t Go Away! High Cost/GB compared to Hard Disk Drives (HDDs) Flash: $3.58/GB HDD: 38 /GB SSDs unlikely to displace HDDs in data centers Use HDDs for capacity and SSDs for performance The entire storage system needs to be energy proportional Energy consumption should scale with the I/O load HDDs are not energy proportional Source: Computerworld Storage, Seagate plans SSD, 2TB hard drive for next year, May 30,

16 Tiered Storage Architecture SSD Tier: Hot Data Energy Proportional HDDs: Warm Data Conventional HDDs: Cold Data 16

17 Energy Proportional HDDs Multi-RPM/DRPM Disks [Gurumurthi et al., ISCA 03] Intradisk Parallelism [Sankar et al., ISCA 08] Develop techniques for optimal system configuration and for data placement and migration between the tiers. Sensitivity-based optimization [Zhang et al., DAC 07; Sankar et al., MASCOTS 08] Heads per Arm [H=1] Surface [S=1] Arm Assemblies per Disk [A=2] Disks [D=1] Multi-actuator Parallel HDD 17

18 Conclusions Storage class memory is an exciting technology for future computing platforms Benefits in terms of performance, power, and enabling new functionality Several challenges to overcome for their widespread adoption. Promising solutions are on the horizon. Opportunity for collaboration between computer architects and systems software designers. 18

19 Thank You