User s Manual. PCIe-FRM11 User s Manual (Rev 1.4)
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1 PCIe-FRM11 User s Manual Windows, Windows2000, Windows NT and Windows XP are trademarks of Microsoft. We acknowledge that the trademarks or service names of all other organizations mentioned in this document as their own property. Information furnished by DAQ system is believed to be accurate and reliable. However, no responsibility is assumed by DAQ system for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or copyrights of DAQ system. The information in this document is subject to change without notice and no part of this document may be copied or reproduced without the prior written consent. Copyrights 2008 DAQ system, All rights reserved
2 -- Contents Introduction 2. PCIe-FRM11 Functions 3. PCIe-FRM11 Board Description 3.1 PCB Layout 3.2 Description of the functional blocks 3.3 Connector Pin-out 4. Installation 4.1 Package content 4.2 Installation Sequence 5. Sample Program 5.1 FrmTest Program Functions related to Image Frame Functions related to DIO Functions related to UART Functions related to CC 5.2 FRM11_TEST Program 6. Test 6.1 Image Frame Test 6.2 UART Tx/Rx Test 6.3 DIO Input/Output Test Appendix A.1 General Specification A.2 Physical Dimension Reference -2-
3 1. Introduction The PCIe-FRM11 is a board having the function of processing the frame data received from Cameralink camera and saving the image frame data in the system s main memory. In addition, it has the 8 digital Inputs and 8 digital outputs for external controls. The operation of the board is controlled by program API, figure [1-1] shows connection of the system (usually PC). [Figure 1-1. PCIe-FRM11 board Usage] As shown in Figure [1-1], the PCIe-FRM11 is inserted into any available PCI Express slot in your PC. It receives Image Frame from camera via Camera-Link Standard Interface. And, received data transmit to the API through PCI Express x1 interface
4 [Figure 1-2. Picture of PCIe-FRM11 board] Figure [1-2] shows physical connection of the board to the Camera-Link Camera. At the left side, there are 15 pin D-SUB connector and 26 pin MDR connector. The former is for connection to external I/O device, and the other is for connection to Camera-link camera for frame data or UART communication. And, mini-circular connector supply to the power for a camera
5 [Features of the PCIe-FRM11 board] Base Configuration Camera Link Interface CC1/CC2 Trigger PCI Express 1x interface PCI Bus Master Operation Receiving 24/16/8bit Frame data UART Tx/Rx (8 bit data, 1 start, 1 stop, No parity, 9600bps) 8-bit Digital Input and 8-bit Digital Output Windows 2000 SP4 or Windows XP SP1 above Convenient Windows Application Programming Interface(DLL) [Application] Image Acquisition (Pattern, Particles etc.) Inspection Equipment (Sensor, Semiconductor, Device etc.) Security Solution (Surveillance Camera) Medical Image Capture (X-Ray, Supersonic) -5-
6 2. PCIe-FRM11 Functions As shown in the following figure, main control of the board is performed in FPGA Core Logic. Primary functions are receiving the image frame data, transmitting/receiving UART data and controlling 8 bit digital inputs, and 8 bit digital outputs. However, it supports 5 bit digital inputs and 8 bit digital outputs for external interface with Dsub15 port. [Figure 2-1. Functional Block Diagram] -6-
7 You can control these functions using API provided by DAQ system. PCI BUS PCIe-FRM11 INTERNAL BLOCK - FPGA Local Bus Address Data(Mem,I/O) Local BUS PCI Target / Master Reserved (0x00 0x5F) BUS Mux UART (0x60) MEM Decoder IO Decoder To each IO Module Reserved (0x70 0xAF) DPRAM CLOCK syn. Interrupt Controller (0xb0) Interrupt controller Camera Link(LVDS) (0xC0) DIO (0xD0) Reserved (0xE0 0xFF) Ext. Address, Data, Control From Ext. INT sources in Chip MEM Decoder [Figure 2-2. FPGA Block Diagram] The core logic program of the FPGA is loaded by JTAG. It saves a program at the FPGA Program Logic and loads when power-up. PCIe-FRM11 supports Camera Link Base Configuration. Base Configuration consists of 4 LVDS signal lines that serialize 28 bit parallel signals including 24 data bits and 4 enable signals Frame Valid, Line Valid, Data Valid, and a spare, and one LVDS signal line to synchronize with camera, Asynchronous serial communication for communicating with the camera, including four CC (Camera Control) signals. All 11 LVDS signal lines, including two LVDS lines, are transmitted over the MDR cable. The transmitted signal is deserialized through the Channel Link chip in the PCIe-FRM11 into four image LVDS serial signals into a 28-bit parallel video signal and control signals (Frame Valid, Line -7-
8 Valid, Data Valid, and a spare). In addition, a clock signal is generated by one LVDS to synchronize the signal between the camera and the PCIe-FRM11, and the remaining camera control signals and communication signals are converted into a general TTL signal level. Camera Control CCx+ The above picture shows the camera control output circuit that can send the control signal from the PCIe-FRM11 board to the camera via the camera-link cable. All four digital outputs are output through Differential method. Each output is mapped to a digital output and output. Each bit position is shown in [Figure 2-3] below. CC_D0 CC1+ CC_D1 CC2+ CC_D2 CC3+ CC_D3 CC4+ CCx- CC1- CC2- CC3- CC4- [Figure 2-3. Camera Control LVDS Digital Circuit] The figure below shows a circuit that uses the serial input signal input through the camera-link cable as a general input on the PCIe-FRM11 board. [Figure 2-4. Serial Communication LVDS Digital Circuit] -8-
9 3. PCIe-FRM11 Board Description In this chapter, the primary functions of the PCIe-FRM11 board are described briefly. For more information, refer to the device specification. 3.1 PCB Layout [Figure 3-1. PCIe-FRM11 PCB Layout] The board has five LEDs to indicate the operation status. - LED1 turns on when the board wakes up. - LED2 turns on when the board resets. - LED3 turns on when the board receives the image frame data via Camera Link. - LED4 turns on when the board transmits the received data to your PC. - LED5 turns on when power is applied to the board and the initialization ends up
10 3.2 Description of the functional blocks (1) U1 : Differential Line Receiver Camera Control Signal (CC1 ~ CC4). [See Figure 2-3.] (2) U2 : I2C Serial EEPROM U6 PCI Express Chipset Configuration (3) U3 : Differential Line Driver/Receiver Serial Communication between Camera and Frame Grabber. [See Figure 2-3.] (4) U4 : LVDS Receive Image frame through LVDS interface. UART signal Receive/Transmit through LVDS interface. Camera Control Digital Output. (5) U5 : FPGA All of the board functions are controlled by the Logic program of the FPGA. (6) U6 : PCI Express Chipset PCI Express Bridge. (7) U8, U9 : Regulator It supplies the power used by the board. (8) Photo-coupler Isolated I/O : PC1 ~ PC4 This block is for controlling isolated I/O circuit with external device
11 3.3 Connector Pin-out The PCIe-FRM11 board is equipped with MDR 26 Pin connector J1 for Camera Link connection and D-SUB 15 Pin connector J2 for external I/O connection and Mini-Circular connector for external power supply. Figure [3-2] shows the bracket of the board where J1 and J2 connector exist. [Figure 3-2. PCIe-FRM11 Front View]
12 [J1(MDR26) connector] [Figure 4-3] shows the board s J1 connector pin-map. All of the pin functions are based on the Camera link standard, so please refer to the Camera link standard document for more description and information. Frame Grabber Inner shield Inner shield X X0+ X X1+ X X2+ Xclk Xclk+ X X3+ SerTC SerTC- SerTFG SerTFG+ CC CC1+ CC CC2- CC CC3+ CC CC4- Inner shield 14 1 Inner shield [Figure 3-3. PCIe-FRM11 J1 Connector Pin-out] [Table 1. J1 Connector Description] Pin# Signal Name Description Remark 1 Inner Shield Cable shield 2 CC4- Camera Control output 4- Refer to Figure CC3+ Camera Control output 3+ Refer to Figure CC2-- Camera Control output 2- Refer to Figure CC1+ Camera Control output 1+ Refer to Figure SerTFG+ Serial to Frame grabber + 7 SerTC- Serial to Camera- 8 X3+ Camera link LVDS receive data
13 9 Xclk+ Camera link LVDS receive clock + 10 X2+ Camera link LVDS receive data X1+ Camera link LVDS receive data X0+ Camera link LVDS receive data Inner Shield 14 Inner Shield 15 CC4+ Camera Control output 4+ Refer to Figure CC3- Camera Control output 3- Refer to Figure CC2+ Camera Control output 2+ Refer to Figure CC1- Camera Control output 1- Refer to Figure SerTFG- Serial to Frame grabber- 20 SerTC+ Serial to Camera+ 21 X3- Camera link LVDS receive data3-22 Xclk- Camera link LVDS receive clock - 23 X2- Camera link LVDS receive data2-24 X1- Camera link LVDS receive data1-25 X0- Camera link LVDS receive data0-26 Inner Shield (Note) For more information, refer to Camera Link Standard Specification
14 [Description of J5 connector] PCIe-FRM11 Board has six photo-coupler isolated digital inputs and four equivalent outputs. Each is available from J5 connector. The equivalent circuit is as shown Figure [3-5]. VCC INx 2.4K DINx IN_COM < Photo coupler input> VCC OUTx 22 OUT_COM DOUTx <Photo coupler output> [Figure 3-5. Photo-coupler Input/Output Circuit] The input resistance is 2.4K ohms thus the flow current is about 5mA when 12V input is applied and about 10mA when 24V power applied. Maximum operation input voltage is from 9V to max 24V. The output current is limited by output resistance, the output resistance is 22 ohms. Continuous output current has to be used under 10mA. The user can change the Input/Output resistance for special operation. The pin map of the connector is shown below [Figure 3-6. J5 2x13, 2.53 pitch pin-out]
15 [Table 2. J5 Connector Description] Pin# Signal Name Description Remark 1 DIN0 Input 0 2 DIN4 Input 4 3 DIN1 Input 1 4 DIN5 Input 5 5 DIN2 Input 2 6 DIN6 Input 6 7 DIN3 Input 3 8 DIN7 Input 7 9 DIN_COM Input Common 10 DIN_COM Input Common 11 DOUT0 Output 0 12 DOUT4 Output 4 13 DOUT1 Output 1 14 DOUT5 Output 5 15 DOUT2 Output 2 16 DOUT6 Output 6 17 DOUT3 Output 3 18 DOUT7 Output 7 19 DOUT_COM Output Common 20 DOUT_COM Output Common 21 N.C Not Connect 22 N.C Not Connect 23 GND Ground 24 GND Ground V 3.3V Power V 3.3V Power
16 [Description of D-Sub15 connector] The PCIe-FRM11 board has five digital inputs isolated by a photo-coupler, and eight digital outputs can be connected to the D-Sub15 connector on the board via a J5 connector. The pin map of the Dsub- 15 connector is shown below. Figure [3-7] shows the D-Sub15 connector pin-map. OUT_COM OUT5 OUT2 IN_COM IN OUT6 OUT7 OUT3 OUT4 OUT0 OUT1 IN3 IN4 IN0 IN1 [Figure 3-7. D-SUB 15PIN pin-out] [Table 3. D-Sub15 Connector Description] Pin# Signal Name Description Remark 1 IN0 Input 0 2 IN3 Input 3 3 OUT0 Output 0 4 OUT3 Output 3 5 OUT6 Output 6 6 IN1 Input 1 7 IN4 Input 4 8 OUT1 Output 1 9 OUT4 Output 4 10 OUT7 Output 7 11 IN2 Input2 12 IN_COM Input Common 13 OUT2 Output 2 14 OUT5 Output 5 15 OUT_COM Output Common
17 [Photo-coupler Digital Input] [Figure 3-8. Photo-coupler Digital Input circuit] Photo-coupler inputs are routed from connector P1 (DSUB 15Pin), each inputs are matched with DIO input bit position from 4 to 0 as shown in Figure [3-8]
18 [Photo-coupler Digital Output] [Figure 3-9. Photo-coupler Digital Output Circuit] Photo-coupler outputs are routed to connector P1 (DSUB 15PIN), each outputs are matched with DIO output bit position from 7 to 0 as shown in Figure [3-9]
19 [Description of Mini-Circular connector] PCIe-FRM11 has a six pin mini-circular connector to supply DC12 for external camera. Maximum current is 1A, but need another power supply in case of over 1A. [Figure Mini-Circular Connector pin-out] [Table 4. Mini-circular Connector Description] Pin# Signal Name Description Remark 1 GND Power and Board Ground 2 +12V Output +12V Max. 1A 3 Unused 4 Unused 5 Unused 6 Unused
20 [Description of SW1] PCIe-FRM11 board is designed of four maximum PCIe-FRM11 boards at the same time so as usable. Distribution of each board sets it up through 4 pin switch (SW1) in a board. [Figure SW1 pin-out] [Table 5. SW1 Description] 1 2 Description OFF OFF Board No. 0 ON OFF Board No. 1 OFF On Board No. 2 On ON Board No. 3 [J4 Connector (2Pin Header, 2.54mm)] used. 3.3V external DC power connector. It is a power source for FPGA installation and is not normally [JP3 Connector] JP3 is a Joint Test Action Group (JTAG) connector used to update the board's FPGA program. Do not use it when operating the board normally
21 4. Installation 4.1 Package contents In addition to the user s Manual, the package includes the following items. If any of these items is missing or damaged, contact DAQ system. - PCIe-FRM11 board - CDROM (drivers/manual/api/samples etc.) After unpacking, inspect the board carton to make sure there are no damages on the board. 4.2 Installation Sequence To install your PCIe-FRM11 board in your PC, follow the steps described in the document How to install PCI DAQ Board provided by DAQ System. If the document is missing, you can get it from The PCIe-FRM11 board is completely Plug & Play. There are no switches or jumpers to set. Therefore you can install it easily. - Your OS requirement : Windows 2000 SP4 or Windows XP SP1 above The PCIe-FRM11 connects to Express Card Port. After that you can show the below picture of New Hardware Search Wizard window. If new hardware is found, Wizard will ask you to install the corresponding driver. For installation of the driver, select the item Install from a list or specific location (Advanced) and
22 click Next as in the figure
23 If the installation is completely finished, you confirm it in the following ways. Do the following steps to show up the Device Manager window. [My Computer -> properties -> Hardware -> Device Manager -> Multifunction Adaptors -> PCIe-FRM11] [Figure 4-1. Select My computer -> Properties ]
24 [Figure 4-2. System Properties window- Hardware Tab]
25 [Figure 4-3. Device Manager window] If you can see the PCIe-FRM11 at Multifunction Adaptors, the driver installation is to have been over. (Check the red circle) Important Notice : After installation, you should re-boot the system for the proper operation
26 5. Sample Program. DAQ system provides a sample program to make the user be familiar with the board operation and to make the program development easier. You can find the sample program in the CDROM accompanying with the board. One of the execution file is FrmTest.exe. It stores the frame data to memory or hard-disk and displays it to Hexa-decimal values which can utilize necessary frame data to developers. The other is FRM11_TEST.exe. This programs sets the DVAL or HVAL for valid data line. Sample program is provided in source form in order to show the usage of API(Application Programming Interface) of the board and may be modified for customer s own usage. 5.1 FrmTest Program [Figure 5-1. When Sample program FrmTest.exe is executed]
27 To run the sample application program, you need to use API, it is a form of client DLL. To compile the sample source to make its executable file, you have to use Import Library files and header files. You can find them in the CDROM. To run the.exe file, the API DLL file (PCI_FRM11.DLL) must be in the same directory with the.exe file or Windows system folder. Another method is to add the directory of API DLL file to PATH environmental variable. [Figure 5-1] Execution sequence for sample program as shown below Device Init click Start click Get Info. Video Data Bits after select of mode 8Bit, 16Bit YUV, 24Bit Select" Set Detected "and then select the screen size selected in" Set Resolution ". Frame View show only one screen Auto check show continuous screen Functions related to Image Frame (1) Set Resolution Set Detected Selection It is selected according to the input resolution. The user can set the resolution is 640 x 480, 800 x 600, 1024 x 768, 1280 x 720, 1280x1024, 1600 x 1200, 1920 x 1080, 1920 x 1200, 2048 x1536, 2560 x (2) Board # selection Select a board number which set up the system. (#0 ~ #3) (3) Device Init button Press this button to initialize the function of receiving image frame data. It is performed only once after power is applied to the board. (4) Start button Press this button to begin to save image data. (5) Get Info button Displays the current error message and the resolution of the actual pixel frequency and image. Error message 0: OK, Bit 0 : PCLK error, Bit 1 : HSYNC error, Bit 2 : VSYNC error (6) Get Size button Displays the resolution of the image currently set to Set Detected. (7) F/R It shows the Frame Rate
28 (8) FRAME Read button Press this button to read the image frame data of the board to your PC. If image frame data is not saved on the board, you must wait until the end of data collection. [Figure 5-2. When Frame Read is executed] (9) Save Data button It is used to save the frame image data read to PC as file (*.bin). You can select the folder to save. By default it is set to D: \ SAVE folder. (10) Video Frame Mode selection Select Video Frame Mode from Progressive or Interlace. (Not used) (11) Video Data Bits selection You can select Video Input Mode 8bit, 16bit YUV, 24bit BGR. (12) Shift Bits 0 ~ 8bit Shifts the image file to the right by the selected bit
29 (13) Frame View button When you click, the screen displays only once. (14) Auto View click When you click, the screen shows video. (15) R_B Swap click Converts the color of the image. (Red <-> Blue) (16) Auto Save click Saves the image to the selected JPEG or BMP file in the folder specified by Select Folder. JPEG storage is not supported on 64bit OS. The Save Count below shows the number of stored frames. (17) Close Device button Press this button to finish usage of the board and terminate the program Functions related to DIO (1) DIO Read button Press this button to read the data on General Purpose I/O port. Reading Data are recorded the editor box beside the button (2) DIO Write button Press this button to write the data on General Purpose I/O port. You can directly write the data in the editor box beside the button. Note) When f000 is written, it becomes CC alternate output. If it is 0, it becomes Digital Out. bit0 (CC1 configure) = "0": digital out1 / "1": alternate (Trigger1 output) bit1 (CC2 configure) = "0": digital out2 / "1": alternate (Trigger2 output) bit2 (CC3 configure) = "0": digital out3 / "1": Reserved bit3 (CC4 configure) = "0": digital out4 / "1": Reserved Functions related to UART (1) UART_Init button Initialize UART related functions. Initialize only once when power is first applied
30 (2) Baud Rate Selection The speed of the UART can be selected from 9600, 19200, 38400, 57600, and bps. (3) Send Data button Transmits data to the UART. After writing the data to be transferred in the editor box, press the button (4) Get Data button The UART data transmitted from the camera to the PCIe-FRM11 is read. (5) Hex Display selection Show UART data as Hex value. (6) Clear Data button Clears the UART data recorded in the editor box. (7) UART Close button It is called when the board is used and the program is terminated Functions related to CC (1) CC Configure selection The camera control signal line can be selected from CC1 ~ CC4 with Camera Option. (CC3 and CC4 are not used at present.) (2) CC_Out button CC Output the CC value of the selected bit in Configure. 1 ": output" 1 ": output" 0 " 1 ": output" 1 ": output" 0 " bit2 (CC3 out) = reserved bit3 (CC4 out) = reserved (3) Configure Trigger button Set Trigger Delay, Width, and Blank for Trigger # 1 (CC1) and Trigger # 2 (CC2). Delay & Width: 0 ~ Blank: 0 ~ The total settable frequency is f = 1 / T 1 / (( ) * 15 ns) = 0.25 Hz
31 When the default setting Delay / Width / Blank is set to 0/0/0, it is output as 16.6Mhz because it is 60ns ( ) in total. When the setting value increases by 1 as shown in the figure below, The value is increased by 15 ns. Trigger Clock Delay Width Blank Trigger Clock Delay Width Blank Increasing the Width increases the width of the pulse and increases the Delay, Blank. For example, if you want to use the trigger clock for CC1 or CC2 at 5000hz, select CC from the "CC Cfg" button and set Delay / Width / Blank as shown below. Pulse Width = 3000 x 15ns = 45us Pulse Delay + Blank = ( ) x 15ns = 154.5us
32 45us Trigger Clock 154.5us (4) Inv. CC button Inverts the pulse of the selected CC1 or CC2 Trigger. Normal Invert
33 5.2 FRM11_TEST [Figure 5-3. When Sample program FRM11_TEST.exe is executed] This programs sets the DVAL or HVAL for valid data line. DVAL Use : DVAL(Data Valid) Use HVAL Use : HVAL(Frame Valid) Use
34 6. Test 6.1 Image Frame Test In this chapter, the functional test will be explained to discriminate board mal-functions and for the user being familiar with the operation of the board. It is performed using the sample program FrmTest.exe on PC equipped with the PCIe-FRM11 board. Photo coupler Interface Circuit Image Frame Simulator PCIe-FRM11 BOARD Camera Link [Figure 6-1. Equipment Connection for Testing] Figure [6-1] shows connection of the equipments. Although the PCIe-FRM11 is shown outside the PC in this figure, but actually it is located in a PCI slot inside the PC. The image frame data is generated in the Image Frame Simulator made by DAQ System. If you have real camera or a frame source, you can use it. At this connected state, turn the all power on and execute test program ( FrmTest.exe ) on the PC. Follow the steps to test the function of receiving image frame data
35 Step 1. : Press the LVDS init button to initialize the LVDS circuit and then press the Start button to save Image Frame data. Step 2 : Press the Frame Read button. Then data are displayed on editor box. Compare the contents of the editor box with the data of the Image Frame Simulator. Comparison can be performed using the Save to button. It saves the contents of the editor box to a file. 6.2 UART Tx/Rx Test At the above stage, make the image frame simulator to send UART data to PCIe-FRM11 board periodically. Step 1 : Press the UART init button to initialize the UART and then press the Start Timer to get the UART data from the Image Frame Simulator. Then the gotten data are displayed on the editor box below the button. Compare the contents of the editor box with the data of the Image Frame Simulator. Step 2 : Write the data to the editor box beside the Send Serial Data button and press the Send Serial Data button to send it to the Image Frame Simulator via the UART. Compare the data on the editor box with that of the Image Frame Simulator. 6.3 DIO Input/Output test Continue the test from the previous stage. Step 1 : Step 2 : After to make all the output port 1 using DIO Write function of the test program, check the output state using the oscilloscope. To check photo-coupler output, you have to prepare some external circuit. Using DIO read function, read out each input state. To make some activation of the photocoupler input, you need to prepare some external circuit
36 Appendix A.1 General Specification Specification General PCI Local Bus Specification Revision 1.0 PCI Express 1x Interface PCI Target and Master operation Camera Link interface specification Interface +5V Single Power operation, Max 300mA under Basic camera link operation 8 Digital Input(Photo-coupler) 8 Digital Output(Photo-coupler) Receiving 24/16/8-bit image frame data CC1/CC2 Trigger Functions Transmit Image Frame Data to PC 9600/19200/38400/57600/115200bps UART Tx/Rx 8 Digital Input/12 Digital Output Software Supported OS API Sample Software Windows 2000 SP4 above/ Windows XP SP1 above Interface with Application through client DLL Test Sample software for evaluation
37 A.2 Physical Dimension P1 68 J
38 References 1. Specification of Camera Link Interface Standard for Digital Cameras and Frame Grabbers -- Camera Link committee 2. PCI Local Bus Specification Revision PCI Special Interest Group 3. How to install PCI DAQ Board -- DAQ system 4. AN201 How to build application using API -- DAQ system 5. AN312 PCIe-FRM11 API Programming -- DAQ system
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