XMC-FRM01. User s Manual

Transcription

1 XMC-FRM01 User s Manual Windows, Windows2000, Windows NT and Windows XP are trademarks of Microsoft. We acknowledge that the trademarks or service names of all other organizations mentioned in this document as their own property. Information furnished by DAQ system is believed to be accurate and reliable. However, no responsibility is assumed by DAQ system for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or copyrights of DAQ system. The information in this document is subject to change without notice and no part of this document may be copied or reproduced without the prior written consent. Copyrights 2005 DAQ system, All rights reserved

2 -- Contents Introduction 2. XMC-FRM Function Description 2.2 Main Connector Pin out P1 Connector P2 Connector 3. Installation 3.1 Package content 3.2 Installation Sequence 4. Sample Program 4.1 Functions related to Image Frame 4.2 Functions related to DIO 4.3 Functions related to Save Appendix A.1 Physical Dimension -2-

3 XMC XMC-FRM01 User s Manual(Rev 1.0) 1. Introduction In case of XMC-FRM01, FPGA Core Logic is in charge of overall control. Main functions include frame data reception, LVDS data reception, serial communication, video simultaneous display and storage. Camera Link Receiver Camera Link LVDS LVDS Receiver FPGA PCI Bridge External 7 Differential Serial RS-232 x5 RS-422 x2 RS-232/RS-422 Tranceiver External JPEG Codec [Figure 1. XMC-FRM01 Block Diagram] [XMC-FRM01 Features] PCI Express 1x Interface Camera Link (800x600x60 Frame) RGB 24bit data LVDS (640x480x30 Frame) Gray 24bit data Serial Communication (RS232 x5, RS-422 x2) Video display and save(jpeg2000, XviD) -3-

4 2. XMC-FRM Function Description FPGA Core Logic is responsible for overall control. The program of the FPGA core logic is done using JTAG, and the logic program is stored in FPGA Logic and loaded when power is turned on. U8 J1 U12 U16 U14 U18 P1 MRIN-GRABBER V1.1 U2 U19 P2 U1 U7 Y1 U11 U10 Y2 J2 U17 U20 U21 U22 U23 U24 U25 U26 U13 [Figure 2. XMC-FRM01 Outline Drawing] (1) FPGA : U10 All functions of the board are controlled through this FPGA Logic. (2) CAMERA LINK : U16 It receives an camera Link image frame. (3) LVDS : U8 It receives Low Voltage Differential image signal. (4) Serial Communication : U20, U21, U22, U23, U24, U25, U26 It performs serial communication. (5) JPEG : U7, U11 JPEG 2000 codec chip

5 (6) Oscillator : Y1, Y2 Y1 uses SCO MHz and Y2 uses Mhz.. (7) Regulator : U1, U2, U13 It provides 1.0V / 1.8V / 3.3V power supply for the board.. (8) Connector : P1, P2 XMC-FRM02 I / O connector Main Connector Pin-out P1 connector It is an input / output connector that provides PCI Express x1 signal line. (Part No. : ASP (ASP ) [Table 1. P1 Connector Description] Pin# Name Description Pin# Name Description 1 PET0 Lane 0 Transmit + 58 PET1 Lane 1 Transmit + 2 GND Ground 59 GND Ground 3 N.C No Connection 60 N.C No Connection 4 GND Ground 61 GND Ground 5 N.C No Connection 62 N.C No Connection 6 GND Ground 63 GND Ground 7 N.C No Connection 64 N.C No Connection 8 GND Ground 65 GND Ground 9 N.C No Connection 66 N.C No Connection -5-

6 10 GND Ground 67 GND Ground 11 PER0 Lane 0 Receive + 68 PER1 Lane 1 Receive + 12 GND Ground 69 GND Ground 13 N.C No Connection 70 N.C No Connection 14 GND Ground 71 GND Ground 15 N.C No Connection 72 N.C No Connection 16 GND Ground 73 GND Ground 17 N,C No Connection 74 N,C No Connection 18 GND Ground 75 GND Ground 19 PE_CLK Reference Clock + 76 XMC_WAKE# Wake Up 20 PET0# Lane 0 Transmit - 77 PET1# Lane 1 Transmit + 21 GND Ground 78 GND Ground 22 N.C No Connection 79 N.C No Connection 23 GND Ground 80 GND Ground 24 N.C No Connection 81 N.C No Connection 25 GND Ground 82 GND Ground 26 N.C No Connection 83 N.C No Connection 27 GND Ground 84 GND Ground 28 N.C No Connection 85 N.C No Connection 29 GND Ground 86 GND Ground 30 PER0# Lane 0 Receive - 87 PER1# Lane 1 Receive - 31 GND Ground 88 GND Ground 32 N.C No Connection 89 N.C No Connection 33 GND Ground 90 GND Ground 34 N.C No Connection 91 N.C No Connection 35 GND Ground 92 GND Ground 36 N,C No Connection 93 N,C No Connection 37 GND Ground 94 GND Ground 38 PE_CLK# Reference Clock - 95 XMC_ROOT# Check Card Connection V 3.3V Power 96 5V 5V Power 40 N,C No Connection 97 MRSTI# Reset V 3.3V Power 98 5V 5V Power 42 N,C No Connection 99 MRSTO# V 3.3V Power 100 5V 5V Power 44 N,C No Connection 101 XMC_12V 12V Power -6-

7 45 3.3V 3.3V Power 102 5V 5V Power 46 N,C No Connection 103 N.C No Connection 47 N.C No Connection 104 N.C No Connection 48 N,C No Connection 105 N.C No Connection 49 MBIST# 106 5V 5V Power 50 N,C No Connection 107 GND Ground 51 N.C No Connection 108 5V 5V Power 52 N,C No Connection 109 N.C No Connection 53 N.C No Connection 110 5V 5V Power 54 MVMRO 111 N.C No Connection 55 N,C No Connection 112 N.C No Connection 56 N,C No Connection 113 N.C No Connection 57 N,C No Connection 114 N.C No Connection P2 connector It is mainly an input / output connector that provides camera link, LVDS signal, and serial communication signal line. It uses 1.0mm Free Height (FH) Receptacle Connectors with SMT (Surface Mount Technology). (Part No. : ) [Table 2. P2 Connector Description] Pin# Name Description Pin# Name Description 1 GND Ground 2 GND Ground 3 CL_RXD0P Camera Link + Data 4 CL_RXD1P Camera Link + Data 5 CL_RXD0N Camera Link - Data 6 CL_RXD1N Camera Link - Data 7 GND Ground 8 GND Ground 9 CL_RXD2P Camera Link + Data 10 CL_RXD3P Camera Link + Data 11 CL_RXD2N Camera Link - Data 12 CL_RXD3N Camera Link - Data 13 GND Ground 14 GND Ground 15 CL_RCLKP Camera Link + Clock 16 SerTFG_P Serial to Frame grabber + 17 CL_RCLKN Camera Link - Clock 18 SerTFG_N Serial to Frame -7-

8 grabber - 19 GND Ground 20 GND Ground 21 N.C No Connection 22 SerTC_P Serial to Camera + 23 N.C No Connection 24 SerTC_N Serial to Camera - 25 GND Ground 26 GND Ground 27 CV_RXDP FPD Link + Data 28 N.C No Connection 29 CV_RXDN FPD Link - Data 30 N.C No Connection 31 GND Ground 32 GND Ground 33 C1_TXD RS-232 Transmit Data 34 C1_RXD RS-232 Receive Data 35 C2_TXD RS-232 Transmit Data 36 C2_RXD RS-232 Receive Data 37 GND Ground 38 GND Ground 39 C3_TXD RS-232 Transmit Data 40 C3_RXD RS-232 Receive Data 41 C4_TXD RS-232 Transmit Data 42 C4_RXD RS-232 Receive Data 43 GND Ground 44 GND Ground 45 C5_TXD RS-232 Transmit Data 46 C5_RXD RS-232 Receive Data 47 N.C No Connection 48 N.C No Connection 49 GND Ground 50 GND Ground 51 C8_TXDP RS-422 Transmit + 52 C7_RXDP RS-422 Receive + Data Data 53 C8_TXDN RS-422 Transmit 54 C7_RXDN RS-422 Receive Datal Data 55 GND Ground 56 GND Ground 58 C7_TXDP RS-422 Transmit + 58 C8_RXDP RS-422 Receive + Data Data 59 C7_TXDN RS-422 Transmit 60 C8_RXDN RS-422 Receive Data Data 61 GND Ground 62 GND Ground 63 N.C No Connection 64 N.C No Connection -8-

9 3. Installation Before installing the board, make sure that the package contents are correct Package Content Product Contents 1. XMC-FRM01 Board 2. CD (Driver/Manual/API/Sample source etc.) 3.2 Installation Sequence The board should be used in Windows 2000 SP4 or later, or Windows XP SP1 or later. First turn off the PC, plug the XMC-FRM01 board into the PCI Express daughter board, and turn on the PC. When the "Start New Hardware Wizard" window opens as shown below, select the following and click the Next button -9-

10 Select the following, and then click the Next button. Select the XMC_FRM01 board driver from the enclosed CD and click the Next button

11 In the middle of the installation, I get a "Windows XP Compatibility Check" question, but click the Continue button.. It indicates that the installation processor is proceeding as shown below

12 When the "Completing the Found New Hardware Wizard" window appears, click the Finish button. When the installation is complete, check that the driver is installed normally as follows. In My Computer -> Properties -> Hardware -> Device Manager

13 Multi-function adapter -> Check if "PCIe-FRM09" is installed. If you see the picture below, the installation is done normally. The figure shows a screen where the XMC-FRM01 board is normally installed in the PC. (Check the red circle) After initial installation, it is recommended to reboot the PC for normal operation

14 4. Sample Program The TestApp folder on the CDROM supplied with the board provides a sample program "FrmTest" for easy use of the board. First, "FrmTest.exe" displays the frame data in hexadecimal value and stores it in the memory or hard disk to use the necessary frame data for the developers. It is an executable file that shows. In order to test the sample program, the driver of the board must first be installed. The sample program is provided in source form so that the API provided for using the board can be briefly tested, so it can be modified and used by the user. [Figure 3. Sample Program FrmTest.exe Execution] To use the above sample program, you need an API (Application Programming Interface). The API is provided in the form of a "DLL", and an import library and a header file are required for compilation. All files listed above are included in the CDROM you provide. To run the sample program normally, the API DLL (PCI_FRM09.DLL) must be in the executable file folder, the Windows system folder, or the folder specified by the Path environment variable

15 4.1 Functions Related to Image Frame (1) Resolution( 해상도 ) Selection It selects according to the input resolution. The resolutions that can be set by the user are 640 x 480, 800 x 600, 1024 x 768, 1280 x 720, 1280x1024,1600 x 1200, 1920 x 1080, 1920 x 1200, 2048 x1536, 2560 x (2) Device Init button It initializes the image frame function. It is performed only once when the power is first applied. (3) Start button It starts saving the image frame. (4) FRAME Read button The image frames stored on the board read to the PC. If the image frame is not stored on the board, you have to wait until the save is completed. (5) Save Data button It is used to save the frame image data read to PC as file (*.bin).. (6) Video Frame Mode It selects an Interlace mode or Progressive mode. (7) Video Data Bits It selects 8bit, 16bit YUV, 24bit BGR. (8) Frame View button It shows one screen for each click.. (9) Auto View click When checked, show as video. (10) Frame Rate It displays frame / sec of video. (11) Close Device It closes the device (Device 0 ~ 3) of the selected board

16 4.2 Functions related to DIO (1) DIO Read Press this button to read the data on General Purpose I/O port. Reading Data are recorded the editor box beside the button. (2) DIO Write Press this button to write the data on General Purpose I/O port. You can directly write the data in the editor box beside the button. 4.3 Functions related to Save (1) Auto Save button When checked, the file is saved in BMP, JPEG, JPEG2000 format until it is released at 30 frames per second. (2) Select Folder button It selects the folder to save. By default it is set to D:\ folder. (3) Save Count It displays the number of stored frames.. (4) Select Video It displays the selected video mode. (5) Save JPEG2000 Data Converts the image stored in the buffer to JPEG2000 and displays its size in bytes. (6) JPEG2000 It selects the Thread Mode. (7) Save MJ2 Save it as a movie in the specified folder (C:\image\video)

17 Appendix A.1 Physical Dimension