Camera Link to DVI Converter

Transcription

1 amera Link to DVI onverter (MB-DVI01) User s Manual Windows, Windows2000, Windows T and Windows XP are trademarks of Microsoft. We acknowledge that the trademarks or service names of all other organizations mentioned in this document as their own property. Information furnished by DAQ system is believed to be accurate and reliable. However, no responsibility is assumed by DAQ system for its use, nor for any infringements of patents or other rights of third parties which may result from its use. o license is granted by implication or otherwise under any patent or copyrights of DAQ system. The information in this document is subject to change without notice and no part of this document may be copied or reproduced without the prior written consent. opyrights 2005 DAQ system, All rights reserved

2 -- ontents Introduction 2. MB-DVI Function 2.1 Block Diagram 2.2 Functional Blocks -2-

3 1. Introduction MB-DVI01 is a test board for high cost amera Link amera. DVI (Digital Video Interface) output port using a normal monitor can be seen the image from the output of the amera Link cameras.. MB-DVI01 can be used by all cameras in the amera Link specification because it is designed to fit standard amera Link specification. DVI Interface DAQ system U7 S-232 MB- DVI01 LD Monitor amera Link Interface amera-link amera [Figure 1-1. MB-DVI01 Board Usage] As shown in Figure [1-1], the MB-DVI01 receives Image Frame from camera via amera- Link Standard Interface. And, received data transmit to the DVI connector through FPGA that DAQ designed. [MB-DVI01 Features] Standard amera Link Base amera Link Max. 85Mhz Pixel lock amera Link(Input) to DVI(Output) onverter 256MByte Image Buffer o Driver, API (Automatically Operation) 7 ~ 24V D Power connector -3-

4 2. MB-DVI Function 2.1 Block Diagram As shown in the following figure, main control of the board is performed by FPGA ore Logic. The primary functions are receiving the frame data from amera (MD26 connector). eceived data convert the signal to be sent to the DVI connector. These functions are performed by using FPGA. MB-DVI01 DD2 #1 DD2 #2 X DVI O T Panel Link Transceiver FPGA ore Logic amera Link eceiver X0+/- X1+/- X2+/- lock+/- DD_LK DD_DATA X0+/- X1+/- X2+/- amera ontrol+/- lock x/tx TX M D I 26 [Figure 2-1. MB-DVI01 Block Diagram] Programming FPGA ore Logic is performed via the JTAG interface. The logic program of the FPGA is saved in a flash OM, it is located on the board and loaded at the powerup time

5 2.2 Functional Blocks MB-DVI01 Board J1 1 U3 J2 U1 A G J L D1 F1 F A G J L U2 U6 J5 U6 DAQ system U7 J3 U15 MB-DVI01 ev. F U5 J5 U8 D3 SW5 D6 D7 D5 D4 SW2 U8 O SW1 J4 eset SGT [Figure 2-2. MB-DVI01 Layout] The board has six LDs to indicate the operation status. D1 : turns on when power is applied. D3 : turns on when power is applied to the board and the initialization ends up. In this chapter, the primary functions of the board are described briefly. For more information, refer to the device specification. (1) FPGA : U7 All of the functions are controlled by the logic program of the FPGA. (2) DVI Transceiver : U6 Image data received from the FPGA convert into a DVI signal, and transmit through connector (1). (3) LVDS hannel : U5, U15 Serial signal is converted to a parallel signal using camera ink channel receiver to the FPGA

6 (4) egulator : U1, U2 The egulator is for supplying the power (3.3V) to the board. (5) DD Memory : F1, F2 After saving the data of camera link by frame, transfer to DVI through FPGA. (6) Setup Switch : SW1 SWITH 4 (DVAL US) OFF : DVAL US O : DVAL OT US SWITH 3 (Output Mode) OFF : amera Link 24bit signal to DVI 24bit signal O : Shifted data by below switch 1,2 setting output to DVI 24BIT. SWITH 1, 2 (DATA SHIFT Setup) 1 2 OFF OFF : O SHIFT OFF O : 6BIT SHIFT (In case of 14-bit AMA) O OFF : 8BIT SHIFT (In case of 16-bit AMA) O O : // (7) S-232 Transceiver : U6 It can be a S-232 communication through J5. (8) Power onnector : J2 24V OT (D-005(2.0)) -6-