PTC04-DB-FastLoader Daughter Board for Melexis PTC devices

Transcription

1 PTC0-DB-FastLoader Features and Benefits PTC0 interface board for testing devices, supporting MUST/MICE, LIN and Fast LIN protocols Applications Experimental tool for Lab and Prototyping Production Equipment for Serial Programming Ordering Information Part No. PTC0-DB-FastLoader PTC0) Accessories Part No. DLL s for all supported products User Inter Faces for supported products Description Default Daughter Board (Board + rear panel Description. Functional Diagram Figure PTC0-DB-FastLoader Page of Data Sheet Rev.. Feb 00

2 PTC0-DB-FastLoader TABLE OF CONTENTS FEATURES AND BENEFITS... APPLICATIONS... ORDERING INFORMATION... ACCESSORIES.... FUNCTIONAL DIAGRAM.... BOARD DESCRIPTION..... BOARD LAYOUT..... BOARD SCHEMATIC..... DAUGHTER BOARD CONNECTORS..... ANALOGUE DB CONNECTOR ( PINS)..... APPLICATION CONNECTOR DB Female Connector DB Screw Terminal.... DISCLAIMER... PTC0-DB-FastLoader Page of Data Sheet Rev.. Feb 00

3 PTC0-DB-FastLoader. Board description.. Board Layout Figure DB-ID: This ID keeps a few initial variables in mind. It allows for example to detect what DB is connected to the programmer and if the DB is not expired. J and J: these are the Analogue and Digital connectors. See below for a detailed description. Application Connector: Connection to the application. See below for details J: 0 pins screw terminal. It provides the same signals as the application connector. PTC0-DB-FastLoader Page of Data Sheet Rev.. Feb 00

4 PTC0-DB-FastLoader Page of Data Sheet Rev.. Feb 00 Figure F F FA FB FC FD FE FF WP U I O I O I O I O I O I O I O I O 0 GND VCC SCL SDA ISENSE_PPS ISENSE_PPS ISENSE_PPS RX XCK0 L/FL_RX Must ULN0LW ISENSE_PPS ANA.COMP0 ANA.COMP D D D D D Rd Wr C U VDD PTC SCL SDA C0 A0 A A A D D D Rd SCL F FA FC FE PE0 PE PE PE 00NF_ZU A0 A A VSS IOdrv _0 IOdrv _ IOdrv _ IOdrv _ IOdrv _ IOdrv _ IOdrv _ IOdrv _ DIGITAL DB CONNECTOR J A A A A D 0 D D D Wr Reset 0 SDA F FB FD FF 0 PE PE PE PE 0 0 Pin Header U D D D D D D D OC G Q0 Q Q Q Q Q Q Q VCC GND HCT_ 0 0 Y Y Y Y Y Y R R R R R R R R C K K K K K K 00NF_ZU K K ANALOG DB CONNECTOR J Meas_Line_P Meas_Line_P Meas_Line_P Meas_Line_P Meas_Line_N 0 Meas_Line_N Meas_Line_N Meas_Line_N +V_SUPPLY +V 0 +.V_REF_SUPPLY VOUT_PPS 0 VOUT_PPS VOUT_PPS VOUT_PPS 0 ANA.COMP CD ANA.COMP pin header TX L/FL_TX Must0 Mice C D D D D D D D D 00NF_ZU A GND J PE0 PE PE PE PE PE PE PE Y Y Y Y Y Y D BAV SOT C 00NF_ZU FAST_RX Wr Rd U IOdrv_ BS0/SOT LMDTX-. IN OUT Vout_PPS U D D D D D D D OC G GN D LIN FAST_LIN C 00NF_ZU Q0 Q Q Q Q Q Q Q VCC GND HCT_ U FAST_TX VSUP TH0 0 0 REL Pickering 0--C-/D D D D D D Q VSUP VCC EN RESET GND TxD BUS RxD C 0uF /,V + V C REL PICKERING --A-/D Meas_Line_P LIN_TX LIN_RX R 00NF_ZU 0R R open Q FDV0N IOdrv _ C.uF IOdrv _0 LIN_OUT VBAT + R k R k R0 k R k VBAT LIN VSUP FAST_LIN R J k R 0k LIN_RX LIN_TX SD Card Holder FAST_RX REL Pickering 0--C-/D FAST_TX REL Pickering 0--C-/D SD Card In SD mode WP RSV/Dat MISO/Dat0 VSS SCLK VDD VSS MOSI/CMD CS/CD/Dat RSV/Dat W P com CD 0 R 0k VBAT LIN_OUT RX TX XCK0 Must0 Must Mice V Farnell: Write Protect & Card Detection CD R 0k R0 0k IOdrv _ IOdrv _ +V D L/FL_RX L/FL_TX BYGM BYGM R 0k R 0k R 0k D BYGM D BYGM D R 0 R 0 R 0 R 0 R 0 R 0 BAV SOT BAV SOT Size D VBAT LIN_OUT RX TX XCK0 Must0 Must Mice D BAV SOT D BAV SOT U 0 Va Vy A Y A Y A Y A Y A Y A Y A Y 0 A Y EN GND ADG0 Project : Schematic : BAV SOT D D BAV SOT Flatcable_Line_ Flatcable_Line_ Flatcable_Line_ Flatcable_Line_ Flatcable_Line_ Flatcable_Line_ Flatcable_Line_ Flatcable_Line_ Flatcable_Line_ Flatcable_Line_0 Flatcable_Line_ Flatcable_Line_ Flatcable_Line_ Flatcable_Line_ Flatcable_Line_ DB_FEMALE R0 0 R 0 R 0 R 0 R 0 R 0 Y Y Y Y Y Y PTC0_DB_FastLoader Friday, April, 00 Date: Sheet of 0 J 0 0 pins Screw_Terminal P.. Board Schematic Rev PTC0-DB-FastLoader

5 PTC0-DB-FastLoader.. Daughter board Connectors The main board has two connectors to the interface with the application. The PTC allows adding a full PCB in between. This daughter board can be mounted on the two connectors. In some exceptional cases, a daughter board contains only a few wires from the Analogue connector to the application connector. The pins on of the connectors are described below. Digital DB Connector Analog DB Connector A0 A A A D D D Rd SCL F FA FC FE PE0 PE PE PE Pin Header A A A A D D D D Wr Reset SDA F FB FD FF PE PE PE PE +V_Digital_Supply SHTD_PPS SHTD_PPS SHTD_PPS SHTD_PPS ISENSE_PPS ISENSE_PPS ISENSE_PPS ISENSE_PPS ANA.COMP0 ANA.COMP pin Header ExtMeasPos ExtMeasPos ExtMeasPos ExtMeasPos ExtMeasNeg ExtMeasNeg ExtMeasNeg ExtMeasNeg +V_SUPPLY +V_Analog_SUPPLY +.V_REF_Voltage VOUT_PPS VOUT_PPS VOUT_PPS VOUT_PPS ANA.COMP ANA.COMP Figure Mainly, the digital connector is meant to expand the programmer to extra needs. Address lines A0-A together with the Map Select Lines F-FF allows to direct access an area of K. Examples would be adding a simple addressed I/O register by using the selection lines. If more complexity is needed, a full FPGA can be mounted on the DB board Pin Name Description A0 A Address lines D Data Lines active during Rd or Wr signals Rd Read: A negative pulse will indicate a sampling of the data on the Data Bus Wr Write: A Negative pulse will indicate when data is available on the Data Bus 0 Reset This signal goes low by powering the PTC or by pressing the reset button. This line can be pulled low by application. Check firmware documentation for resetting by software. - SCL / SDA Ic Bus -0 F,F,,FF CS lines when the address areas are accessed - Port E Note: These pins are limited to Volt input\output!!!! The full Port E of the Atmega core is mounted to these pins. This allows us to use advanced features like PWM, UARTS, Time Measurements, etc. By using firmware that supports these, functions, application specific requirements can be fulfilled. Dgnd Digital Ground 0 +V Digital Volt Digital Supply. Maximum current to get out of this supply: 0mA Table PTC0-DB-FastLoader Page of Data Sheet Rev.. Feb 00

6 PTC0-DB-FastLoader Note: All the pins are limited to Volt input\output!!!! However, there are Protections, please take precautions in order to avoid damage of the main board... Analogue DB Connector ( Pins) Mainly, the analogue connector provides all the analogue signals and measure possibilities. Pin Name Description,, PPS - Output of the Programmable Supplies 0 PPS Output of the Fast DAC Programmable Power Supply,,, Isense_PP- Outputs (Driver outputs before Rsens) for current evaluations. These outputs could be used to connect to the analogue comparators in order to create fast digital signals based on current.,,, ExtMeas-Pos There are differential inputs for making measurements 0,,, ExtMeas_Neg The negative inputs of ExtMeas-Pos,,, Shtd_PPS- Outputs that shows the status of the Drivers. Signals are meant to connect LED's to put the front panel,,, AnaComp0- See *Note. Input (limited to V) Fast Level comparators in order to remove time consuming measurement +V_Supply Supply to extend the daughter board with some extra drivers +.V Ref Output of internal reference All other Analogue Ground Table Note: All the pins are limited to Volt input/output! However, there are Protections, please take precautions in order to avoid damage of the main board. Some pins are protected and limited to Volt! However, there are Protections, please take precautions in order to avoid damage of the main board... Application Connector... DB Female Connector Figure PTC0-DB-FastLoader Page of Data Sheet Rev.. Feb 00

7 PTC0-DB-FastLoader Pins Name Description Direction VBAT Power Supply Input/Output N.C. Not connected - Digital Ground Power NC Not connected - TX USART Transmit Data Output N.C. Not connected - MUST0 Digital test pin Output MICE Digital test pin Input LIN_OUT LIN BUS Input/Output 0 +V DC Supply Power N.C. Not connected - RX USART Receive Data Input XCK0 USART Clock Output N.C. Not connected - MUST Digital test pin Output Table... DB Screw Terminal Figure Pin Name Description Direction VBAT Power Supply Input/Output LIN_OUT LIN BUS Input/Output Digital Ground Power +V DC Supply Power RX USART Receive Data Input TX USART Transmit Data Output XCK0 USART Clock Output MUST0 Digital test pin Output MUST Digital test pin Output 0 MICE Digital test pin Input Table PTC0-DB-FastLoader Page of Data Sheet Rev.. Feb 00

8 PTC0-DB-FastLoader. Disclaimer Devices sold by Melexis are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. Melexis makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. Melexis reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with Melexis for current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by Melexis for each application. The information furnished by Melexis is believed to be correct and accurate. However, Melexis shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interrupt of business or indirect, special incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of Melexis rendering of technical or other services. 00 Melexis NV. All rights reserved. For the latest version of this document, go to our website at: Or for additional information contact Melexis Direct: Europe and Japan: All other locations: Phone: + 0 Phone: sales_europe@melexis.com sales_usa@melexis.com QS000, VDA. and ISO00 Certified PTC0-DB-FastLoader Page of Data Sheet Rev.. Feb 00