NCN4555MNR2G. 1.8V / 3V SIM Card Power Supply and Level Shifter

Transcription

1 N. / SIM Card Power Supply and Level Shifter The N is a level shifter analog circuit designed to translate the voltages between a SIM Card and an external microcontroller or MPU. A built in LDO type DC DC converter makes the N useable to drive. and. SIM card. The device fulfills the ISO6 smart card interface standard as well as GSM. and related (. and.) and G mobile requirements (IMT /G UICC standard). With the pin a low current shutdown mode can be activated making the battery life longer. The Card power supply voltage (SIM_ CC ) is selected using a single pin (MOD_ CC ). Features Supports. or. Operating SIM Card The LDO is able to Supply More than ma under. and. Built in Pullup Resistor for Pin in Both Directions All Pins are Fully ESD Protected According to ISO 6 Specifications ESD Protection on SIM Pins in Excess of k (Human Body Model) Supports up to More than MHz Clock Low Profile x QFN 6 Package These are Pb Free Devices* Typical Applications SIM Card Interface Circuit for G,.G and G Mobile Phones Identification Module Smart Card Readers Wireless PC Cards BB.6 to.. to.. F. F QFN 6 MN SUFFIX CASE AK MARKING DIAGRAM 6 Device Package Shipping NMNG NMNRG ORDERING INFORMATION QFN 6 (Pb Free) QFN 6 (Pb Free) N ALYW A = Assembly Location L = Wafer Lot Y = Year W = Work Week = Pb Free Package (Note: Microdot may be in either location) Units / Rail /Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD/D. MPU or Microcontroller P P P P SIM Card Detect DD MOD_ CC RST N SIM_ CC SIM_RST CLK SIM_CLK SIM_ F CC RST CLK C DET C DET 6 Figure. Typical Interface Application *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Semiconductor Components Industries, LLC, October, Rev. Publication Order Number: N/D

2 N RST CLK 6 Exposed Pad (EP) MOD_ CC DD N SIM_CLK SIM_RST 6 BAT SIM_ CC SIM_ Figure. QFN 6 Pinout (Top iew) BAT (. to. ) ma LDO. /. SIM_ CC MOD_ CC DD (.6 to. ) RST SIM_RST CLK SIM_CLK k k DATA DATA SIM_ Figure. N Block Diagram

3 N PIN DESCRIPTIONS PIN Name Type Description INPUT Power Down Mode pin: = Low Low current shutdown mode activated = High Normal Operation A Low level on this pin resets the SIM interface, switching off the SIM_ CC. MOD_ CC INPUT The signal present on this pin programs the SIM_ CC value: MOD_ CC = Low SIM_ CC =. MOD_ CC = High SIM_ CC = DD POWER This pin is connected to the system controller power supply. It configures the level shifter input stage to accept the signals coming from the microprocessor. A. F capacitor shall be used to bypass the power supply voltage. When DD is below. typical the SIM_ CC is disabled. The N comes into a shutdown mode. No Connect BAT POWER DC DC converter supply input. The input voltage ranges from. up to.. This pin has to be bypass by a. F capacitor. 6 No Connect SIM_ CC POWER This pin is connected to the SIM card power supply pin. An internal LDO converter is programmable by the external MPU to supply either. or. output voltage. An external. F minimum ceramic capacitor recommended must be connected across SIM_ CC and. During a normal operation, the SIM_ CC voltage can be set to. followed by a. value, or can start directly to any of these two values. SIM_ INPUT/ OUTPUT This pin handles the connection to the serial of the card connector. A bidirectional level translator adapts the serial signal between the card and the micro controller. A k (typical) pullup resistor provides a High impedance state for the SIM card link. SIM_RST OUTPUT This pin is connected to the RESET pin of the card connector. A level translator adapts the external Reset (RST) signal to the SIM card. GROUND This pin is the GROUND reference for the integrated circuit and associated signals. Care must be taken to avoid voltage spikes when the device operates in a normal operation. SIM_CLK OUTPUT This pin is connected to the CLOCK pin of the card connector. The CLOCK (CLK) signal comes from the external clock generator, the internal level shifter being used to adapt the voltage defined for the SIM_ CC. No Connect CLK INPUT The clock signal, coming from the external controller, must have a Duty Cycle within the Min/Max values defined by the specification (typically %). The built in level shifter translates the input signal to the external SIM card CLK input. RST INPUT The RESET signal present at this pin is connected to the SIM card through the internal level shifter which translates the level according to the SIM_ CC programmed value. INPUT/ OUTPUT 6 No Connect This pin is connected to an external microcontroller or cellular phone management unit. A bidirectional level translator adapts the serial signal between the smart card and the external controller. A built in constant k (typical) resistor provides a high impedance state when not activated.

4 N ATTRIBUTES Characteristics ESD protection HBM, SIM card pins (,,, & ) (Note ) HBM, All other pins (Note ) MM, SIM card pins (,,, & ) (Note ) MM, All other pins (Note ) CDM, SIM card pins (,,, & ) (Note ) CDM, All other pins (Note ) alues > k > k > 6 > > k > 6 Moisture sensitivity (Note ) QFN 6 Level Flammability Rating Oxygen Index: to in Meets or exceeds JEDEC Spec EIA/JESD IC Latchup Test. Human Body Model, R =, C = pf.. Machine Model.. CDM, Charged Device Model.. For additional information, see Application Note AND/D. MAXIMUM RATINGS (Note ) Rating Symbol alue Unit LDO Power Supply oltage BAT. BAT 6 Power Supply from Microcontroller Side DD. DD 6 External Card Power Supply SIM_ CC. SIM_ CC 6 Digital Input Pins in I in. in DD +. but < 6. ± ma Digital Output Pins out I out. out DD +. but < 6. ± ma SIM card Output Pins QFN 6 Low Profile package Power T A = + C Thermal Resistance Junction to Air out I out. out SIM_ CC +. but < 6. (internally limited) P D R JA Operating Ambient Temperature Range T A to + C Operating Junction Temperature Range T J to + C Maximum Junction Temperature T Jmax + C Storage Temperature Range T stg 6 to + C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.. Maximum electrical ratings are defined as those values beyond which damage to the device may occur at T A = + C ma mw C/W

5 N POWER SUPPLY SECTION ( C to + C) Pin Symbol Rating Min Typ Max Unit BAT Power Supply.. I BAT Operating current I CC = ma (Note 6) A I BAT_SD Shutdown current = Low (Note ). A DD Operating oltage.6. I DD Operating Current f CLK = MHz (Note ). A I DD_SD Shutdown Current = Low. A DD Undervoltage Lockout.6. SIM_ CC MOD_ CC = High, BAT =., I SIM_CC = ma MOD_ CC = High, BAT =. to., I SIM_CC = ma to ma MOD_ CC = Low, BAT =. to., I SIM_CC = ma to ma I SIM_CC_SC Short Circuit Current SIM_ CC shorted to ground, T A = C ma NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 6. As long as BAT DD.. For BAT DD >. the maximum value increases up to A (typical being in the + A range).. As long as BAT DD... Guaranteed by design over the operating temperature range specified. DIGITAL INPUT/OUTPUT SECTION CLOCK, RESET,,, MOD_ CC Pin Symbol Rating Min Typ Max Unit,,,, in I IH & I IL Input oltage Range (, MOD_ CC, RST, CLK, ) Input Current (, MOD_ CC, RST, CLK) High Level Input oltage (RST, CLK) Low Level Input oltage (RST, CLK) DD na, IH IL. * DD (Note ) DD., IH IL OH_ OL_ I IH IIL High Level Input oltage (, MOD_ CC ) Low Level Input oltage (, MOD_ CC ) High Level Output oltage (SIM_ = SIM_ CC, I OH_ = A) Low Level Output oltage (SIM_ =, I OH_ = A) High Level Input Current () Low Level Input Current (). * DD (Note ). * DD R pu_ I/ Pullup Resistor k NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously.. If.6 DD. then IHmin =.6. DD. DD.. A ma

6 N SIM INTERFACE SECTION (Note ) Pin Symbol Rating Min Typ Max Unit SIM_RST SIM_ CC = +. (MOD_ CC = High) Output RESET I sim_rst = A Output RESET I sim_rst = + A Output RESET Rise Cout = pf Output RESET Fall Cout = pf. * SIM_ CC SIM_ CC. SIM_ CC = +. (MOD_ CC = Low) Output RESET I sim_rst = A Output RESET I sim_rst = + A Output RESET Rise Cout = pf Output RESET Fall Cout = pf. * SIM_ CC SIM_ CC. SIM_CLK SIM_ CC = +. (MOD_ CC = High) Output Duty Cycle Max Output Frequency Output I sim_clk = A Output I sim_clk = + A Output SIM_CLK Rise Cout = pf Output SIM_CLK Fall Cout = pf. * SIM_ CC 6 SIM_ CC. % MHz ns ns SIM_ CC = +. (MOD_ CC = Low) Output Duty Cycle Max Output Frequency Output I sim_clk = A Output I sim_clk = + A Output SIM_CLK Rise Cout = pf Output SIM_CLK Fall Cout = pf. * SIM_ CC 6 SIM_ CC. % MHz ns ns SIM_ SIM_ CC = +. (MOD_ CC = High) Output I SIM_IO = A, = DD Output I SIM_IO = + ma, = SIM_ Rise C out = pf SIM_ Fall C out = pf. * SIM_ CC SIM_ CC. SIM_ CC = +. (MOD_ CC = High) Output I SIM_IO = A, = DD Output I SIM_IO = +. ma, = SIM_ Rise C out = pf SIM_ Fall C out = pf. * SIM_ CC SIM_ CC. R pu_sim_ Card Pullup Resistor k NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously.. All the dynamic specifications (AC specifications) are guaranteed by design over the operating temperature range. 6

7 N TYPICAL CHARACTERISTICS BAT =. BAT =. ICC_SC_. (ma) 6 BAT =. ICC_SC_. (ma) 6 BAT =. TEMPERATURE ( C) Figure. Short Circuit Current I CC _SC vs Temperature at SIM_ CC =. (MOD_ CC = LOW) TEMPERATURE ( C) Figure. Short Circuit Current I CC _SC vs Temperature at SIM_ CC =. (MOD_ CC = HIGH) ICC_SC_. ( A) BAT =. BAT =. ICC_SC_. ( A) BAT =. BAT =. TEMPERATURE ( C) Figure 6. I BAT vs temperature at. TEMPERATURE ( C) Figure. I BAT vs Temperature at.

8 N APPLICATION INFORMATION CARD SUPPLY CONERTER The N interface DC DC converter is a Low Dropout oltage Regulator capable of suppling a current in excess of ma under. or.. This device features a very low quiescent current typically lower than A (Figure 6 and ). MOD_ CC is a select input allowing a logic level signal to select a regulated voltage of. (MOD_ CC = LOW) or. (MOD_ CC = HIGH). Additionally, the N has a shutdown input allowing it to turn off or turn on the regulator output. The shutdown mode power consumption is typically in the range of a few tens of na ( na Typical). Figure shows a simplified view of the N voltage regulator. The SIM_ CC output is internally current limited and protected against short circuits. The short circuit current I CC is constant over the temperature and SIM_ CC. It varies with BAT typically in the range of 6 ma to ma (Figure and ). In order to guarantee a stable and satisfying operating of the LDO the SIM_ CC output will be connected to a. F bypass ceramic capacitor to the ground. At the input, BAT will be bypassed to the ground with a. F ceramic capacitor. LEEL SHIFTERS The level shifters accommodate the voltage difference that might exist between the microcontroller and the smart card. The RESET and CLOCK level shifters are monodirectional and feature both the same architecture. The bidirectional line provides a way to automatically adapt the voltage difference between the MCU and the SIM card in both directions. In addition with the pullup resistor, an active pullup circuit (Figure, Q and Q) provides a fast charge of the stray capacitance, yielding a rise time fully within the ISO6 specifications. BAT SIM_ CC Q I lim R C IN =. F + C OUT =. F REF + R MOD_ CC Figure. Simplified Block Diagram of the LDO oltage Regulator DD SIM_CC Q Q k k ns ns SIM_ Q IO/CONTROL LOGIC Figure. Basic Line Interface

9 N The typical waveform provided in Figure shows how the accelerator operates. During the first ns (typical), the slope of the rise time is solely a function of the pullup resistor associated with the stray capacitance. During this period, the PMOS devices are not activated since the input voltage is below their gs threshold. When the input slope crosses the gsth, the opposite one shot is activated, providing a low impedance to charge the capacitance, thus increasing the rise time as depicted in Figure. The same mechanism applies for the opposite side of the line to make sure the system is optimum. INPUT SCHMITT TRIGGERS All the Logic input pins (excepted and SIM_, See Figure ) have built in Schmitt trigger circuits to prevent the N against uncontrolled operation. The typical dynamic characteristics of the related pins are depicted Figure. The output signal is guaranteed to go High when the input voltage is above. x DD, and will go Low when the input voltage is below.. SHUTDOWN OPERATING In order to save power or for other purpose required by the application it is possible to put the N in a shutdown mode by setting Low the pin. On the other hand the device enters automatically in a shutdown mode when DD becomes lower than. typically. ESD PROTECTION The N SIM interface features an HBM ESD voltage protection in excess of k for all the SIM pins (SIM_IO, SIM_CLK, SIM_RST, SIM_ CC and ). All the other pins (microcontroller side) sustain at least k. These values are guaranteed for the device in its full integrity without considering the external capacitors added to the circuit for a proper operating. Consequently in the operating conditions it is able to sustain much more than k on its SIM pins making it perfectly protected against electrostatic discharge well over the HBM ESD voltages required by the ISO6 standard ( k). PRINTED CIRCUIT BOARD LAYOUT Careful layout routing will be applied to achieve a good and efficient operating of the device in its mobile or portable environment and fully exploit its performance. The bypass capacitors have to be connected as close as possible to the device pins (SIM_ CC, DD or BAT ) in order to reduce as much as possible parasitic behaviors (ripple and noise). It is recommended to use ceramic capacitors. The exposed pad of the QFN 6 package will be connected to the ground as well as the unconnected pins (). A relatively large ground plane is recommended. Figures and shows an example of PCB device implementation in an evaluation environment. OUTPUT DD ON OFF INPUT Figure. SIM_IO Typical Rise and Fall Times with Stray Capacitance > pf ( pf Capacitor Connected on the Board). x DD or.. x DD Figure. Typical Schmitt Trigger Characteristics

10 N EALUATION BOARD AND PCB GUIDELINES 6 C C CLK RST DD CC SIM_CARD DD. k R Q N SIM_RST IP SIM_CLK IP6 SIM_ IP SIM_CLK SIM_RST SIM_ SIM_ CC 6 J CON R6 POI IP SENSE_SIM_ CC DD IP MOD IP IP IP CLK RST IP RST IP J CLK C F DD J D MBRAT RST SIM_CLK SIM_RST DD CLK RST DD J SIM EXP 6 MOD_ CC J BAT R BAT SIM_ CC nf MOD_ CC J. k MBRAT D k R k R C BAT BAT D MOD_ CC S S 6 J J J J6 CONTROL & Figure. N engineering test board schematic diagram

11 N EALUATION BOARD AND PCB GUIDELINES Top Layer Bottom Layer Figure. N Printed Circuit Board Layout (Engineering board)

12 N PACKAGE DIMENSIONS QFN6 xx.mm,.p CASE AK ISSUE O PIN LOCATION D ÇÇÇ ÇÇÇ A B E NOTES:. DIMENSIONING AND TOLERAING PER ASME Y.M,.. CONTROLLING DIMENSION: MILLIMETERS.. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN. AND. MM FROM TERMINAL.. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS.. L max CONDITION CAN NOT IOLATE. MM SPACING BETWEEN LEAD TIP AND FLAG.. C. C. C TOP IEW (A) A MILLIMETERS DIM MIN MAX A.. A.. A. REF b.. D. BSC D.6. E. BSC E.6. e. BSC K. L.. 6 X. C SIDE IEW A C SEATING PLANE D 6X L NOTE e EXPOSED PAD 6X K E. C. C 6X b A B NOTE 6 BOTTOM IEW ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 6, Denver, Colorado USA Phone: 6 or 6 Toll Free USA/Canada Fax: 6 6 or 6 Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative N/D

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