Invyswell: A HyTM for Haswell RTM. Irina Calciu, Justin Gottschlich, Tatiana Shpeisman, Gilles Pokam, Maurice Herlihy
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1 Invyswell: A HyTM for Haswell RTM Irina Calciu, Justin Gottschlich, Tatiana Shpeisman, Gilles Pokam, Maurice Herlihy
2 Multicore Performance Scaling u Problem: Locking u Solution: HTM? u IBM BG/Q, zec12, POWER u Intel Haswell TSX Source: embedded.com 2
3 Restricted Transactional Memory (RTM) xbegin() Atomic region called transaction xend() Execute optimistically, without any locks Read and Write Sets Abort on memory conflict: programmer defined behavior 3
4 RTM Fallback: Global Lock if (xbegin() == XBEGIN_STARTED) Execute Transaction xend() else Execute Fallback Path 4
5 Lock Elision Source: Anand Tech 5
6 Why Lock Elision Is Not Enough 4.5 NorecSTM 4 Speedup NorecHy HLE * Threads Labyrinth
7 InvalSTM (prior work) u [Gottschlich et al., CGO 2010] u Scalable u Good for large transactions u Conflict detection using bloom filters 7
8 InvalSTM Software Transaction (prior work) Main body of SW txn Time SW Txn Invalidation On read: Add to read Bfilter On write: Add to write Bfilter Add writes to hash table If can_commit() Invalidation Else restart Commit update memory 8
9 InvalSTM Invalidation (prior work) Inflight Transactions Conflicts? (using bloom filters) Can I commit? Contention Manager Committing Transaction 9
10 InvalSTM Invalidation (prior work) Inflight Transactions no yes no ABORT Contention Manager Committing Transaction 10
11 InvalSTM Invalidation (prior work) Inflight Transactions Contention Manager Aborted 11
12 InvalSTM Invalidation (prior work) Inflight Transactions no yes no COMMIT Contention Manager Committing Transaction 12
13 InvalSTM Invalidation (prior work) Inflight Transactions INVALIDATE Contention Manager Committed 13
14 Software Transaction (InvalSTM) SW Txn Time Invalidation Commit 14
15 Hardware Transaction + Invalidation HW Txn Time Invalidation ABORT Commit 15
16 Hardware Transaction + Invalidation HW Txn Time Commit (Check BF) COMMIT Invalidation Already committed, can t abort 16
17 Software Transaction (Modified InvalSTM) SW Txn Time Commit Invalidation 17
18 x = 2; y = 1; SW Transaction 1 (commit) SW Transaction 2 (execution) Time x++; Read x; y++; Read y; z = 1/(x - y); z = 1/0!!! (invalidation) ABORT 18
19 Read Validation SW Transaction 1 (commit) SW Transaction 2 (execution) Time x++; Check BF Read x; ABORT y++; Check BF Read y; z = 1/(x - y); 19
20 SPECSW (Speculative Software) Begin SW txn, increment sw_cnt Main body of SW txn Time SW On read: Validate and add to read Bfilter On write: Add to write Bfilter Add writes to hash table Commit Post- Commit Acquire commit_lock Validate If can_commit() update memory Else release lock and restart Invalidation Decrement sw_cnt, release lock 20
21 BFHW (Bloom Filters Hardware) xbegin() Time HW Main body of HW txn. On Read: add to read Bfilter On Write: add to write Bfilter Commit if (commit_lock) if (BF conflict()) xabort() xend() Post- Commit Invalidation 21
22 x = 2; y = 1; HW Transaction 1 (commit) SW Transaction 2 (execution) Time x++; y++; ABORT (invalidation) Read x; Read y; z = 1/(x - y); ABORT z = 1/0!!! 22
23 Read Validation Time HW Transaction 1 (commit) x++; y++; Check BF Check BF SW Transaction 2 (execution) Read x; Read y; z = 1/(x - y); 23
24 BFHW xbegin() Time HW Main body of HW txn. On Read: add to read Bfilter On Write: add to write Bfilter Commit Post- Commit if (commit_lock) if (BF_conflict()) xabort() ++hw_post_commit; xend() Invalidation --hw_post_commit (fetch_and_sub) 24
25 Read Validation HW Transaction 1 (commit) SW Transaction 2 (execution) Time x++; y++; Wait for hw_post_commit == 0 Read x; Wait for hw_post_commit == 0 Read y; z = 1/(x - y); 25
26 SPECSW BFHW SW HW Expensive! On Read: add to read Bfilter On Write: add to write Bfilter Time Commit Post- Commit Commit Post- Commit Invalidation Expensive! 26
27 LITEHW (Light Hardware) xbegin() Time HW Main body of HW txn. Commit if (sw_cnt) xabort(); else xend() 27
28 Ensuring Progress Inflight Transactions Contention Manager Committing SW Transaction 28
29 Ensuring Progress Inflight Transactions Contention Manager Committing HW Transaction Committing SW Transaction 29
30 Does not abort Guarantees Progress IRREVOCSW (Irrevocable Software) Acquire commit lock, increment sw_cnt Time SW Main body of SW txn. On Read: add to read Bfilter On Write: add to write Bfilter Use direct updates Expensive! Commit Post- Commit Do nothing (Changes are already committed) Expensive! Invalidation Decrement sw_cnt, release lock 30
31 SGLSW (Single-Global-Lock Software) Acquire commit lock, increment sw_cnt ++commit_sequence SW Main body of SW txn. Use direct updates Time Commit Post- Commit Do nothing (Changes are already committed) ++commit_sequence Decrement sw_cnt, release lock 31
32 Invyswell State Diagram Start retry retry LiteHW retry threshold exceeded large txns with unsupported HTM instructions / overflow no SW txns running? small txns with unsupported HTM instructions SglSW yes retry BFHW retry threshold exceeded SpecSW retry threshold exceeded conflict IrrevocSW
33 Invyswell State Diagram yes Fail-fast? no Start retry LiteHW retry threshold exceeded large txns with unsupported HTM instructions / overflow no SW txns running? SglSW yes small txns with unsupported HTM instructions / fail-fast retry BFHW retry threshold exceeded retry SpecSW
34 Concurrent Execution Matrix
35 Speedup
36
37 Speedup
38 Speedup
39 Transaction Types 1 Thread % transactions benchmarks
40 Transaction Types 8 Threads % transactions benchmarks
41 Conclusions u HLE and RTM w/ SGL fallback are not enough u Invyswell is 35% faster than NOrec, 18% faster than Hybrid NOrec and 25% faster than HLE across all STAMP benchmarks
42 Thank you! u u irina@cs.brown.edu
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