Bw-Tree. Josef Schmeißer. January 9, Josef Schmeißer Bw-Tree January 9, / 25

Transcription

1 Bw-Tree Josef Schmeißer January 9, 2018 Josef Schmeißer Bw-Tree January 9, / 25

2 Table of contents 1 Fundamentals 2 Tree Structure 3 Evaluation 4 Further Reading Josef Schmeißer Bw-Tree January 9, / 25

3 Fundamentals bool compare_and_swap(int * ptr, int & expected, int desired) { int oldvalue; atomic { oldvalue = *ptr; if (oldvalue == expected) { *ptr = desired; return true; } } expected = oldvalue; return false; } Figure: Semantics of the CAS instruction. Josef Schmeißer Bw-Tree January 9, / 25

4 Features Main features: Lock-free data structure, which maps Page Identifiers (P IDs) to pointers entries can be atomically altered via CAS B link -Tree like side links (important for split and merge) Josef Schmeißer Bw-Tree January 9, / 25

5 Architecture PID Ptr P2 P1 P4 P ID Reference Memory Pointer Josef Schmeißer Bw-Tree January 9, / 25

6 Delta Updates PID Ptr Immutable base page P4 Josef Schmeißer Bw-Tree January 9, / 25

7 Delta Updates PID Ptr Insert 5 Immutable base page Perform updates to logical pages through delta records P4 Josef Schmeißer Bw-Tree January 9, / 25

8 Delta Updates PID Ptr Delete 2 Insert 5 Immutable base page Perform updates to logical pages through delta records Delta records are chained in a singly linked list P4 Josef Schmeißer Bw-Tree January 9, / 25

9 Delta Updates PID Ptr Delete 2 Insert 5 P4 Immutable base page Perform updates to logical pages through delta records Delta records are chained in a singly linked list Install updates atomically via CAS Josef Schmeißer Bw-Tree January 9, / 25

10 Search PID Ptr Delete 2 Insert 5 Traverse the tree as usual P4 Josef Schmeißer Bw-Tree January 9, / 25

11 Search PID Ptr Delete 2 Insert 5 Traverse the tree as usual Inspect each record of the delta chain, and stop at the first occurrence P4 Josef Schmeißer Bw-Tree January 9, / 25

12 Search PID Ptr Delete 2 Insert 5 P4 Traverse the tree as usual Inspect each record of the delta chain, and stop at the first occurrence Perform a binary search on the base page if the search drops through Josef Schmeißer Bw-Tree January 9, / 25

13 Conflicts PID Ptr P1 Josef Schmeißer Bw-Tree January 9, / 25

14 Conflicts PID Ptr Delete 2 Insert 5 P1 Multiple threads may try to install an update to the same page simultaneously Josef Schmeißer Bw-Tree January 9, / 25

15 Conflicts PID Ptr Delete 2 Insert 5 P1 Multiple threads may try to install an update to the same page simultaneously The atomic CAS ensures that only one thread succeeds Josef Schmeißer Bw-Tree January 9, / 25

16 Conflicts PID Ptr Delete 2 Insert 5 P1 Multiple threads may try to install an update to the same page simultaneously The atomic CAS ensures that only one thread succeeds Slower threads may retry Josef Schmeißer Bw-Tree January 9, / 25

17 Consolidation PID Ptr Insert 1 Delete 2 Insert 5 P3 Constantly appending deltas leads to ever-expanding chains. Josef Schmeißer Bw-Tree January 9, / 25

18 Consolidation PID Ptr Insert 1 Delete 2 Insert 5 P3 Constantly appending deltas leads to ever-expanding chains. Solution: 1. Consolidate the logical page by creating a new base page P3 Josef Schmeißer Bw-Tree January 9, / 25

19 Consolidation PID Ptr Insert 1 Delete 2 Insert 5 P3 Constantly appending deltas leads to ever-expanding chains. Solution: 1. Consolidate the logical page by creating a new base page 2. Install the new base page with an atomic CAS P3 Josef Schmeißer Bw-Tree January 9, / 25

20 Consolidation PID Ptr P3 Constantly appending deltas leads to ever-expanding chains. Solution: 1. Consolidate the logical page by creating a new base page 2. Install the new base page with an atomic CAS 3. Reclaim the memory of the old logical page, once it is no longer used Josef Schmeißer Bw-Tree January 9, / 25

21 Node Split PID O P Ptr k Q Page P Page R Josef Schmeißer Bw-Tree January 9, / 25

22 Node Split PID O P Ptr k Q Page P Page R Page Q Josef Schmeißer Bw-Tree January 9, / 25

23 Node Split PID O P Q Ptr Split k Page P Page R Page Q Josef Schmeißer Bw-Tree January 9, / 25

24 Node Split PID Ptr O P Q Split Index entry k Page P Page R Page Q Josef Schmeißer Bw-Tree January 9, / 25

25 Node Split PID Ptr O P Q Split Index entry k Page P Page R Page Q Josef Schmeißer Bw-Tree January 9, / 25

26 Node Merge PID P L R S Ptr k 1 k 2 Page L Page R Page S Josef Schmeißer Bw-Tree January 9, / 25

27 Node Merge PID P L R S Ptr k 1 k 2 Remove Node Page L Page R Page S Josef Schmeißer Bw-Tree January 9, / 25

28 Node Merge PID P L R S Ptr Merge k 1 k 2 Remove Node Page L Page R Page S Josef Schmeißer Bw-Tree January 9, / 25

29 Node Merge PID Ptr P L R S Merge Delete entry k 1 k 2 Remove Node Page L Page R Page S Josef Schmeißer Bw-Tree January 9, / 25

30 Optimal Delta Chain Length 4 M Operations per second Delta Chain Limit Josef Schmeißer Bw-Tree January 9, / 25

31 Experiment Description Synthetic workload: Integer keys and payload Randomly distributed Index size: 5M Test System - atkemper4: Intel Core i9-7900x 10 Cores; 20 Threads Restricted Transactional Memory Josef Schmeißer Bw-Tree January 9, / 25

32 Insert 4 3 M Operations per second 2 1 approach Bw Tree LockCoupling nosync Threads Josef Schmeißer Bw-Tree January 9, / 25

33 Lookup 60 M Operations per second approach Bw Tree LockCoupling nosync Threads Josef Schmeißer Bw-Tree January 9, / 25

34 Insert + Lookup 10.0 M Operations per second approach Bw Tree LockCoupling nosync Threads Josef Schmeißer Bw-Tree January 9, / 25

35 Alternative Approach Optimistic Lock Coupling: Versioned write locks Writers acquire locks as usual Readers traverse the tree optimistically without acquiring any locks Validate the version after each page access If validation fails, restart Josef Schmeißer Bw-Tree January 9, / 25

36 Insert 9 M Operations per second 6 3 approach Bw Tree LockCoupling olcepoch Threads Josef Schmeißer Bw-Tree January 9, / 25

37 Lookup 60 M Operations per second approach Bw Tree LockCoupling olcepoch Threads Josef Schmeißer Bw-Tree January 9, / 25

38 Insert + Lookup M Operations per second approach Bw Tree LockCoupling olcepoch Threads Josef Schmeißer Bw-Tree January 9, / 25

39 Another Alternative Modern Intel CPUs provide transactional memory support: Hardware Lock Elision (HLE) Restricted Transactional Memory (RTM) Josef Schmeißer Bw-Tree January 9, / 25

40 Insert M Operations per second 10 5 approach Bw Tree HLE olcepoch RTM Threads Josef Schmeißer Bw-Tree January 9, / 25

41 Lookup 60 M Operations per second approach Bw Tree HLE olcepoch RTM Threads Josef Schmeißer Bw-Tree January 9, / 25

42 Insert + Lookup M Operations per second approach Bw Tree HLE olcepoch RTM Threads Josef Schmeißer Bw-Tree January 9, / 25

43 Further Reading Justin J. Levandoski, David B. Lomet and Sudipta Sengupta. The Bw-Tree: A B-tree for New Hardware Platforms. IEEE 29th International Conference on Data Engineering (ICDE), Philip L. Lehman and S. Bing Yao. Efficient Locking for Concurrent Operations on B-Trees. ACM Transactions on Database Systems, Vol. 6, No. 4, December 1981, Pages Viktor Leis, Florian Scheibner, Alfons Kemper and Thomas Neumann. The ART of Practical Synchronization. Twelfth International Workshop on Data Management on New Hardware, Josef Schmeißer Bw-Tree January 9, / 25