KITPF0100EPEVBE Evaluation Board

Transcription

1 Freescale Semiconductor, Inc. User s Guide Document Number: KTPFUG Rev. 5. 8/5 KITPFEPEVBE Evaluation Board Featuring the MMPF 4-Channel Configurable PMIC Figure. KITPFEPEVBE Evaluation Board Freescale Semiconductor, Inc., 5. All rights reserved.

2 Contents Important Notice Getting Started Introduction KITPFEPEVBE Features MMPF Features Hardware/Software Requirements Hardware Configuration Evaluation Board Schematic Hardware Description KITPFEPEVBE Board Layout Bill of Materials References Revision History KTPFUG Rev. 5. Freescale Semiconductor, Inc.

3 Important Notice Important Notice Freescale provides the enclosed product(s) under the following conditions: This evaluation kit is intended for use of ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY. It is provided as a sample IC pre-soldered to a printed circuit board to make it easier to access inputs, outputs, and supply terminals. This evaluation kit may be used with any development system or other source of I/O signals by simply connecting it to the host MCU or computer board via off-the-shelf cables. Final device in an application will be heavily dependent on proper printed circuit board layout and heat sinking design as well as attention to supply filtering, transient suppression, and I/O signal quality. The goods provided may not be complete in terms of required design, marketing, and or manufacturing related protective considerations, including product safety measures typically found in the end product incorporating the goods. Due to the open construction of the product, it is the user's responsibility to take any and all appropriate precautions with regard to electrostatic discharge. In order to minimize risks associated with the customers applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. For any safety concerns, contact Freescale sales and technical support services. Should this evaluation kit not meet the specifications indicated in the kit, it may be returned within days from the date of delivery and will be replaced by a new kit. Freescale reserves the right to make changes without further notice to any products herein. Freescale makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Typical parameters can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typical, must be validated for each customer application by customer s technical experts. Freescale does not convey any license under its patent rights nor the rights of others. Freescale products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Freescale product could create a situation where personal injury or death may occur. Should the Buyer purchase or use Freescale products for any such unintended or unauthorized application, the Buyer shall indemnify and hold Freescale and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Freescale was negligent regarding the design or manufacture of the part. Freescale and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. Freescale Semiconductor, Inc. 5 KTPFUG Rev. 5. Freescale Semiconductor, Inc.

4 Getting Started Getting Started. Kit Contents/Packing List Customer evaluation board KITPFEPEVBE Warranty card and technical support brochure Introduction The KITPFEPEVBE evaluation board supports the development and testing of the PF PMIC, a member of Freescale s i.mx6 family of application processors. The board provides access to all output voltage rails as well as control and signal pins through terminal block connectors. A single terminal block connector for the input power supply allows the user to supply the board with an external DC power supply to fully evaluate the performance of the device. The KITPFEPEVBE comes with a non-programmed version of the PF PMIC that is prepared to power up from the default sequence. However, an integrated control/fuse programming interface allows the customer to program the OTP/TBB (One Time Programmable/Try-Before-Buy) memory and also to select it as the default source for the power-up configuration. Likewise, the programming interface allows full control of the PF through the I C communication lines. This document is intended to provide an overview of the KITPFEPEVBE evaluation board as well as detailed instruction for programming the PF through its dedicated Graphic User Interface (GUI). 4 KITPFEPEVBE Features Input voltage operation range from. V to 4.5 V Output voltage supplies accessible through detachable terminal blocks Four to six independent buck converters One 5. V boost regulator Six general purpose LDO regulators One DDR memory termination voltage reference One VSRTC supply Coin cell support for Try-Before-Buy (TBB) mode On/off push button support Hardware configuration flexibility through various jumper headers and resistors Integrated USB to I C programming interface for full control/configuration Onboard OTP programming supply and control Onboard PMIC control through the I C register map Fully featured programmer through J6 for external device control/programming On board connectors for interfacing with future evaluation/debug tools Compact form factor (4 x 4 in ) KTPFUG Rev Freescale Semiconductor, Inc.

5 MMPF Features 5 MMPF Features The PF Power Management Integrated Circuit (PMIC) provides a highly programmable/ configurable architecture with fully integrated power devices and minimal external components. With up to six buck converters, six linear regulators, RTC supply, and coin-cell charger, the PF can provide power for a complete system, including applications processors, memory, and system peripherals, in a wide range of applications. Four to six buck converters, depending on configuration Single/Dual phase/ parallel options DDR termination tracking mode option Boost regulator to 5. V output Six general purpose linear regulators Programmable output voltage, sequence, and timing OTP (One Time Programmable) memory for device configuration Coin cell charger and RTC supply DDR termination reference voltage Power control logic with processor interface and event detection Individually programmable ON, OFF, and Standby modes Freescale analog ICs are manufactured using the SMARTMOS process, a combinational BiCMOS manufacturing flow which integrates precision analog, power functions, and dense CMOS logic on a single cost-effective die. 5. MC9S8JM6 Features The KITPFEPEVBE implements a Freescale MC9S8JM6 low-cost, high-performance 8-bit HCS8 microcontroller to interface via USB to IC to control the main PMIC. 8-bit HCS8 Central Processing Unit (CPU) Up to 4 MHz internal bus (48 MHz HCS8 core) frequency offering.7 to 5.5 V across temperature range of -4 to +85 C Support for up to peripheral interrupt/reset sources On-Chip Memory Up to 6 K flash read/program/erase over full operating voltage and temperature Up to 4 K RAM 56 Byte USB RAM 6 Hardware/Software Requirements 6. Hardware Requirements Power supply: Output voltage range from. V to 4.5 V Current capability from to 5 A (current requirement is dependent on output loading) Supply to board connection cables (capable of withstanding up to 5. A current) USB (male) to mini USB (male) communication cable. USB-enabled computer. 6. Software Requirements Windows XP or Windows 7 operating system KTPFUG Rev. 5. Freescale Semiconductor, Inc. 5

6 Hardware Configuration 7 Hardware Configuration Connect the power supply and the USB communication cables as shown in Figure. Voltmeters are optional but it is recommended in order to accurately verify that each one of the output supplies is providing the correct voltage level. Figure. Evaluation Board Setup Note: The KITPFEPEVBE allows the selection of SW regulator output or an external. V LDO output as the VDDIO/I C pull-up supply. By default, the SW regulator is the source for the VDDIO supply (J46 = -4). If the SW regulator is to be set below. V then switch the. V LDO connection to VDDIO (J46 = -.) KTPFUG Rev Freescale Semiconductor, Inc.

7 C C A A Evaluation Board Schematic 8 Evaluation Board Schematic VGEN SENSE V R J6 VREFDDR VREFDDR SWA SWB C4.UF R6 R7 C84.UF SW V SW VIN SW C44.UF C45.UF R4 R R R R5 VINREFDDR VHALF VIN VIN VIN UB 7 VIN 7 VIN 4 VIN VREFDDR VINREFDDR 9 VHALF MMPFNPEP VGEN VGEN VGEN VGEN4 VGEN5 VGEN6 LICELL VSNVS 4 VGEN VGEN VGEN VGEN4 VGEN5 VGEN6 VSNVS VSNVS VGEN VGEN VGEN5 R86 C47.47uF VGEN VGEN4 VGEN6 C46.uF C4 C8 C4 J.UF.UF.UF HDR X - CLOSED BAT BK mm Place Bottom 4.7uF C5 4.7uF C4 C4.UF BAT LICELL 6.8mm Leaded Place Top VGEN VGEN VGEN VGEN4 VGEN5 VGEN6 VSNVS VGEN VGEN VGEN VGEN VGEN VGEN VGEN4 VGEN4 VGEN5 VGEN5 VGEN6 VGEN6 VSNVS VSNVS VGEN VGEN SUBASSY_TB_x J8 VGEN VGEN4 SUBASSY_TB_x J9 VGEN5 VGEN6 SUBASSY_TB_x J VSNVS VREFDDR SUBASSY_TB_x VDDOTPIN C6.uF VDD OTP C7.uF C9.uF VDDOTPIN 4 VDDOTP J7 HDR X R79 VCOREDIG K VIN SENSE C48 VIN VIN.UF C49 VIN VIN.UF C5 J5 SWVIN PVIN INPUT SUPPLIES SWVIN PVIN SWVIN VIN J4 J4 HDR X TH J7 CLOSED CLOSED HDR X TH HDR X TH PVIN R8 C86 47PF U7 5 IN OUT EN 4 ADJ MIC55 R8 47K R8 7K R8 C85.UF VCOREDIG VIN SUBASSY_TB_x VIN.UF VSNVS HDR X TH J4 STANDBY V - CLOSED VIN VSNVS PWRON V SW C87 R9.UF K CLOSED J46 4 HDR X J HDR X VIN_SENSE 5 VCOREDIG VCOREDIG 5 VCOREREF VCOREREF 5 VCORE VCORE 49 C5 C5 C5 C54 48.UF.UF.uF.UF VDDIO VDDOTP VDDOTP SCL C55 C56 J45.UF MCU_SCL 54.UF MCU_SDA 4 5 HDR X R7 SDA 4.7K R6 4.7K R8 M UA VIN VCOREDIG PWRON 56 VCOREREF RESETBMCU VCORE STANDBY 4 REF SDWNB INTB VDDOTP VDDIO 5 ICTEST ICTEST SCL SDA CONSUMER/INDUSTRIAL MMPFNPEP J47 PWRON HDR X TH J6 HDR X TH FSMSM SW RESETBMCU STANDBY SDWNB INTB R5 ICTEST PVIN PVIN PVIN R.K RESETBMCU R STANDBY.K R SDWNB.K IC Terminal Blocks INTB VDDIO MCU_SCL MCU_SDA SUB_TB_x J VDDIO J SUB_TB_x J9 INTERRUPT INDICATOR INTB SHUTDOWN INDICATOR RESET INDICATOR PVIN PVIN PVIN FDVP Q R8 OHM D LED Red PWRON FDVP Q R9 OHM D LED Red R69 OHM D4 4 Red Grn PVIN R4 OHM LED_RED-GRN S D D S FDC67C G G Q RESETBMCU STANDBY J CON_X J PWRON INTB SDWNB RESETBMCU SWBST VDDIO MCU_SCL MCU_SDA PVIN SWVIN VGEN VGEN VGEN VGEN4 VGEN5 VGEN6 VSNVS VREFDDR Mounting Holes 's INTB SDWNB RESETBMCU SUBASSY_TB_x J STANDBY PWRON SUBASSY_TB_x BH BH BH BH4 MTG MTG MTG MTG CON_X Figure. KITPFEPEVBE LDO/Control Schematic Part KTPFUG Rev. 5. Freescale Semiconductor, Inc. 7

8 Evaluation Board Schematic INTERRUPT INDICATOR RESERVED INDICATOR RESET INDICATOR PVIN PVIN PVIN A INTB FDVP Q R84 FDVP Q R4 OHM R8 OHM A R69 OHM R9 OHM D4 4 Red Grn LED_RED-GRN FDC67C 5 S G D LED Red D LED Red 6 4 D RESETBMCU D C C G PVIN S Q J4 J44 J VGEN VGEN VGEN VGEN4 VGEN5 VGEN6 VSNVS VREFDDR STANDBY PWRON INTB SDWNB RESETBMCU SWBST VDDIO MCU_SCL MCU_SDA PVIN SWVIN SWC SWAB SW4 SW SWB SWA SWC SWAB SW4 SW SWB SWA HDR_X HDR_X HDR_X LDO Terminal Blocks J6 VGEN VGEN SUBASSY_TB_x J8 VGEN VGEN4 SUBASSY_TB_x J9 VGEN5 VGEN6 SUBASSY_TB_x J VSNVS VREFDDR SUBASSY_TB_x Interface Terminal Blocks J9 INTB SDWNB RESETBMCU STANDBY PWRON PVIN C86 47PF HOT PLUG WORKAROUND R8 SUBASSY_TB_x J SUBASSY_TB_x 4 IN EN ADJ U7 OUT MIC55 5 IC Terminal Blocks MCU_SCL MCU_SDA R8 47K VDDIO R8 C85.UF SUB_TB_x J J SUB_TB_x VCOREDIG R8 7K Mounting Holes 's BH BH BH BH MTG MTG MTG MTG Figure 4. KITPFEPEVBE LDO/Control Schematic Part KTPFUG Rev Freescale Semiconductor, Inc.

9 Evaluation Board Schematic SWVIN SWVIN SWVIN CLOSED J HDR X TH CLOSED J HDR X TH CLOSED J5 C 4.7uF C 4.7uF VIN_SWA C.UF VIN_SWB C6.UF VIN_SWC SWABFB SWALX SWBLX SWBIN SWCLX SWCIN R85 UC MMPFNPEP 6 SWFB 7 SWAIN 8 SWALX 9 SWBLX SWBIN SWCLX SWCIN SWAFB 8 SWAIN 7 SWALX 6 SWBLX 5 SWBIN 4 SWBFB SWVSSSNS SWAFB SWALX SWBLX SWBIN SWBFB VIN_SWA C4 C5.uF 4.7uF VIN_SWB C7 C8.uF 4.7uF CLOSED J HDR X TH CLOSED J4 HDR X TH SWVIN SWVIN SWVIN HDR X TH CLOSED J7 HDR X TH C9 4.7uF C 4.7uF C.UF VIN_SW C4.UF SWCFB SWVSSSNS SWLX SWFB SWCFB SWVSSSNS SWLX SWIN_ SWIN_ SWFB 57 EP 5 REF SW4FB 9 SW4IN SW4LX SWBSTLX 46 SWBSTIN 45 SWBSTFB 44 SW4FB SW4IN SW4LX SWBSTLX SWBSTIN SWBSTFB CLOSED J6 VIN_SW4 SWVIN C C LX_SWBST.UF 4.7uF HDR X TH VSWBST R D A C MBRLSFTG C5 C6 C8..UF UF UF R C7. pf SWBSTFB R VIN_SWBST L.UH. C8 J9 UF SWVIN SWBST J8 SUB_TB_x C9 C HDR X TH.uF.UF CLOSED SWAB SWAB L R4 J SWALX R6 LX_SWA. SWBLX LX_SWB R9. SWCLX LX_SWC uh L uh L4 uh. R7. R8. R. R. C UF C UF C5 UF C C4 SWABFB UF UF SWC SWC C6 UF SWCFB SUB_TB_x J SUB_TB_x SWLX LX_SW L5 uh C7 UF C8 UF SW SWFB SW J SUB_TB_x SW4LX LX_SW4 L6 UH C9 UF C8 UF SW4 SW4FB SW4 J SUB_TB_x SWALX LX_SWA L7 uh C UF C UF SWA SWAFB SWA J4 SUB_TB_x R6. R7. SWBLX LX_SWB L8 uh R7. C UF C UF SWB SWBFB SWB J5 SUB_TB_x Figure 5. KITPFEPEVBE Switching Regulators Schematic KTPFUG Rev. 5. Freescale Semiconductor, Inc. 9

10 5 4 Evaluation Board Schematic USB Connector Type A USB_PWR USB_PWR J9 PVIN VIN_USB MAIN IC MC9S8JM6 J4 USB-MiniB S4 G ID D+ D- VBUS S S S V D- D+ G HDR X F.5A L HI8VR- R4 R45 L9 HI8VR- VIN_USB USBDN USBDP C6.uF C6.uF PWRON VDDOTPIN_SNS ID ID MCU_SCL MCU_SDA R7 GPIO GPIO R74 C57.uF U 4 5 PTA PTA5 6 7 PTB/MISO/ADP 8 PTB/MOSI/ADP 9 PTB/SPSCK/ADP PTB/SS/ADP PTB4/KBIP4/ADP4 PTB5/KBIP5/ADP PTC/SCL 46 PTC/SDA 47 PTC PTC/TxD 48 PTC4 PTC5/RxD PTD/ADP8/ACMP+ 6 PTD/ADP9/ACMP- 7 PTD/KBIP/ACMPO PTD7 VDDAD/VREFH 4 VDD 7 C58.uF PTE/TxD PTE/RxD PTE/TPMCH PTE/TPMCH PTE4/MISO PTE5/MOSI PTE6/SPSCK PTE7/SS PTF/TPMCH PTF/TPMCH PTF4/TPMCH PTF5/TPMCH PTF6 PTG/KBIP PTG/KBIP PTG/KBIP6 PTG/KBIP7 PTG4/XTAL PTG5/EXTAL + C59 UF VUSBEN BSTEN VPGMEN VEN LGON LRON BSTUP BSTDN XTAL_JM6 EXTAL_JM6 Place on Bottom BDM Programmer USB_PWR C65.uF RST_JM6 BKGD_JM6 IRQ/TPMCLK 4 RESET BKGD/MS MC9S8JM6CGTE 5 8 VSSAD/VREFL 4 VSS 49 VSSOSC VUSB USBDN 9 USBDP USBDN USBDP R49.5K VUSB C64 R48.47UF.5K VUSB + C66 4.7UF R5 4.7K R5 4.7K J5 BKGD_JM RST_JM6 USB_PWR HDR X 8V - Boost Converter Place on Bottom CLOSED L Crystal Place on Bottom Q FDN6P Q5 FDN6P UH U4 MAX686 D9 Q6 FDN6P XTAL_JM6 C6 PF R4 M Y 4 I/O 4 I/O MHz EXTAL_JM6 C6 PF VIN_USB R76 47K Q9 VUSBEN BSS8 R75 47K 5 LX 6 A C R55 VDD MBRLSFTG VCC R56 C7 + C7 6 64K + C7 5UF ISET 8 R59 PF C75 DACOUT 74K 4.7uF UF FB BSTEN 7 NC 5 BSTUP SHDN LCDON 4 R6 BSTDN UP POK K DN 4 9 POL REF P VPGMEN R6 R64 R65 K C76 K K.uF C74.uF R6 47K R66 47K VDDOTPIN R77 K VDDOTPIN_SNS R78 K Q8 BSS8 ESD PROTECTION ESD9L5.ST5G ESD9L5.ST5G ID C A A C ID ESD9L5.ST5G A C MCU_SDA ESD9L5.ST5G A C MCU_SCL D5 D6 D7 D8 Place on Bottom Programming PROGRAMMING Interface CONNECTOR V J6 VDDOTPIN 4 MCU_SCL MCU_SDA 5 6 PWRON C77 GPIO 7 8 GPIO.uF HDR X4 LED INDICATORS USB_PWR USB_PWR LED Green C A D R67 47 C A D LED Red R68 47 LDO REGULATOR.V VIN_USB C8.UF VEN C78 47PF R7.K R7 K R R V Place on Bottom U5 5 IN OUT EN 4 ADJ MIC55 C79.uF V + C8.UF LGON LRON VOUT =.4 X ( (R/R) + ) =.V R = ((VOUT/.4) -) X R Figure 6. KITPFEPEVBE Control/Programming Interface Schematic KTPFUG Rev. 5. Freescale Semiconductor, Inc.

11 Hardware Description 9 Hardware Description The KITPFEPEVBE operates with a single power supply from. V to 4.5 V and is controlled via USB with help of an integrated USB-I C communication bridge. By applying the input voltage supply, the KITPFEPEVBE powers up according to the default power-up sequence described in the MMPF Data Sheet. Important notice: If power-up sequences and configuration are to be modified, the user must ensure that the register settings are consistent with the hardware configuration. This is most important for the buck regulators, where the quantity, size, and value of the inductors depend on the configuration (single/dual phase or independent mode) and the switching frequency. Additionally, if an LDO is powered by a buck regulator, it is gated by the buck regulator in the start-up sequence. Refer to the MMPF Data Sheet for details on buck regulator setup. 9. Jumper Description By default, the KITPFEPEVBE evaluation board is set to power up from the default power-up sequence. Verify that the jumpers are placed in the right position as shown in Figure 7. For a detailed description of the jumper functionality, refer to Table. KTPFUG Rev. 5. Freescale Semiconductor, Inc.

12 Hardware Description Figure 7. Default Jumper Configuration Diagram Table. KITPFEPEVBE Jumper Description Jumper Default Description J-J7 Closed Buck regulators input power path isolation. Short these jumpers to allow SWxIN to be powered from the SWVIN supply. J9 Closed SWBST regulator input power path isolation. Short this jumper to allow SWBSTIN to be powered from the SWVIN supply. KTPFUG Rev. 5. Freescale Semiconductor, Inc.

13 Hardware Description Table. KITPFEPEVBE Jumper Description (continued) Jumper Default Description J7 5-6 VDDOTP Supply selector -: Connect VDDOTP to the OTP Boost output (VDDOTPIN) for OTP programming. -4: Connect VDDOTP to to power up from OTP/TBB sequence. 5-6: Connect VDDOTP to VCOREDIG to power up from Default Power up sequence. J - Coin cell selector. -: Enables BAT as the main coin cell supply. -: Enables BAT as the main coin cell supply. J4 Closed Shorts PVIN and SWVIN. Allows supply isolation to provide more accurate efficiency readings on the switching supplies. J4 Open Shorts SWVIN to VIN. Allows one to isolate or connect the PF logic input supply to SWVIN net. (debugging option) J7 Closed Shorts PVIN to VIN. Allows one to isolate or connect the PF logic input supply to PVIN net. (debugging option) J - PF input logic supply selector. -: Connects PF VIN terminal to the. V external LDO regulator for debugging purposes. -: Connects PF VIN terminal to the main input supply. Refer to Figure. J6 Open Short to hold PWRON pin low. J4 Open Short to pull STANDBY to VSNVS voltage supply. J9 - Control Interface input supply selector -: Enables PVIN node as the input supply source for the control interface. -: Enables USB power as the input supply source for the control interface. 9. Connectors and Terminal Blocks Description Table. Terminal Blocks descriptions Connector Function Pin definition J8 SWBST Pin - SWBST Output Pin - J SWAB Pin - SWAB Output Pin - J SWC Pin - SWC Output Pin - J SW Pin - SW Output Pin - J SW4 Pin - SW4 Output Pin - J4 SWA Pin - SWA Output Pin - J5 SWB Pin - SWB Output Pin - J6 VGEN/VGEN Pin - VGEN Output Pin - Pin - VGEN Output J8 VGEN/VGEN4 Pin - VGEN Output Pin - Pin - VGEN4 Output J9 VGEN5/VGEN6 Pin - VGEN5 Output Pin - Pin - VGEN6 Output KTPFUG Rev. 5. Freescale Semiconductor, Inc.

14 Hardware Description Table. Terminal Blocks descriptions (continued) Connector Function Pin definition J VSNVS/VREFDDR Pin - VSNVS Output Pin - Pin - VREFDDR Output J5 Main Input Supply Pin - Pin - PVIN Pin - SWVIN J9 Interfacing Pin - INTB Pin - SDWNB Pin - RESETBMCU J Interfacing Pin - STANDBY Pin - PWRON Pin - J I C Signals Pin - SCL Pin - SDA J VDDIO Pin - VDDIO Pin - Figure 8. Input/Output Terminal Blocks KTPFUG Rev Freescale Semiconductor, Inc.

15 Hardware Description Table. Connector Description Connector Function Pin definition J4 Mini USB connector Pin - VBUS Pin - D- Pin - D+ Pin 4 - NC Pin 5 - Chassis - J5 BDM connector Pin - BKGD_JM6 Pin - Pin - NC Pin 4 - RST_JM6 Pin 5 - NC Pin 6 - USB_PWR J6 Programmer connector Pin - VDDOTPIN (8.5V boost output) Pin - V (. V LDO output) Pin - Pin 4 - MCU_SCL (I C clock signal) Pin 5 - MCU_SDA (I C data signal) Pin 6 - PWRON (Controls the PWRON on the target device) Pin 7 - GPIO (General Purpose GPIO) Pin 8 - GPIO (General Purpose GPIO) J4 Debug Port Debugging connector for future development tools. SWC SWAB SW4 SW SWB SWA J HDR_X SWC SWAB SW4 SW SWB SWA J4 Debug Port Debugging connector for future development tools J VGEN VGEN VGEN VGEN4 VGEN5 VGEN6 VSNVS VREFDDR ST J44 Debug Port Debugging connector for future development tools HDR_X STANDBY J HDR_X PWRON INTB SDWNB RESETBMCU SWBST VDDIO MCU_SCL MCU_SDA PVIN SWVIN KTPFUG Rev. 5. Freescale Semiconductor, Inc. 5

16 Hardware Description 9. Debug and Configuration Components The KITPFEPEVBE allows full flexibility to change the default configuration of SWA/B/C and SWA/B outputs to one more suitable for a specific application scenario. It also provides several source options for the LDO supplies to test various loading and supplying scenarios. Test points are provided on key nodes of the KITPFEPEVBE to allow full debugging capability during application development. 9.. SWA/B/C Configuration Components SWAB SWAB SWALX SWBLX SWCLX LX_SWA LX_SWB LX_SWC R6. R9. L uh L uh L4 uh R4. R8. R. R7. R. C UF C5 UF C UF C UF C6 UF C4 UF SWABFB SWC SWC SWCFB J SUB_TB_x J SUB_TB_x Figure 9. SWA/B/C Output Configuration The SWA/B/C regulator can be configured in various operating modes as described in Table 4. Table 4. SWABC Configuration Chart Component SWA/B/C Single phase SWA/B Single phase SWC independent SWA/B Dual phase SWC independent R6 Closed Closed R9 Closed R4 Closed Closed Closed R7 Closed Closed R8 Closed R Closed R Closed Closed L. H ISAT = 6. A. H ISAT = 4.5 A. H ISAT =.4 A L N/A N/A. H ISAT =.4 A L4 N/A. H ISAT =.4 A. H ISAT =.4 A KTPFUG Rev Freescale Semiconductor, Inc.

17 Hardware Description 9.. SWA/B Configuration Components SWA SWALX LX_SWA L7 uh C UF C UF SWAFB SWA J4 SUB_TB_x SWBLX LX_SWB R6. L8 uh R7. R7. C UF C UF SWB SWBFB SWB J5 SUB_TB_x Figure. SWA/B Output Configuration The SWA/B regulator can be configured in various operating modes as described in Table 5. Table 5. SWABC Configuration Chart Component SWA/B Single phase SWA/B Dual phase 9.. LDO Input Supply Source Selection SWA Independent SWB Independent R6 Closed R7 Closed Closed R7 Closed Closed L7. H ISAT =.9A. H ISAT =.A L8 N/A. H ISAT =. A. H ISAT =. A. H ISAT =. A SW4 R VREFDDR VREFDDR SWA SWB C4.UF R6 R7 C84.UF SW SW4 SW VIN SW C44.UF R4 R C45.UF R R R5 VINREFDDR VHALF VIN VIN VIN UB 7 VIN 7 VIN 4 VIN VREFDDR VINREFDDR 9 VHALF MMPFNPEP 6 VGEN 8 VGEN 6 VGEN 8 VGEN4 9 VGEN5 4 VGEN6 4 LICELL VSNVS 4 VGEN VGEN VGEN VGEN4 VGEN5 VGEN6 VSNVS VSNVS VGEN VGEN VGEN5 C47.47uF VGEN VGEN4 VGEN6 C46.uF C4 C8 C4 J -.UF.UF.UF + CLOSED HDR X 4.7uF C5 4.7uF C4 C4.UF BAT BK mm Place Bottom BAT LICELL 6.8mm Leade Place Top Figure. LDO Schematic Configuration KTPFUG Rev. 5. Freescale Semiconductor, Inc. 7

18 Hardware Description V - CLOSED VIN VSNVS PWRON V SW CLOSED J46 4 HDR X J R8 HDR X M UA VIN_SENSE 5 VCOREDIG VCOREDIG 5 VIN VCOREDIG PWRON 56 VCOREREF VCOREREF 5 RESETBMCU VCOREREF VCORE VCORE 49 VCORE STANDBY 4 C5 C5 C5 C54 48.UF SDWNB.UF REF.uF.UF VDDIO VDDOTP VDDOTP INTB 47 VDDOTP 55 SCL VDDIO C55 C56 J45 5 ICTEST.UF ICTEST MCU_SCL 54.UF SCL MCU_SDA 4 5 SDA HDR X CONSUMER/INDUSTRIAL R7 SDA 4.7K R6 MMPFNPEP 4.7K J47 PWRON HDR X TH J6 HDR X TH FSMSM SW RESETBMCU STANDBY SDWNB INTB R5 ICTEST PVIN R.K RESETBMCU STANDBY PVIN R.K SDWNB PVIN R.K INTB VDDIO Figure. Logic and Core Supplies Schematic Table 6. LDO Input Supply Configuration Chart Input Pin Input options VIN Input supply for VGEN and VGEN R = SW4 R = SW VIN Input supply for VGEN and VGEN4 R4 = SW4 R = SW VIN Input supply for VGEN5 and VGEN6 R = VIN R5 = SW VINREFDDR VREFDDR input supply R6 = SWA R7 = SWB VDDIO VDDIO Input supply V J46 = - SW J46 = -. Make sure to populate only one option per input pin to avoid shorts between various sources. KTPFUG Rev Freescale Semiconductor, Inc.

19 Hardware Description 9..4 Test point All test points are clearly marked on the KITPFEPEVBE evaluation board. Figure shows the location of various test points of interest during evaluation. Figure. Key Test Point Locations and Default Voltages KTPFUG Rev. 5. Freescale Semiconductor, Inc. 9

20 Hardware Description 9.4 Miscellaneous Components 9.4. Power on Push Button A footprint for a normally open, momentary push-button is provided at the PWRON terminal to allow a momentary low state by pressing the push button. J47 allows isolation of the PWRON terminal from the MCU GPIO controlling this pin. VSNVS PWRON R8 J47 HDR X TH PWRON PVIN UA 5 5 VIN VCOREDIG 5 VCOREREF 49 VCORE 48 REF 47 VDDOTP M PWRON 56 RESETBMCU STANDBY 4 SDWNB INTB J6 HDR X TH FSMSM SW RESETBMCU STANDBY SDWNB INTB R.K RESETBMCU STANDBY Figure 4. Power on Circuit 9.4. PMIC LED Indicators LED indicators are provided to notify the PMIC status to the user. Figure 5 shows the PMIC status LEDs D and D4, and a Reserved LED indicator D, that allows for an external rework connection to the transistor gate if any given signal debug is required. INTERRUPT INDICATOR SHUTDOWN INDICATOR RESET INDICATOR INTB PVIN PVIN PVIN PWRON FDVP Q FDVP Q R69 OHM R4 OHM R8 OHM R9 OHM A A D4 4 Red Grn LED_RED-GRN FDC67C 5 S G D LED Red D LED Red 6 4 D RESETBMCU D C C G PVIN S Q Figure 5. PMIC Status Indicator KTPFUG Rev. 5. Freescale Semiconductor, Inc.

21 Hardware Description Table 7 describes the meaning of the LED states. Table 7. LED State Description LED D D4 D Description Interrupt Notification ON = PMIC has detected an unmasked interrupt OFF = No interrupt detected RESETBMCU Notification Green = PMIC is in regulation and operating properly Red = PMIC is out of regulation Reserved debug LED ON = Q gate (R84 pad) is low OFF = Q gate (R84 pad) is high or floating KTPFUG Rev. 5. Freescale Semiconductor, Inc.

22 5 4 Hardware Description 9.4. Control/Programming Interface This onboard USB-to-I C interface comprises three basic blocks.. Controlling MCU (MC9S8JM6CGTE) for USB-I C translation... V LDO supply for external device controlling V boost converter for OTP programming. The control/programming interface allows one to program the onboard PF PMIC. Alternatively, the interface can serve as a programmer for external devices though the connector J6. USB Connector Type A USB_PWR USB_PWR J9 PVIN VIN_USB MAIN IC MC9S8JM6 J4 USB-MiniB S4 G ID D+ D- VBUS S S S V D- D+ G HDR X F.5A L HI8VR- R4 R45 L9 HI8VR- VIN_USB USBDN USBDP C6.uF C6.uF PWRON VDDOTPIN_SNS ID ID MCU_SCL MCU_SDA R7 GPIO GPIO R74 C57.uF U 4 5 PTA PTA5 6 7 PTB/MISO/ADP 8 PTB/MOSI/ADP 9 PTB/SPSCK/ADP PTB/SS/ADP PTB4/KBIP4/ADP4 PTB5/KBIP5/ADP PTC/SCL 46 PTC/SDA 47 PTC PTC/TxD 48 PTC4 PTC5/RxD PTD/ADP8/ACMP+ 6 PTD/ADP9/ACMP- 7 PTD/KBIP/ACMPO PTD7 VDDAD/VREFH 4 VDD 7 C58.uF PTE/TxD PTE/RxD PTE/TPMCH PTE/TPMCH PTE4/MISO PTE5/MOSI PTE6/SPSCK PTE7/SS PTF/TPMCH PTF/TPMCH PTF4/TPMCH PTF5/TPMCH PTF6 PTG/KBIP PTG/KBIP PTG/KBIP6 PTG/KBIP7 PTG4/XTAL PTG5/EXTAL + C59 UF VUSBEN BSTEN VPGMEN VEN LGON LRON BSTUP BSTDN XTAL_JM6 EXTAL_JM6 Place on Bottom BDM Programmer USB_PWR C65.uF RST_JM6 BKGD_JM6 IRQ/TPMCLK 4 RESET BKGD/MS MC9S8JM6CGTE 5 8 VSSAD/VREFL 4 VSS 49 VSSOSC VUSB USBDN 9 USBDP USBDN USBDP R49.5K VUSB C64 R48.47UF.5K VUSB + C66 4.7UF R5 4.7K R5 4.7K J5 BKGD_JM RST_JM6 USB_PWR HDR X 8V - Boost Converter Place on Bottom CLOSED L Crystal Place on Bottom Q FDN6P Q5 FDN6P UH U4 MAX686 D9 Q6 FDN6P XTAL_JM6 C6 PF R4 M Y 4 I/O 4 I/O MHz EXTAL_JM6 C6 PF VIN_USB R76 47K Q9 VUSBEN BSS8 R75 47K 5 LX 6 A C R55 VDD MBRLSFTG VCC R56 C7 + C7 6 64K + C7 5UF ISET 8 R59 PF C75 DACOUT 74K 4.7uF UF FB BSTEN 7 NC 5 BSTUP SHDN LCDON 4 R6 BSTDN UP POK K DN 4 9 POL REF P VPGMEN R6 R64 R65 K C76 K K.uF C74.uF R6 47K R66 47K VDDOTPIN R77 K VDDOTPIN_SNS R78 K Q8 BSS8 ESD PROTECTION ESD9L5.ST5G ESD9L5.ST5G ID C A A C ID ESD9L5.ST5G A C MCU_SDA ESD9L5.ST5G A C MCU_SCL D5 D6 D7 D8 Place on Bottom Programming PROGRAMMING Interface CONNECTOR V J6 VDDOTPIN 4 MCU_SCL MCU_SDA 5 6 PWRON C77 GPIO 7 8 GPIO.uF HDR X4 LED INDICATORS USB_PWR USB_PWR LED Green C A D R67 47 C A D LED Red R68 47 LDO REGULATOR.V VIN_USB C8.UF VEN C78 47PF R7.K R7 K R R V Place on Bottom U5 5 IN OUT EN 4 ADJ MIC55 C79.uF V + C8.UF LGON LRON VOUT =.4 X ( (R/R) + ) =.V R = ((VOUT/.4) -) X R Figure 6. Control/Programming Interface Schematic KTPFUG Rev. 5. Freescale Semiconductor, Inc.

23 KITPFEPEVBE Board Layout KITPFEPEVBE Board Layout. Assembly Layer Top Figure 7. Assembly Top Layer KTPFUG Rev. 5. Freescale Semiconductor, Inc.

24 KITPFEPEVBE Board Layout. Assembly Layer Bottom Figure 8. Assembly Layer Bottom KTPFUG Rev Freescale Semiconductor, Inc.

25 KITPFEPEVBE Board Layout. Top Layer Routing Figure 9. Top Layer Routing KTPFUG Rev. 5. Freescale Semiconductor, Inc. 5

26 KITPFEPEVBE Board Layout.4 Inner Layer Routing Figure. Inner Layer Routing KTPFUG Rev Freescale Semiconductor, Inc.

27 KITPFEPEVBE Board Layout.5 Inner Layer Routing Figure. Inner Layer Routing KTPFUG Rev. 5. Freescale Semiconductor, Inc. 7

28 KITPFEPEVBE Board Layout.6 Bottom Layer Routing Figure. Bottom Layer Routing KTPFUG Rev Freescale Semiconductor, Inc.

29 Bill of Materials Bill of Materials Table 8. Bill of Materials () Item Qty Schematic Label Value/Description Part Number Freescale Components U IC POWER MANAGEMENT MMPFNPEP CONSUMER/INDUSTRIAL QFN56 U IC MCU 8BIT 48 MHZ 6 KB FLASH V QFN48 MC9S8JM6CGTE Active Components U4 IC DAC CTRL BOOST INV +/-7.5 V -- MAX686EEE V QSOP6 4 U5 IC LIN VREG LDO.5-5 V 5 MA.5-6 V SOT-5 MIC55YM5 5 U7 IC LIN VREG LDO.5-5 V 5 MA MIC55YM5.5-6 V SOT-5 () 6 Y XTAL MHZ SER 9 PF SMT ECS--9-4X-CKM-TR Diodes 7 D DIODE SCH PWR RECT A V SMT MBRLSFTG 8 D,D,D LED RED SGL MA 6 SML-LXFM6SIC-TR 9 D4 LED DUAL GRN/RED MA SMT LTST-C95KGJRKT 4 D5,D6,D7,D8 DIODE TVS ESD PROT ULT LOW CAP ESD9L5.ST5G V SOD-9 D9 DIODE SCH PWR RECT A V MBRLSFTG SOD- D LED GRN SGL MA SMT 6 SML-LXFM6SUGCTR Capacitors 7 C,C,C5,C8,C9,C,C CAP CER 4.7 mf V % X5R 6 LMK7BJ475KA-T 4 C,C4,C6,C7,C,C, CAP CER. mf V % X5R 4 C4C4K8PAC C4,C9,C44,C45,C56, C77 5 C5 CAP CER. mf 5 V % X7R 4 GCM55R7HKA55D 6 6 C6,C,C,C,C4, CAP CER mf V % X5R 85 LMKBJ6MG-T C5,C6,C7,C8,C9, C,C,C,C,C8, C8 7 C7 CAP CER pf 5 V X7R 5% 4 4XJ5SNT () 8 C8 CAP CER mf V % X7R 85 GRMBR7A6KE5L 9 5 C,C4,C8,C4,C4 CAP CER. mf 6. V % X5R 4 C4C5M9PACTU C5,C4 CAP CER 4.7 mf 6. V % X5R 4 C4X5R6R-475MNP C6,C7,C9 CAP CER mf 6 V % X7R 85 85X6K6SNT 9 C4,C48,C49,C5,C5, CAP CER. mf V % X5R 4 CC4KRX5R6BB5 C5,C54,C84,C87 C46,C5 CAP CER. mf 6 V % X7R 4 GRM55R7C4KAD 4 C47 CAP CER.47 mf V % X7R 4 GMC4X7R474KNT-LF Assy Opt KTPFUG Rev. 5. Freescale Semiconductor, Inc. 9

30 Bill of Materials Table 8. Bill of Materials () Item Qty Schematic Label Value/Description Part Number Assy Opt 5 C55 CAP CER. mf V % X5R 4 CC4KRX5R6BB5 () 6 5 C57,C58,C6,C6,C65 CAP CER. mf 6 V % X5R 4 C5X5RC4K 7 C59 CAP TANT mf 6 V % TAJA6K6R 8 C6,C6,C7 CAP CER pf 5 V 5% CG 4 C4CG5-JNE 9 C64 CAP CER.47 mf 6 V % X7R 6 C6C474K4RAC C66 CAP TANT 4.7 mf V % T49A475KAT C7 CAP TANT ESR.6 W 5 mf 5 V % TRB56K5C C7 CAP TANT 4.7 mf 5 V % TAJB475K5RNJ C74 CAP CER. mf 5 V % X5R 4 CC4KRX5R8BB4 4 C75 CAP CER. mf 5 V % X5R 6 C6C5KPAC 5 C76 CAP CER. mf 6. V % X7R 4 C4C4K9RACTU 6 C78 CAP CER 47 pf 5 V 5% COG 6 65A47JATA 7 C79 CAP CER. mf 6 V % X5R 6 GRM88R6C5KE5D () 8 C8 CAP CER. mf 6 V % X5R 6 C68X5RC5K 9 C8 CAP TANT ESR=.8 W. mf V TPSA5KR8 % C85 CAP CER. mf 6. V % X5R 4 C4C5M9PACTU () 4 C86 CAP CER 47 pf 5 V 5% COG 6 65A47JATA () Inductors 4 L IND PWR. mh@ khz. A % LPS5-ML_ SMT 4 L IND PWR mh@ khz 6 A % SMT XAL4-MEC 44 4 L,L4,L5,L8 IND PWR mh@ khz.4 A % LPS4-NLC SMT 45 L6 IND PWR mh@ MHZ A % SMT VLS5T-RN 46 L7 IND PWR mh@ khz.65 A % LPS55-MLC SMT 47 L9 IND FER W@ MHZ 8 A 5% HI8VR- SMD/8 48 L IND PWR CHK mh@ khz A % SMD 49 L IND FER W@ MHZ 8 A 5% SMD/8 HI8VR- Resistors 5 6 R,R,R4,R6,R8,R6 RES --. W /4 W 5% 85 LMI-R-5. 5 R RES MF. W /6 W % 4 RK7HETTPRF () 5 5 R7,R9,R,R7,R7 RES --. W /4 W 5% 85 LMI-R-5. () 5 R RES MF. W W % 6 CSNL6FTL 54 5 R,R,R4,R7,R86 RES MF ZERO W / W % 6 MC6SAFT5E () 55 5 R,R,R5,R6,R85 RES MF ZERO W / W % 6 MC6SAFT5E 56 R8,R4 RES MF. MW /6 W % AEC-Q 4 CRCW4MFKED KTPFUG Rev. 5. Freescale Semiconductor, Inc.

31 Bill of Materials Table 8. Bill of Materials () Item Qty Schematic Label Value/Description Part Number 57 R9,R79 RES MF KW /6 W 5% 4 RK7BETTP4J 58 R,R,R RES MF. KW /6 W % AEC-Q CRCW4KFKED 4 59 R5,R7,R74 RES MF W / W -- 4 ERJ-GERX 6 4 R6,R7,R5,R5 RES MF 4.7 KW /6 W % 4 RK7HETTP47F 6 4 R8,R9,R4,R69 RES MF W / W % 4 ERJRKFX 6 R4,R45 RES MF. W /6 W % 4 CR-FL6---R 6 R48,R49 RES MF.5 KW /6 W 5% 4 CRCW4K5JNED () 64 R55 RES MF W / W % 6 RK7HJTTDF 65 R56 RES MF 64 KW /6 W % 4 ERJRKF64X 66 R59 RES MF 74 KW /6 W % 4 RK7HETTP74F 67 R6,R76 RES MF 47 KW /6 W % 4 RK7HETTP47F 68 R6 RES MF KW /6 W % 4 RK7HETTPF 69 R6,R64,R65 RES MF KW /6 W 5% 4 CRCW4KJNED 7 R66,R75 RES MF 47 KW /6 W % 4 RK7HETTP47F 7 R67,R68 RES MF 47 W /6 W % 4 CR-FL6--47R 7 R7 RES MF KW / W 5% 6 CR6-JW-ELF 7 R7 RES MF. KW / W % 6 RK7HJTTDF 74 R77,R78 RES MF KW /6 W % 4 RC4FR-7KL 75 R8 RES MF 7 KW /6 W 5% 4 CRCW47KJNED () 76 R8 RES MF 47 KW /6 W 5% 4 CR4-6W-474JT () 77 R8,R8 RES MF W / W -- 4 ERJ-GERX () Transistors 78 Q TRAN MOSFET DUAL N & P CHANNEL FDC67C.5 V S-SOT6 79 Q,Q TRAN PMOS SW MA 5 V SOT FDVP 8 Q5,Q6,Q TRAN PMOS SW A V SSOT FDN6P 8 Q8,Q9 TRAN NMOS 5 V MA SOT- BSS8 Assy Opt KTPFUG Rev. 5. Freescale Semiconductor, Inc.

32 Bill of Materials Table 8. Bill of Materials () Item Qty Schematic Label Value/Description Part Number Switches, Connectors, Jumpers and Test Points 8 56 VSWBST,VSNVS,VR EFDDR,VIN_SWC,VI N_SWBST,VIN_SWB,VIN_SWA,VIN_SENS E,VINREFDDR,VIN, VHALF,VGEN,VDDO TP,VDDIO,VCORER EF,VCOREDIG,VCO RE,SWC,SWAB,ST ANDBY,SDWNB,SD A,SCL,RESETBMCU,PWRON,LX_SWC, LX_SWBST,LX_SWB,LX_SWA,INTB,ICTE ST,,VIN_SW,VI N,VGEN,SW,LX_S W,,VIN_SWB,V IN_SWA,VIN,VGEN, SWB,SWA,LX_SWB,LX_SWA,,VIN_ SW4,VGEN4,SW4,LX_ SW4,4,VGEN5,GN D5,VGEN6,6 8 4 J,J,J,J4,J5,J6,J7,J9, J4,J6,J7,J4,J4,J J8,J,J,J,J,J4, J5,J,J 85 7 J6,J8,J9,J,J5,J 9,J TEST POINT RED 4 MIL DRILL 8 MIL TH 9L HDR X TH MIL SP 9H AU 8L SUBASSEMBLY CON X TB TH.8 MM SP H -- 8L + TERM BLOCK PLUG.8MM POS SUBASSEMBLY CON X TB TH.8 MM SP H -- 8L + TERM BLOCK PLUG.8MM POS 5-9-GB -897, , J7,J5 HDR X TH MIL CTR 5H AU 95L TSW--7-S-D 87 J,J,J9 HDR X TH MIL SP 4H AU 8L M J4 CON 5 USB MINI-B RA SHLD SKT SMT MIL SP AU J6 HDR X4 TH MIL CTR 45H AU L TSW-4-6-G-D 9 J4,J4,J44 CON X SKT SMT MIL CTR 9H AU SSW---F-D-VS-N 9 J45,J46 HDR X TH MIL CTR 4H SN 5L SW SW SPST PB V 5 MA SMT () Misc 9 BAT BATTERY LITHIUM -- V 5.5 MAH MS6F-FLE 94 BAT HOLDER COIN CELL 6.8 MM SMT BK-879 () 95 4 BH,BH,BH,BH4 MOUNTING HOLE. INCH, no part to order not a part to order Assy Opt () KTPFUG Rev. 5. Freescale Semiconductor, Inc.

33 Bill of Materials Table 8. Bill of Materials () Item Qty Schematic Label Value/Description Part Number 96 F FUSE PLYSW.5 A. V SMT MICROSMD5F- Notes:. Freescale does not assume liability, endorse, or warrant components from external manufacturers that are referenced in circuit drawings or tables. While Freescale offers component recommendations in this configuration, it is the customer s responsibility to validate their application. Do Not Populate Assy Opt KTPFUG Rev. 5. Freescale Semiconductor, Inc.

34 References References Document Number Description URL MMPF Data Sheet MMPFER Errata PFSERIESFS Fact Sheet AN46 Layout Application Note MMPF Product Summary Page KITPFEPEVBE Tool Summary Page Analog Home Page Power Management Home Page Support Visit Freescale.com/support for a list of phone numbers within your region.. Warranty Visit Freescale.com/warranty to submit a request for tool warranty. KTPFUG Rev Freescale Semiconductor, Inc.

35 Revision History Revision History Revision Date Description of Changes. / Initial Release. / Updated document for the latest GUI Revision... Added Figure 4 to section 8 Evaluation Board Schematic Added TBB operation Mode. Updated section.4 Using the Script Editor Updated section.5 Loading a Configuration File. / Added section 5 MMPF Features Added section 6 Hardware/Software Requirements 4. /5 Removed references to older revision of EVB and GUI 5. 8/5 Updated the Evaluation Board Schematic and related descriptions 8/5 Deleted section 6 KITPFEPEVBE Hardware/Software Deviation Deleted Manufacturer column from Table 8 KTPFUG Rev. 5. Freescale Semiconductor, Inc. 5

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