NC7SZ00 TinyLogic UHS Two-Input NAND Gate

Transcription

1 NC7SZ00 TinyLogic UHS Two-Input NAND Gate Features Ultra-High Speed: tpd 2.4ns (Typical) into 50pF at 5 CC High Output Drive: ±24mA at 3 CC Broad CC Operating Range: 1.65 to 5.5 Matches Performance of LCX Operated at 3.3 CC Power Down High-Impedance Inputs/Outputs Over-oltage Tolerance inputs facilitate 5 to 3 Translation Proprietary Noise/EMI Reduction Circuitry Ultra-Small MicroPak Packages Space-Saving SOT23 and SC70 Packages Description The NC7SZ00 is a single two-input NAND gate from ON Semiconductor s Ultra-High Speed (UHS) series of TinyLogic. The device is fabricated with advanced CMOS technology to achieve ultra-high speed with high output drive while maintaining low static power dissipation over a broad CC operating range. The device is specified to operate over the 1.65 to 5.5 CC operating range. The inputs and output are high impedance when CC is 0. Inputs tolerate voltages up to 6, independent of CC operating voltage. Ordering Information Part Number Top Mark Package Packing Method NC7SZ00M5X 7Z00 5-Lead SOT23, JEDEC MO mm 3000 Units on Tape & Reel NC7SZ00P5X Z00 5-Lead SC70, EIAJ SC-88a, 1.25mm Wide 3000 Units on Tape & Reel NC7SZ00L6X YY 6-Lead MicroPak, 1.00mm Wide 5000 Units on Tape & Reel NC7SZ00FHX YY 6-Lead, MicroPak2, 1x1mm Body,.35mm Pitch 5000 Units on Tape & Reel Connection Diagrams IEEE/IEC Figure 1. Logic Symbol 1996 Semiconductor Components Industries, LLC. Publication Order Number: July-2018, Rev. 3 NC7SZ00/D

2 Pin Configurations Figure 2. SC70 and SOT23 (Top iew) Figure 3. MicroPak (Top Through iew) Pin Definitions Pin # SC70 / SOT23 Pin # MicroPak Name Description 1 1 A Input 2 2 B Input 3 3 GND Ground 4 4 Y Output 5 6 CC Supply oltage 5 NC No Connect Function Table Inputs Output A B Y L L H L H H H L H H H L H = HIGH Logic Level L = LOW Logic Level Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Min. Max. Unit CC Supply oltage IN DC Input oltage OUT DC Output oltage IIK IOK DC Input Diode Current DC Output Diode Current IN < IN > OUT < OUT > 6, CC=GND +20 IOUT DC Output Current ±50 ma ICC or IGND DC CC or Ground Current ±50 ma TSTG Storage Temperature Range C ma ma 2

3 TJ Junction Temperature Under Bias +150 C TL Junction Lead Temperature (Soldering, 10 Seconds) +260 C PD ESD Power Dissipation at +85 C SOT SC MicroPak MicroPak Human Body Model, JEDEC:JESD22-A Charge Device Model, JEDEC:JESD22-C Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. ON Semiconductor does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol Parameter Conditions Min. Max. Unit CC Supply oltage Operating Supply oltage Data Retention IN Input oltage OUT Output oltage 0 CC TA Operating Temperature C tr, tf θja Input Rise and Fall Times Thermal Resistance Note: 1. Unused inputs must be held HIGH or LOW. They may not float. CC at 1.8, 2.5 ± CC at 3.3 ± CC at 5.0 ± SOT SC MicroPak MicroPak mw ns/ C/W 3

4 DC Electrical Characteristics Symbol Parameter CC Conditions IH IL OH OL HIGH Level Input oltage LOW Level Input oltage HIGH Level Output oltage LOW Level Output oltage TA=25 C TA=-40 to +85 C Min. Typ. Max. Min. Max to CC 0.75 CC 2.30 to CC 0.70 CC 1.65 to CC 0.25 CC 2.30 to CC 0.30 CC IN= IL I OH=-100µA I OH=-4mA I OH=-8mA I OH=-16mA I OH=-24mA I OH=-32mA IN= IH I OL=100µA I OL=4mA I OL=8mA I OL=16mA I OL=24mA I OL=32mA I IN Input Leakage Current 0 to 5.5 IN=5.5, GND ±1 ±10 µa I OFF Power Off 0 IN or OUT= µa I CC Quiescent Supply Current 1.65 to 5.50 IN=5.5, GND 2 20 µa Units 4

5 AC Electrical Characteristics Symbol Parameter CC Conditions t PHL, t PLH Propagation Delay 1.65 TA=25 C Min. Typ. Max. Min. Max ± 0.20 C L=15pF, R L=1MΩ ± ± ± 0.30 C L=50pF, ± 0.50 R L=500Ω TA=-40 to +85 C Units Figure C IN Input Capacitance pf C PD Power Dissipation Capacitance (2) ns Figure 4 Figure 5 pf Figure 6 Note: 2. CPD is defined as the value of the internal equivalent capacitance derived from dynamic operating current consumption (ICCD) at no output lading and operating at 50% duty cycle. CPD is related to ICCD dynamic operating current by the expression: ICCD=(CPD)(CC)(fIN)+(ICCstatic). Figure 4. AC Test Circuit Figure 5. AC Waveforms Note: 3. Input=AC Waveform; tr=tf=1.8ns; PRR=10MHz; Duty Cycle =50%. Figure 6. ICCD Test Circuit 5

6 Physical Dimensions (0.30) TOP IEW 4 3 A B C A B 1.45 MAX SYMM C L LAND PATTERN RECOMMENDATION SEE DETAIL A C 0.10 C NOTES: UNLESS OTHEWISE SPECIFIED GAGE PLANE 0.25 A) THIS PACKAGE CONFORMS TO JEDEC MO-178, ISSUE B, ARIATION AA, B) ALL DIMENSIONS ARE IN MILLIMETERS. C) MA05Brev REF SEATING PLANE Figure 7. 5-Lead SOT23, JEDEC MO mm Package drawings are provided as a service to customers considering ON Semiconductor components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a ON Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of ON Semiconductor s worldwide terms and conditions, specifically the warranty therein, which covers ON Semiconductor products. Tape and Reel Specifications Package Designator Tape Section Cavity Number Cavity Status Cover Type Status Leader (Start End) 125 (Typical) Empty Sealed M5X Carrier 3000 Filled Sealed Trailer (Hub End) 75 (Typical) Empty Sealed 6

7 Physical Dimensions Figure 8. 5-Lead, SC70, EIAJ SC-88a, 1.25mm Wide Package drawings are provided as a service to customers considering ON Semiconductor components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a ON Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of ON Semiconductor s worldwide terms and conditions, specifically the warranty therein, which covers ON Semiconductor products. Tape and Reel Specifications Package Designator Tape Section Cavity Number Cavity Status Cover Type Status Leader (Start End) 125 (Typical) Empty Sealed P5X Carrier 3000 Filled Sealed Trailer (Hub End) 75 (Typical) Empty Sealed 7

8 Physical Dimensions 2X 1.45 (0.254) TOP IEW PIN 1 IDENTIFIER MAX C DETAIL A 1.0 B 2X X A (0.49) 5X (0.52) 1X PIN C B A (1) (0.30) 6X RECOMMENED LAND PATTERN X (0.75) X Notes: (0.05) 6X 0.5 BOTTOM IEW X 45 CHAMFER 1. CONFORMS TO JEDEC STANDARD M0-252 ARIATION UAAD 2. DIMENSIONS ARE IN MILLIMETERS 3. DRAWING CONFORMS TO ASME Y14.5M FILENAME AND REISION: MAC06ARE4 5. PIN ONE IDENTIFIER IS 2X LENGTH OF ANY OTHER LINE IN THE MARK CODE LAYOUT. 5X (0.13) 4X Figure 9. 6-Lead, MicroPak, 1.0mm Wide DETAIL A PIN 1 TERMINAL Package drawings are provided as a service to customers considering ON Semiconductor components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a ON Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of ON Semiconductor s worldwide terms and conditions, specifically the warranty therein, which covers ON Semiconductor products. Tape and Reel Specifications Package Designator Tape Section Cavity Number Cavity Status Cover Type Status Leader (Start End) 125 (Typical) Empty Sealed L6X Carrier 5000 Filled Sealed Trailer (Hub End) 75 (Typical) Empty Sealed 8

9 Physical Dimensions 2X 1.00 PIN 1 MIN 250uM TOP IEW C SIDE IEW (0.08) 4X DETAIL A B 0.55MAX A X 6X 5X X X X X 0.19 RECOMMENDED LAND PATTERN FOR SPACE CONSTRAINED PCB X ALTERNATIE LAND PATTERN FOR UNIERSAL APPLICATION (0.05) 6X 5X 0.25 NOTES: BOTTOM IEW 0.60 (0.08) 4X A. COMPLIES TO JEDEC MO-252 STANDARD B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994 D. LANDPATTERN RECOMMENDATION IS BASED ON FSC DESIGN. E. DRAWING FILENAME AND REISION: MGF06ARE C B A.05 C 0.075X45 CHAMFER DETAIL A PIN 1 LEAD SCALE: 2X Figure Lead, MicroPak2, 1x1mm Body,.35mm Pitch Package drawings are provided as a service to customers considering ON Semiconductor components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a ON Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of ON Semiconductor s worldwide terms and conditions, specifically the warranty therein, which covers ON Semiconductor products. Tape and Reel Specifications Package Designator Tape Section Cavity Number Cavity Status Cover Type Status Leader (Start End) 125 (Typical) Empty Sealed FHX Carrier 5000 Filled Sealed Trailer (Hub End) 75 (Typical) Empty Sealed 9

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