Processor Halt Codes Manual

Transcription

1 Processor Halt Codes Manual Part Number: Published: April 2018 Edition: L15.02 and J06.03 and all subsequent L-series and J-series RVUs.

2 Copyright 2015, 2018 Hewlett Packard Enterprise Development LP Notices The information contained herein is subject to change without notice. The only warranties for Hewlett Packard Enterprise products and services are set forth in the express warranty statements accompanying such products and services. Nothing herein should be construed as constituting an additional warranty. Hewlett Packard Enterprise shall not be liable for technical or editorial errors or omissions contained herein. Confidential computer software. Valid license from Hewlett Packard Enterprise required for possession, use, or copying. Consistent with FAR and , Commercial Computer Software, Computer Software Documentation, and Technical Data for Commercial Items are licensed to the U.S. Government under vendor's standard commercial license. Links to third-party websites take you outside the Hewlett Packard Enterprise website. Hewlett Packard Enterprise has no control over and is not responsible for information outside the Hewlett Packard Enterprise website. Acknowledgments Intel, Itanium, Pentium, Intel Inside, and the Intel Inside logo are trademarks of Intel Corporation in the United States and other countries. Microsoft and Windows are either registered trademarks or trademarks of Microsoft Corporation in the United States and/or other countries. Adobe and Acrobat are trademarks of Adobe Systems Incorporated. Java and Oracle are registered trademarks of Oracle and/or its affiliates. UNIX is a registered trademark of The Open Group.

3 Contents About This Document...4 Supported Release Version Updates (RVUs)... 4 Intended Audience... 4 New and Changed Information... 4 Document Organization... 5 Publishing History... 5 Overview... 6 Processor Halt Descriptions...6 Processor Halt Monitoring and... 6 Millicode Halt Code Descriptions... 8 Millicode Halt Codes H-Series and J-Series Codes L-Series Codes Software Halt Code Descriptions Software Halt Code Categories Standard Processor Halt Code Descriptions Websites Support and other resources Accessing Hewlett Packard Enterprise Support Accessing updates Customer self repair Remote support Warranty information Regulatory information Documentation feedback Contents 3

4 About This Document This publication describes processor halt codes and millicode halt codes for HPE NonStop systems., effect, and suggested recovery procedures are included for each code. Supported Release Version Updates (RVUs) This manual supports L15.02 and all subsequent L-series RVUs, J06.03 and subsequent J-series RVUs, H06.03 and all subsequent H-series RVUs, and G06.24 and all subsequent G-series RVUs until otherwise indicated in a replacement publication. Intended Audience The reader should have some knowledge of and experience with NonStop server operations. New and Changed Information Version Changes Added halt code % in the section Standard Processor Halt Code Descriptions on page Standard Processor Halt Code Descriptions on page 117 Updated halt codes -- % % % % % % % Added halt codes -- % % % Miscellaneous minor updates Added halt code % R Updated Hewlett Packard Enterprise references. 4 About This Document

5 Document Organization The contents of this guide is divided into the major categories listed in the Summary of Contents table. Table 1: Summary of Contents Chapter This chapter... Overview on page 6 Millicode Halt Code Descriptions on page 8 Software Halt Code Descriptions on page 115 Describes the types of processor halts, how they are monitored, and how to recover from them. Describes processor halt codes generated by the millicode. Describes processor halt codes generated by the operating-system software. Publishing History Part Number Product Version Publication Date T9050 April T9050 June T9050 June T9050 May R T9050 November 2015 Document Organization 5

6 Overview When certain unrecoverable hardware, millicode, system configuration, or operating-system software errors occur in a processor, the operating system stops everything that is executing in this processor. Other processors in the system may or may not be affected by this halt. In this manual, halt code documentation is divided into: Millicode halt codes, generated by the millicode (Millicode Halt Code Descriptions on page 8) Processor halt codes, generated by the system software (Software Halt Code Descriptions on page 115), effect, and suggested recovery procedures are included for each halt code. Processor Halt Descriptions There are two types of processor halts: A processor can be halted by a halt instruction. When the operating system detects a millicode or software error that it cannot correct, it can execute a halt instruction to suspend all application and system processes running in the associated processor. The status of the halted processor becomes: Halt code = %nnnnnn or Millicode halt %nnnnnn Unlike a freeze instruction, a halt instruction affects only one processor. If you see a text message with no numeric code, you can find the text message in the Status Messages and Corresponding Halt Codes table, then look up the description for the corresponding halt code in Millicode Halt Code Descriptions on page 8 A processor can be halted by a freeze instruction. A freeze-enabled processor can be frozen by another frozen processor. When a freeze instruction is executed, any processors that are freeze-enabled also freeze immediately. When the operating system detects a software error that it cannot correct, it can execute a freeze instruction to suspend all application and system processes running in the associated processor. The status of the frozen processor becomes: Freeze code = %nnnnnn Processor Halt Monitoring and NonStop servers are monitored and serviced from a Hewlett Packard Enterprise approved system console using either HPE Open System Management (OSM) or Compaq TSM software. In the event of a halt, halt codes are displayed in the OSM Service Connection or TSM Low-Level Link, within the Processor Status dialog box. For information about monitoring and recovery of halts, see the section about processor monitoring and recovery in the NonStop S-Series Operations Guide or the NonStop NS-Series Operations Guide. 6 Overview

7 For information about OSM, see the OSM Service Connection User s Guide (available as online help within the OSM Service Connection) or the OSM Low-Level Link online help. For information about TSM, see the TSM Online User Guide. NOTE: If a memory dump is requested as part of a recovery, for processors with more than 2 gigabytes of memory, use the Tandem Failure Data System (TFDS) memory dump facility to ensure that the dump occurs in a timely fashion. Otherwise, use either RCVDUMP or the TFDS facility. TFDS must be configured on the system before the halt occurs. For information about TFDS, see the TFDS Manual. If a system predates or does not have OSM or TSM, these instructions are invalid. For recovery instructions, contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating Overview 7

8 Millicode Halt Code Descriptions This chapter describes processor halt codes generated by the millicode. Millicode halt %nnnnnn When a millicode halt occurs, look up the halt code in this section. The codes are listed in numeric order. If a text message rather than a numeric value is displayed for a halt, consult the Status Messages and Corresponding Halt Codes table to find the text message, and then look up the description for the corresponding halt code. For information about recovering a halted processor, see Processor Halt Monitoring and on page 6. If a system predates or does not have OSM or TSM, these instructions are invalid. For recovery instructions, contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating Many millicode halt codes refer to G-series and H-series RVUs, but there are some that are specific to H- series RVUs alone. These codes are at the end of this section. New millicode halt codes in the range of % to % are reserved for H-series Halted State Services millicode. New millicode halt codes in the range of % to % are reserved for H-series Standard millicode. This range is further divided as: % %102477: Millicode detected failures in NonStop Kernel % %102577: Millicode detected failures in Millicode % %102677: Hardware failures % %102777: Hardware failure, but CPU should be automatically rebooted. New millicode halt codes in the range of % to % are reserved for NSAA. Table 2: Status Messages and Corresponding Halt Codes Status Message Millicode Halt Number Bus error - hard abort % Cache error exception % Code page fault % Data page fault % Freeze code = nnnnnn % ( nnnnnn is a processor halt code) Frozen by other CPU % Frozen by operator % Table Continued 8 Millicode Halt Code Descriptions

9 Status Message Halt code = nnnnnn Millicode Halt Number % ( nnnnnn is a processor halt code) Halt interrupt occurred % Halted by operator % Hard reset performed % LOBUG breakpoint % Manual reset % MC Fault Blade Reset Needed % Memory dump completed % Millicode halt nnnnnn Millicode halt... nnnnnn The millicode halt code is stored in the millicode halt word. PON - no system image % POST has successfully completed % Power fail, lost memory % Priv instruction failed % Reset after error freeze % Spurious bus error % Spurious interrupt % TLB exception % TLB exception failure % Unexpected break % Unexpected exception % Unexpected interrupt % Watch exception taken % Millicode Halt Code Descriptions 9

10 Millicode Halt Codes % Interrupt before WCS load The writable control store (WCS) was not loaded when an interrupt was present. This halt can also occur after you try to dump a processor that has lost its millicode due to a power failure or when the processor is being primed for a system-load operation or reload operation before a memory dump. If this halt occurs when you are loading a processor, try reloading it. If the reload attempt is unsuccessful, or the halt occurs during some other operation, see Processor Halt Monitoring and on page 6. Before attempting a memory dump operation, contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % I/O device did not reply The device with the system image did not respond. See Processor Halt Monitoring and on page 6. Before attempting a memory dump operation, contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % I/O transfer timed out A timeout occurred during a system-load operation and the transfer of the system image was not completed. Try the system-load operation again. If this operation fails, see Processor Halt Monitoring and on page 6. Before attempting a memory dump, contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % I/O ownership failed A TAKEOWNERSHIP EIO (execute input/output) error occurred during device load. 10 Millicode Halt Codes

11 See Processor Halt Monitoring and on page 6. Before attempting a memory dump, contact your % I/O reset failed A RESETCONTROLLER EIO (execute input/output) error occurred during system load. See Processor Halt Monitoring and on page 6. Before attempting a memory dump, contact your % Manual reset The processor was manually reset by a reload operation, by the operating system, by the OSM or TSM facility, or by an operator. Reload the processor. If the operation is unsuccessful, contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % Freeze code = %nnnnnn LOBUG breakpoint This halt results from a system freeze instruction. If software requested the freeze, SG122 contains the software halt code. If the halt is a software halt, look up the description in Software Halt Code Descriptions on page 115. Otherwise, see Processor Halt Monitoring and on page 6. Contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % Halt code = %nnnnnn Millicode Halt Code Descriptions 11

12 A halt instruction was executed by privileged software. The nnnnnn variable indicates the software halt code. If you do not receive the OSM or TSM facility CPU status screen message, the halt code is in SG122. Look up the description of the nnnnnn halt in Software Halt Code Descriptions on page 115. % UCME - Page %nn An uncorrectable memory error occurred. The 32-bit value displayed as %nn corresponds to registers R0 and R1 and indicates the page number where the error was detected. Contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % Halted by operator Frozen by other CPU Halted by DDT Halted by MDP RMI requested freeze An operator requested a halt with the OSM or TSM facility, or the halt is the result of diagnostics performed by software development. The processor halts. If this halt is the result of a maintenance and diagnostic (MDP) interrupt, other freeze-enabled processors also halt. Otherwise, the rest of the system is not affected. If you requested the halt with the OSM or TSM facility, continue performing the operation for which you requested the halt. Otherwise, contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % Frozen by operator Frozen by other CPU Either an operator requested a system freeze with the OSM or TSM facility to perform functions that require processors to be halted, or another processor executed a service processor (SP) system freeze instruction. This halt is usually the result of diagnostics performed by software development. 12 Millicode Halt Code Descriptions

13 All freeze-enabled processors halt. If you requested the system freeze with the OSM or TSM facility, continue performing the operation for which you requested the halt. If the system freeze was requested by another processor, see Processor Halt Monitoring and on page 6. % Unexpected exception An unexpected exception, other than a maintenance and diagnostic processor (MDP) freeze request, invalid instruction, or system halt request, occurred. The processor is already halted, or the system image has not been loaded into the processor. See Processor Halt Monitoring and on page 6. Before attempting a memory dump, contact your % LOBUG breakpoint This halt is used only for software development. Contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % Halt interrupt occurred This halt is used only for software development. Contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % Memory dump completed The processor dump is completed. Millicode Halt Code Descriptions 13

14 The processor remains halted. The rest of the system is not affected. If the processor is not reloaded automatically by TFDS, reload it. % Memory dump completed with UCME The processor dump is completed with UCME. Main memory on TNS/R processors is protected by the ECC (error correcting code). The ECC contains 8 bits of error correcting information for every 64 bits of data and automatically corrects any error when only 1 bit is in error. Multiple bit errors (on 64 bits of data) are called uncorrectable memory errors (UCMEs) and cause a processor hardware error freeze. The processor remains halted. The rest of the system is not affected. If the processor is not reloaded automatically by TFDS, reload it. % A processor that incurred a hardware error freeze was reset. Either the OSM or TSM facility determined that the processor was hung and forced a hardware error freeze so that a dump can be taken, or the OSM or TSM facility was preparing the processor for a processor dump. See Processor Halt Monitoring and on page 6 % The millicode was initialized. None. Informational message only; no corrective action is needed. % The millicode enters a diagnostic halt loop. 14 Millicode Halt Code Descriptions

15 None. Informational message only; no corrective action is needed. % Processing begins at a halt loop vector. None. Informational message only; no corrective action is needed. % Data page fault A data page fault (DABS) occurred when the page-fault interrupt was not enabled (masked off). See Processor Halt Monitoring and on page 6. Before taking a memory dump, contact your % Code page fault A code page fault (IABS) occurred when the page-fault interrupt was not enabled (masked off). See Processor Halt Monitoring and on page 6. Before taking a memory dump, contact your % Instruct failed before load A data page fault (DABS) or uncorrectable memory error (UCME) occurred in an interrupt environment. Millicode Halt Code Descriptions 15

16 See Processor Halt Monitoring and on page 6. Before taking a memory dump, contact your % Priv instruction failed An instruction failure occurred before the writable control store (WCS) was loaded. This might indicate a problem with the bootstrap code or millicode. See Processor Halt Monitoring and on page 6. Contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % Stack ovfl before WCS load A stack overflow occurred before the writable control store (WCS) was loaded. This might indicate a problem with the bootstrap code or millicode. See Processor Halt Monitoring and on page 6. Contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % The Read FIFO queue was not empty on the entrance into a halt loop, indicating that the interprocessor bus (IPB) chip could be failing. This halt can indicate a hardware failure. See Processor Halt Monitoring and on page 6. Before taking a memory dump, contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % Hard reset performed The processor was manually reset by a reload, by the operating system, by the OSM or TSM facility, or by an operator. 16 Millicode Halt Code Descriptions

17 Load the processor. If this operation fails, contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % Unexpected break The millicode detected an unexpected break condition from the boot code. The processor is already halted, or the system image has not been loaded into the processor. See Processor Halt Monitoring and on page 6. Before taking a memory dump, contact your % Unexpected interrupt The boot millicode detected an unexpected interrupt. The processor is already halted, or the system image has not been loaded into the processor. See Processor Halt Monitoring and on page 6. Before taking a memory dump, contact your % Bus error - hard abort The processor detected a bus error caused by a hard abort. See Processor Halt Monitoring and on page 6. % PON - no operating system image The processor thought a power-fail recovery was in progress and tried to restart the operating system, but the operating system has not been loaded. Millicode Halt Code Descriptions 17

18 The processor halts. The device load has failed. The rest of the system is not affected. Check your system-load paths and retry the operation. If this operation fails, contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % Spurious bus error The millicode detected a bus error but could not identify its source. See Processor Halt Monitoring and on page 6. Before taking a memory dump, contact your % TLB exception A software error caused the device load to fail. See Processor Halt Monitoring and on page 6. Before taking a memory dump, contact your % Cache error exception Hardware may be broken. The processor halts. The device load has failed. The rest of the system is not affected. See Processor Halt Monitoring and on page 6. Before taking a memory dump, contact your % Watch exception taken Someone accessed a memory location specified in the processor watch register. 18 Millicode Halt Code Descriptions

19 The processor halts. The device load has failed. The rest of the system is not affected. See Processor Halt Monitoring and on page 6. Before taking a memory dump, contact your % TLB exception failure The TLB hardware in the processor is not working and a TLB exception could not be forced. This message can occur only when the processor is reset. The processor reset has failed; the processor halts. The rest of the system is not affected. Replace the processor logic board. % Reset after error freeze A processor that incurred a hardware error freeze was reset. Either the OSM or TSM facility determined that the processor was hung and forced a hardware error freeze so that a dump can be taken, or the OSM or TSM facility was preparing the processor for a processor dump. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % The clean cache lines were not consistent with the memory of a halted processor. The processor remains halted. The rest of the system is not affected. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % Millicode Halt Code Descriptions 19

20 A cache error occurred upon entry into the halt loop. The processor remains halted. The rest of the system is not affected. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % The power-on self-test failed with a correctable memory error (CME). The processor remains halted. The rest of the system is not affected. Before taking any action, contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating A device load or reload might be possible; however, the board might need to be replaced. % The power-on self-test failed. The processor remains halted. The rest of the system is not affected. Before taking any action, contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating A device load or reload might be possible; however, the board might need to be replaced. % The SCSI boot code could not be loaded. Perform a firmware update of the SCSI boot code by using the OSM or TSM facility. % MICROHALT_CPU_MODEL_UNDEFINED HSS could not determine the CPU model number. 20 Millicode Halt Code Descriptions

21 HSS is operational but coldload and reload will fail. Verify that the EFI variable value is correct if the system requires one, otherwise contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating For information on verifying the EFI variable, refer to the hardware installation manual for your system. % MICROHALT_IPU_FAIL One or more processor cores have failed. This halt code will only be seen if the NonStop Kernel has been previously running. Coldload and reload will be prevented. Attempt to take a memory dump. After the dump completes or if taking a memory dump is not possible, contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % There is insufficient memory configured on the processor to support the current software RVU. Either add memory to the processor, or revert to an earlier software RVU. % A floating-point instruction was received by a system not using a floating-point processor. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % The processor millicode has detected a hard abort. Millicode Halt Code Descriptions 21

22 See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % The processor millicode has detected a bus error, but the processor interface chip (PIC) did not report a bus error in its status. Contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % The millicode detected an uncorrectable memory error (UCME), but the UCMEs are masked. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % The millicode has detected an uncorrectable memory error (UCME), but the memory interface chip (MIC) has not detected an error. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % Millicode Halt Code Descriptions

23 An internal processor error has occurred. Contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % through % An internal processor error has occurred. Contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % The secondary cache has an error. Contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % and % An internal processor error has occurred. Contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % An internal processor error has occurred. Millicode Halt Code Descriptions 23

24 See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % An internal processor error has occurred. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % An internal processor error has occurred. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % An internal processor error has occurred. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % An internal processor error has occurred. 24 Millicode Halt Code Descriptions

25 See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % The processor interface chip (PIC) passed bad data to the system. A hardware error probably occurred. Contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % An error in the input/output subsystem (IOS) occurred while the millicode was handling a subchannel error. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % An internal processor error has occurred. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % Millicode Halt Code Descriptions 25

26 An internal processor error has occurred. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % An error occurred in the service processor (SP). See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % An error occurred in the service processor (SP). See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % A bad halt interrupt was received. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % Millicode Halt Code Descriptions

27 The exception handler tries to interrupt the system, but all the interrupts are masked off. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % The millicode has detected an error. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % The millicode has detected an error. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % There is a negative time-list element (TLE). See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % Millicode Halt Code Descriptions 27

28 The processor received an interrupt from an unexpected source, which is indicated in INT_IO. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % A page fault from INTERRUPT A (INTA) was received. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % A bad address was received from $OSP. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % An overflow from INTERRUPT A (INTA) was received. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % Millicode Halt Code Descriptions

29 No millicode was placed in the system during system generation. Contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % A cache error occurred on the bus. The processor interface chip (PIC) should have issued a hardware error to freeze the processor. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % Both processors encountered a primary cache error at the same time. This should have resulted in a hardware error freeze. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % An error in the secondary cache occurred. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your Millicode Halt Code Descriptions 29

30 % An internal error occurred. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % A Dispatcher interrupt was received from INTERRUPT A (INTA) rather than from the register. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % An internal processor error has occurred. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % During internal testing (performed by software development), the millicode that was processing a watch exception was unable to simulate a requested instruction. 30 Millicode Halt Code Descriptions

31 See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % During internal testing (performed by software development), the millicode that was processing a virtual coherency exception could not find a mapped address in the translation look-aside buffer (TLB). See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % An uncorrectable memory error occurred. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % The processor has detected a problem with the memory subsystem. Review the service logs for evidence of memory problems, take the appropriate action based on the service log review, reload the processor, and contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % An unexplained interrupt occurred. Millicode Halt Code Descriptions 31

32 See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % The millicode timed out the ServerNet memory interface (SMI) hardware while trying to reset an interrupt. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % An error occurred during the emulation of ServerNet. This halt is usually a result of diagnostics performed by software development personnel, and is generally not encountered by users. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % A bus error exception was reported. A hardware problem might have occurred because bus errors are not valid for NonStop S-series servers. Contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % A privileged process has tried to execute a block INTA call when INTA was already blocked by a previous call. 32 Millicode Halt Code Descriptions

33 See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % A privileged process has tried to execute an unblock INTA call when INTA was already blocked by a previous call. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % A privileged process has tried to do a masking function (MXON, MXFF, XMSK) while INTA blocking was in process. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % The PWARN QUEUE has failed an internal consistency check. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % Millicode Halt Code Descriptions 33

34 An exception has occurred repeatedly and cannot be resolved. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % An exception occurred while a privileged process was under block INTA. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % A cache coherency problem has failed. This halt is generally not encountered by users, because it is usually a result of diagnostics performed by software development personnel. Contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % The processor has been running with time-list interrupts masked off for too long. A privileged process might have been under mutex or BLOCK INTA for too long. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your 34 Millicode Halt Code Descriptions

35 % A hardware problem has occurred. The length of the data in the coherency queue packet from the ServerNet memory interface (SMI) hardware is zero. The processor halts. The processor might need to be replaced, but the rest of the system is not affected. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % The millicode internal state is inconsistent with the hardware state after a powerfail recovery. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % An uncorrectable cache error has occurred. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % An uncorrectable cache error has occurred. Millicode Halt Code Descriptions 35

36 See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % An uncorrectable cache error has occurred. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % An uncorrectable cache error has occurred. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % An uncorrectable cache error has occurred. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % An uncorrectable cache error has occurred. 36 Millicode Halt Code Descriptions

37 See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % The correctable memory error (CME) scrubber routine has found the block transfer engine (BTE) idle but locked. The ServerNet code caused an invalid state. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % The processor has detected a potential data integrity error. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % Incompatible Hardware/Software The RVU software is not compatible with the processor's hardware interface. Either replace the affected processor with a processor that is supported by the software or cold load the system with any software RVU that supports the hardware configuration. % MICROHALT_DIVERGENCE_ A temporary error in the lockstep process has been detected by the system millicode. Millicode Halt Code Descriptions 37

38 Write down the halt code number, take a memory dump, then contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % MICROHALT_DIVERGENCE_ A temporary error in the lockstep process has been detected by the system millicode. Write down the halt code number, take a memory dump, then contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % MICROHALT_DIVERGENCE_ A temporary error in the lockstep process has been detected by the system millicode. Write down the halt code number, take a memory dump, then contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % MICROHALT_DIVERGENCE_ A temporary error in the lockstep process has been detected by the system millicode. Write down the halt code number, take a memory dump, then contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % MICROHALT_DIVERGENCE_ A temporary error in the lockstep process has been detected by the system millicode. 38 Millicode Halt Code Descriptions

39 Write down the halt code number, take a memory dump, then contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % MICROHALT_DIVERGENCE_ A temporary error in the lockstep process has been detected by the system millicode. Write down the halt code number, take a memory dump, then contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % MICROHALT_DIVERGENCE_ A temporary error in the lockstep process has been detected by the system millicode. Write down the halt code number, take a memory dump, then contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % MICROHALT_DIVERGENCE_ A temporary error in the lockstep process has been detected by the system millicode. Write down the halt code number, take a memory dump, then contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % MICROHALT_DIVERGENCE_ A temporary error in the lockstep process has been detected by the system millicode. Write down the halt code number, take a memory dump, then contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating Millicode Halt Code Descriptions 39

40 % MICROHALT_DIVERGENCE_ A temporary error in the lockstep process has been detected by the system millicode. Write down the halt code number, take a memory dump, then contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % MICROHALT_DIVERGENCE_ A temporary error in the lockstep process has been detected by the system millicode. Write down the halt code number, take a memory dump, then contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % MICROHALT_DIVERGENCE_ A temporary error in the lockstep process has been detected by the system millicode. Write down the halt code number, take a memory dump, then contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % MICROHALT_DIVERGENCE_ A temporary error in the lockstep process has been detected by the system millicode. Write down the halt code number, take a memory dump, then contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % MICROHALT_DIVERGENCE_ 40 Millicode Halt Code Descriptions

41 A temporary error in the lockstep process has been detected by the system millicode. Write down the halt code number, take a memory dump, then contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % An internal software error occurred. The processor load or tape dump fails; the processor remains halted. The rest of the system is not affected. Try the processor load or tape dump again. If the problem recurs, contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % The block transfer engine reported an error. The processor load or tape dump fails; the processor remains halted. The rest of the system is not affected. Verify that you have specified the correct slot location for the device that you are trying to access. Try the processor load or tape dump again. If the problem recurs, contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % The block transfer engine reported an error. The processor load or tape dump fails; the processor remains halted. The rest of the system is not affected. Verify that you have specified the correct slot location for the device that you are trying to access; then retry the processor load or tape dump. If the problem recurs, contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating Millicode Halt Code Descriptions 41

42 % The block transfer engine reported an error. The processor load or tape dump fails; the processor remains halted. The rest of the system is not affected. Verify that you have specified the correct slot location for the device that you are trying to access and try the processor load or tape dump again. If the problem recurs, contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % The block transfer engine reported an error. The processor load or tape dump fails; the processor remains halted. The rest of the system is not affected. Verify that you have specified the correct slot location for the device that you are trying to access and try the processor load or tape dump again. If the problem recurs, contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % The block transfer engine reported an error. The processor load or tape dump fails; the processor remains halted. The rest of the system is not affected. Verify that you have specified the correct slot location for the device that you are trying to access and try the processor load or tape dump again. If the problem recurs, contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % The boot section could not be found in the volume label (VLAB) because either the system or processor was loaded from an incorrect or defective disk. 42 Millicode Halt Code Descriptions

43 The processor load or tape dump fails; the processor remains halted. The rest of the system is not affected. Verify that you have specified the correct slot location for the device that you are trying to access, and try the processor load or tape dump again. If the problem recurs, contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % The checksum or eye-catcher was incorrect because either the system or processor was loaded from an incorrect or defective disk. The processor load or tape dump fails; the processor remains halted. The rest of the system is not affected. Verify that you have specified the correct slot location for the device that you are trying to access, and try the processor load or tape dump again. If the problem recurs, contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % The processor load timed out waiting for the service processor to upload the configuration table. The processor load or tape dump fails; the processor remains halted. The rest of the system is not affected. Try the processor load or tape dump again. If the problem recurs, contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % The processor load timed out waiting for the service processor (SP) to upload the ServerNet addressable controller (SAC) firmware. The processor load or tape dump fails; the processor remains halted. The rest of the system is not affected. Try the processor load or tape dump again. If the problem recurs, contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % Millicode Halt Code Descriptions 43

44 The processor load timed out waiting for the service processor (SP) to translate ServerNet IDs. The processor load or tape dump fails; the processor remains halted. The rest of the system is not affected. Try the processor load or tape dump again. If the problem recurs, contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % An incorrect response was received from the service processor (SP). The processor load or tape dump fails; the processor remains halted. The rest of the system is not affected. Try the processor load or tape dump again. If the problem recurs, contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % An incorrect response was received from the service processor (SP) because an incorrect slot location was specified. The processor load or tape dump fails; the processor remains halted. The rest of the system is not affected. Verify that you have specified the correct slot location for the device that you are trying to access, and try the processor load or tape dump again. If the problem recurs, contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % An incorrect response was received from the service processor (SP). The processor load or tape dump fails; the processor remains halted. The rest of the system is not affected. 44 Millicode Halt Code Descriptions

45 Try the processor load or tape dump again. If the problem recurs, contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % The parameters for a processor or system-load operation were not specified correctly. The processor load or tape dump fails; the processor remains halted. The rest of the system is not affected. Specify whether the processor or system-load operation is from disk or tape, then retry the operation. If the problem recurs, contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % An incorrect response was received from the service processor (SP). The processor load or tape dump fails; the processor remains halted. The rest of the system is not affected. Try the processor load or tape dump again. If the problem recurs, contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % A ServerNet error occurred. The processor load or tape dump fails; the processor remains halted. The rest of the system is not affected. See Processor Halt Monitoring and on page 6. After taking a memory dump, contact your % An internal software error occurred: the RELOAD or RCVDMP program asked for too much data to be pushed or pulled. Millicode Halt Code Descriptions 45

46 The processor reload or tape dump fails; the processor remains halted. The rest of the system is not affected. Try the processor reload or processor dump again. If the problem recurs during the processor reload, see Processor Halt Monitoring and on page 6. Take a memory dump of the system load processor, the processor that was being reloaded, and the processor from which the reload operation was being run. If the problem recurs during the processor dump, contact your service provider or the Global NonStop Solution Center (GNSC), as directed by your local operating % This halt code occurs in combination with a status message indicating that a Power-On Self Test (POST) operation has completed successfully. A POST operation occurs whenever power is applied to a customer-replaceable unit (CRU).. Whether a hardware recovery operation is required depends on what caused the message to be generated. The following table describes the most common instances that cause the POST message to be generated and the subsequent recovery actions that need to be executed. Required User inserts a CRU into an enclosure. User applies power to an enclosure, initiating a power-on cycle for each CRU in the enclosure. A POST operation is executed by the CRU. A POST has successfully completed message is generated for the CRU. A POST operation is executed by each CRU in the enclosure. A POST has successfully completed message is generated (for each CRU). The user knows that a CRU has been inserted. The message is expected. No action is required. The user knows that power has been applied to an enclosure. The message is expected. No action is required. Power-fail event occurs for a processor. The duration of the event exceeds both the configured ridethrough time and the expected battery life for the batteries supporting the enclosure. The service processor (SP) turns off the enclosure. When power is restored, a POST operation is executed by each CRU in the enclosure. A POST has successfully completed message is generated (for each CRU). Determine the duration of the power failure. To determine the duration of the power failure, check for messages indicating when the power failed and when it was restored. The message is expected. No action is required. Table Continued 46 Millicode Halt Code Descriptions